| 36ec2bb0 | 14-May-2019 |
Gilad Ben-Yossef <gilad.benyossef@arm.com> |
cryptocell: move Cryptocell specific API into driver
Code using Cryptocell specific APIs was used as part of the arm common board ROT support, instead of being abstracted in Cryptocell specific driv
cryptocell: move Cryptocell specific API into driver
Code using Cryptocell specific APIs was used as part of the arm common board ROT support, instead of being abstracted in Cryptocell specific driver code, creating two problems: - Any none arm board that uses Cryptocell wuld need to copy and paste the same code. - Inability to cleanly support multiple versions of Cryptocell API and products.
Move over Cryptocell specific API calls into the Cryptocell driver, creating abstraction API where needed.
Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com> Change-Id: I9e03ddce90fcc47cfdc747098bece86dbd11c58e
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| df5bd3bf | 17-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "console: update skeleton" into integration |
| 7cdd55af | 17-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes I68941876,Ib7961812,I758661d3,I4f3e3812,I9b26b838, ... into integration
* changes: rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style rcar_gen3: drivers: ddr-a: Pass ddrBackup
Merge changes I68941876,Ib7961812,I758661d3,I4f3e3812,I9b26b838, ... into integration
* changes: rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style rcar_gen3: drivers: ddr-a: Pass ddrBackup around rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style rcar_gen3: drivers: ddr-a: Fix D3 DDR init coding style rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32() rcar_gen3: drivers: ddr-a: Unify register definitions
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| f7694165 | 17-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro" into integration |
| 52e91081 | 31-May-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
console: update skeleton
Update the skeleton implementation of the console interface.
The 32 bit version was outdated and has been copied from the 64 bit version.
Change-Id: Ib3e4eb09402ffccb1a30c
console: update skeleton
Update the skeleton implementation of the console interface.
The 32 bit version was outdated and has been copied from the 64 bit version.
Change-Id: Ib3e4eb09402ffccb1a30c703a53829a7bf064dfe Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| d0d0f171 | 16-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "jc/shift-overflow" into integration
* changes: Enable -Wshift-overflow=2 to check for undefined shift behavior Update base code to not rely on undefined overflow behavi
Merge changes from topic "jc/shift-overflow" into integration
* changes: Enable -Wshift-overflow=2 to check for undefined shift behavior Update base code to not rely on undefined overflow behaviour Update hisilicon drivers to not rely on undefined overflow behaviour Update synopsys drivers to not rely on undefined overflow behaviour Update imx platform to not rely on undefined overflow behaviour Update mediatek platform to not rely on undefined overflow behaviour Update layerscape platform to not rely on undefined overflow behaviour Update intel platform to not rely on undefined overflow behaviour Update rockchip platform to not rely on undefined overflow behaviour Update renesas platform to not rely on undefined overflow behaviour Update meson platform to not rely on undefined overflow behaviour Update marvell platform to not rely on undefined overflow behaviour
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| c85f8f09 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I689418768e87a8c1b6eeeb9f1a
rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I689418768e87a8c1b6eeeb9f1a48dfb333908017
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| 2c400e94 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Pass ddrBackup around
Pass the ddrBackup variable around instead of making it a global variable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib7
rcar_gen3: drivers: ddr-a: Pass ddrBackup around
Pass the ddrBackup variable around instead of making it a global variable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib796181247712e464b77f5f8be5f851745727d74 --- NOTE: The camelcase is fixed in later patch.
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| 32e6b50e | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h
Partly inline ddr_init_e3.h into ddr_init_e3.c . Drop duplicate INITDRAM_* macros, which are defined in boot_init_dram.h .
Signed-off-by: Marek Vasut
rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h
Partly inline ddr_init_e3.h into ddr_init_e3.c . Drop duplicate INITDRAM_* macros, which are defined in boot_init_dram.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I758661d337a86b6a07f82cd4067fbc149cbaed1e
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| 8bfca58b | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I4f3e3812ffaa24fec50857756
rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I4f3e3812ffaa24fec50857756539b563eff33cdd
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| d2ee6e01 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix D3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9b26b838e8c45d9b4f53c67663
rcar_gen3: drivers: ddr-a: Fix D3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9b26b838e8c45d9b4f53c67663ec94002dd9edfe
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| dfd80943 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32()
Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change.
Sign
rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32()
Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I21446a00a38c6a39d6a48652c34f59814074e831
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| efe6eaab | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Unify register definitions
Unify boot_init_dram_regdef_*.h into boot_init_dram_regdef.h and clean up it's coding style a bit.
Signed-off-by: Marek Vasut <marek.vasut+rene
rcar_gen3: drivers: ddr-a: Unify register definitions
Unify boot_init_dram_regdef_*.h into boot_init_dram_regdef.h and clean up it's coding style a bit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Iae3375969c05f80209ebf7b1ebc3633a7f6317ff
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| 8ddd91b0 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro
Remove the ad-hoc BITn macros and replace them with generic BIT(n) macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renes
rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro
Remove the ad-hoc BITn macros and replace them with generic BIT(n) macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I5d0b44d6cba5a69895fed505f6ff780d3574907f
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| c186ec51 | 20-May-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: drivers: rpc: Modify PFC code
Modify PFC code and rename macro of MFIS according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.co
rcar_gen3: drivers: rpc: Modify PFC code
Modify PFC code and rename macro of MFIS according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I0ece522647319286350843bbbe8b8ba8b0ae9bac
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| a3aa877c | 20-May-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: drivers: rpc: Change RPC PHY calibration setting
Modify RPC code according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Sig
rcar_gen3: drivers: rpc: Change RPC PHY calibration setting
Modify RPC code according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I82d0a2136c7f18870842f84c49343977708eef1e
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| 783c5304 | 17-May-2019 |
Chiaki Fujii <chiaki.fujii.wj@renesas.com> |
rcar_gen3: drivers: ddr-b: Update DDR setting for H3, M3, M3N
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vas
rcar_gen3: drivers: ddr-b: Update DDR setting for H3, M3, M3N
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia4fc9456876a14a9cf3ced93163477974f6cc8bf
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| 9264f087 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update synopsys drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Ch
Update synopsys drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: I54560fe290e7dc52d364d0fe1c81a16f4c8d9a7b Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 4b5c1f30 | 16-May-2019 |
Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com> |
rcar_gen3: drivers: ddr-a: Update E3 DDR setting
[IPL/DDR] - Update E3 DDR setting rev.0.12.
Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+
rcar_gen3: drivers: ddr-a: Update E3 DDR setting
[IPL/DDR] - Update E3 DDR setting rev.0.12.
Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ic9fb7ed1cd7588fab169a99c4070a8dfc40038dc
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| 673406b5 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Ch
Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 1578169e | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Chan
Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: Ib7ec8ed3423e9b9b32be2388520bc27ee28f6370 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| b19498b9 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Ch
Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: I78f386f5ac171d6e52383a3e42003e6fb3e96b57 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 9ce41ec5 | 04-Jun-2019 |
Tien Hock, Loh <tien.hock.loh@intel.com> |
driver: synopsys: emmc: Do not change FIFO TH as this breaks some platforms
Designware MMC DMA FIFO threshold shouldn't be changed as it broke Poplar platform's uboot MMC
Signed-off-by: Tien Hock,
driver: synopsys: emmc: Do not change FIFO TH as this breaks some platforms
Designware MMC DMA FIFO threshold shouldn't be changed as it broke Poplar platform's uboot MMC
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com> Change-Id: I87ec9d5a78e1bf45119cb73797e402b25a914c13
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| 39c92b62 | 28-Jun-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge changes from topic "av/console-port" into integration
* changes: qemu: use new console interface in aarch32 warp7: remove old console from makefile Remove MULTI_CONSOLE_API flag and refe
Merge changes from topic "av/console-port" into integration
* changes: qemu: use new console interface in aarch32 warp7: remove old console from makefile Remove MULTI_CONSOLE_API flag and references to it Console: removed legacy console API
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| 5b6ebeec | 04-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.co
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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