| 2444d231 | 19-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(st-clock): use refcnt instead of secure status
Rework the internal functions __stm32mp1_clk_enable/disable to check for reference count instead of secure status for a clock. Some functions
refactor(st-clock): use refcnt instead of secure status
Rework the internal functions __stm32mp1_clk_enable/disable to check for reference count instead of secure status for a clock. Some functions now unused can be removed.
Change-Id: Ie4359110d7144229f85c961dcd5a019222c3fd25 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 0b1cfc29 | 27-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(st-ddr): add missing debug.h" into integration |
| 15ca2c5e | 19-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st-ddr): add missing debug.h
In a later patch, the stm32mp1_def.h will be reworked. The inclusion of common/debug.h may not be done there through another included file. Add this header inclusion
fix(st-ddr): add missing debug.h
In a later patch, the stm32mp1_def.h will be reworked. The inclusion of common/debug.h may not be done there through another included file. Add this header inclusion in the files that need it.
Change-Id: I83687f7910032ca38c0856796580a650e1e41a68 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 44fb470b | 07-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st-clock): correct types in error messages
Replace wrong %d with the correct types. This issue was found with the compilation flag: -Wformat-signedness
Change-Id: Iec3817a245f964ce444b59561b777
fix(st-clock): correct types in error messages
Replace wrong %d with the correct types. This issue was found with the compilation flag: -Wformat-signedness
Change-Id: Iec3817a245f964ce444b59561b777ce06c51a60a Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| b208e3da | 15-May-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
refactor(st-clock): directly use oscillator name
Instead of transmitting an 'enum stm32mp_osc_id', just send directly the clock name with a 'const char *'
Change-Id: I866b05cbb1685a9b9f80e63dcd5ba7
refactor(st-clock): directly use oscillator name
Instead of transmitting an 'enum stm32mp_osc_id', just send directly the clock name with a 'const char *'
Change-Id: I866b05cbb1685a9b9f80e63dcd5ba7b1d35fc932 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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| 31e9750b | 02-Jul-2019 |
Lionel Debieve <lionel.debieve@st.com> |
feat(st-clock): check HSE configuration in serial boot
In case of programmer mode, the bootrom manages to auto-detect HSE clock configuration. In order to detect a bad device tree setting in BL2, it
feat(st-clock): check HSE configuration in serial boot
In case of programmer mode, the bootrom manages to auto-detect HSE clock configuration. In order to detect a bad device tree setting in BL2, it will crash during programming if the configuration is not aligned with the auto-detection.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I230697695745d6282d14b1ebfa6e4c4caa0cd8e2
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| bcccdacc | 01-Jul-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
feat(st-clock): manage disabled oscillator
Support "disabled" status for oscillator in device tree.
At boot time, the clock tree initialization performs the following tasks: - enabling of the oscil
feat(st-clock): manage disabled oscillator
Support "disabled" status for oscillator in device tree.
At boot time, the clock tree initialization performs the following tasks: - enabling of the oscillators present in the device tree and not disabled, - disabling of the HSI oscillator if the node is absent or disabled (always activated by bootROM).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Change-Id: I176276022334f3d97ba0250b54062f0ae970e239
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| 964e5ff1 | 13-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-clock): improve DT parsing for PLL nodes
Add a function to get PLL settings from DT: "cfg" property is mandatory, an error is generated if not found. "frac" is optional, default value is
refactor(st-clock): improve DT parsing for PLL nodes
Add a function to get PLL settings from DT: "cfg" property is mandatory, an error is generated if not found. "frac" is optional, default value is returned if not found. "csg" is optional too, a boolean value indicates if it has been found, and its value is updated.
Store each PLL node validity information, this avoids parsing DT several times.
Change-Id: I039466fbe1e67d160f7112814e7bb63b661804d0 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| 63d21598 | 02-Mar-2021 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
refactor(st-ddr): move basic tests in a dedicated file
These basic tests are generic and should be used independently of the driver, depending on the plaftorm characteristics.
Change-Id: I38161b659
refactor(st-ddr): move basic tests in a dedicated file
These basic tests are generic and should be used independently of the driver, depending on the plaftorm characteristics.
Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
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| 06e55dc8 | 18-May-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-ddr): reorganize generic and specific elements
stm32mp_ddrctl structure contains DDRCTRL registers definitions. stm32mp_ddr_info contains general DDR information extracted from DT. stm32
refactor(st-ddr): reorganize generic and specific elements
stm32mp_ddrctl structure contains DDRCTRL registers definitions. stm32mp_ddr_info contains general DDR information extracted from DT. stm32mp_ddr_size moves to the generic side. stm32mp1_ddr_priv contains platform private data.
stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to retrieve data from DT. They are located in new generic c/h files in which stm32mp_ddr_param structure is declared. Platform makefile is updated.
Adapt driver with this new classification.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I4187376c9fff1a30e7a94407d188391547107997
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| 88f4fb8f | 17-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): allow configuration of DDR AXI ports number
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default. It will allow choosing single or dual AXI ports for DDR.
Change-Id
feat(stm32mp1): allow configuration of DDR AXI ports number
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default. It will allow choosing single or dual AXI ports for DDR.
Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| ba7d2e26 | 25-Feb-2019 |
Yann Gautier <yann.gautier@st.com> |
refactor(st-ddr): update parameter array initialization
Force alignment of the size of parameters array with the expected value by the binding. The registers dynamic structs are removed as not used
refactor(st-ddr): update parameter array initialization
Force alignment of the size of parameters array with the expected value by the binding. The registers dynamic structs are removed as not used in TF-A.
Change-Id: I7a41f355a435f54fbf23f468cca87c7f8f7e69e8 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 5def13eb | 10-Sep-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(st-ddr): add read valid training support
Add the read data eye training = training for optimal read valid placement (RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
Sig
feat(st-ddr): add read valid training support
Add the read data eye training = training for optimal read valid placement (RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I7ac1c77c21ebc30315b532741f2f255c2312d5b2
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| 26cf5cf6 | 30-Apr-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when
refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when built-in calibration is executed.
The calibration parameters were provided in the device tree by the optional node "st,phy-cal", activated in ddr helper file by the compilation flag DDR_PHY_CAL_SKIP and filled with values generated by CubeMX.
This patch - updates the binding file to remove "st,phy-cal" support - updates the device trees and remove the associated defines - simplifies the STM32MP1 DDR driver and remove the support of the optional "st,phy-cal"
After this patch the built-in calibration is always executed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
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| a078134e | 07-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st-ddr): correct DDR warnings
Replace %d with %u in logs, to avoid warning when -Wformat-signedness is enabled. And correct the order of includes.
Change-Id: I7c711a37fc1deceb8853831a8a09ae5042
fix(st-ddr): correct DDR warnings
Replace %d with %u in logs, to avoid warning when -Wformat-signedness is enabled. And correct the order of includes.
Change-Id: I7c711a37fc1deceb8853831a8a09ae50422859c9 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| d50e7a71 | 04-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st-sdmmc2): check regulator enable/disable return
The issue was reported by Coverity [1]. The return of the functions regulator_disable() and regulator_enable() was not checked. If they fail, th
fix(st-sdmmc2): check regulator enable/disable return
The issue was reported by Coverity [1]. The return of the functions regulator_disable() and regulator_enable() was not checked. If they fail, this means there is an issue either with PMIC or I2C. The board should the stop booting with a panic().
[1] https://scan4.scan.coverity.com/reports.htm#v47771/p11439/mergedDefectId=374565
Change-Id: If5dfd5643c210e03ae4b1f4cab0168c0db89f60e Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 93b153b5 | 23-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_regulator" into integration
* changes: feat(st-sdmmc2): manage cards power cycle feat(stm32mp1): register fixed regulator feat(st-drivers): introduce fixed regulat
Merge changes from topic "st_regulator" into integration
* changes: feat(st-sdmmc2): manage cards power cycle feat(stm32mp1): register fixed regulator feat(st-drivers): introduce fixed regulator driver refactor(st): update CPU and VDD voltage get refactor(stm32mp1-fdts): update regulator description refactor(st-pmic): use regulator framework for DDR init feat(st-pmic): register the PMIC to regulator framework refactor(st-pmic): split initialize_pmic() feat(stm32mp1): add regulator framework compilation feat(regulator): add a regulator framework feat(stpmic1): add new services feat(stpmic1): add USB OTG regulators refactor(st-pmic): improve driver usage refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean refactor(stm32mp1): re-order drivers init
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| 258bef91 | 10-May-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required. For this we need to: - disable vmmc-supply regulator - make the power cycle required for
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required. For this we need to: - disable vmmc-supply regulator - make the power cycle required for SDMMC2 peripheral - enable regulators
Change-Id: I2be6d9082d1cc4c864a82cf2c31ff8522e2d31a2 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 5d6a2646 | 20-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474 Signed-off-by: Pascal Paillet <p.pai
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474 Signed-off-by: Pascal Paillet <p.paillet@st.com>
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| 0ba71ac9 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31 Signed-off-by: Pascal Paillet <p.paillet
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31 Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 85fb175b | 27-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a Signed-off-by: Pascal Paillet <p.paillet@s
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| ae7792e0 | 18-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays regulator information if debug is enabled. It is under DEBUG flag and called after init
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays regulator information if debug is enabled. It is under DEBUG flag and called after initialize_pmic() in BL2.
Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| d5b4a2c4 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
feat(regulator): add a regulator framework
Add a regulator framework to: - provide an interface to consumers and drivers, - connect consumers with drivers, - handle most of devicetree-parsing, - han
feat(regulator): add a regulator framework
Add a regulator framework to: - provide an interface to consumers and drivers, - connect consumers with drivers, - handle most of devicetree-parsing, - handle always-on and boot-on regulators, - handle min/max voltages,
Change-Id: I23c939fdef2c71a416c44c9de332f70db0d2aa53 Signed-off-by: Pascal Paillet <p.paillet@st.com>
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| ea552bf5 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
feat(stpmic1): add new services
Add support for ICC, sink mode, bypass mode, active discharge and list voltages. Handle LDO3 sink source mode in a different way to avoid setting voltage while in sin
feat(stpmic1): add new services
Add support for ICC, sink mode, bypass mode, active discharge and list voltages. Handle LDO3 sink source mode in a different way to avoid setting voltage while in sink source mode.
Change-Id: Ib1b909fd8a153f542917f650e43e24317a570534 Signed-off-by: Pascal Paillet <p.paillet@st.com>
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| 13fbfe04 | 10-Jan-2020 |
Etienne Carriere <etienne.carriere@st.com> |
feat(stpmic1): add USB OTG regulators
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are needed since manipulated durin
feat(stpmic1): add USB OTG regulators
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are needed since manipulated during the suspend/resume power sequence as per FDT description for stm32mp15x-xxx boards from STMicroelectronics.
Change-Id: I6217de707e49882bd5a9100db43e0d354908800d Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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