1 /* 2 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <common/debug.h> 10 #include <drivers/delay_timer.h> 11 #include <drivers/st/stm32_i2c.h> 12 #include <drivers/st/stm32mp_pmic.h> 13 #include <drivers/st/stpmic1.h> 14 #include <lib/mmio.h> 15 #include <lib/utils_def.h> 16 #include <libfdt.h> 17 18 #include <platform_def.h> 19 20 #define PMIC_NODE_NOT_FOUND 1 21 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 22 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 23 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 24 #define STPMIC1_LDO3_DDR_SEL 31U 25 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 26 27 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 28 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 29 30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 31 32 static struct i2c_handle_s i2c_handle; 33 static uint32_t pmic_i2c_addr; 34 35 static int dt_get_pmic_node(void *fdt) 36 { 37 static int node = -FDT_ERR_BADOFFSET; 38 39 if (node == -FDT_ERR_BADOFFSET) { 40 node = fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 41 } 42 43 return node; 44 } 45 46 int dt_pmic_status(void) 47 { 48 static int status = -FDT_ERR_BADVALUE; 49 int node; 50 void *fdt; 51 52 if (status != -FDT_ERR_BADVALUE) { 53 return status; 54 } 55 56 if (fdt_get_address(&fdt) == 0) { 57 return -ENOENT; 58 } 59 60 node = dt_get_pmic_node(fdt); 61 if (node <= 0) { 62 status = -FDT_ERR_NOTFOUND; 63 64 return status; 65 } 66 67 status = (int)fdt_get_status(node); 68 69 return status; 70 } 71 72 static bool dt_pmic_is_secure(void) 73 { 74 int status = dt_pmic_status(); 75 76 return (status >= 0) && 77 (status == DT_SECURE) && 78 (i2c_handle.dt_status == DT_SECURE); 79 } 80 81 /* 82 * Get PMIC and its I2C bus configuration from the device tree. 83 * Return 0 on success, negative on error, 1 if no PMIC node is defined. 84 */ 85 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info, 86 struct stm32_i2c_init_s *init) 87 { 88 static int i2c_node = -FDT_ERR_NOTFOUND; 89 void *fdt; 90 91 if (fdt_get_address(&fdt) == 0) { 92 return -FDT_ERR_NOTFOUND; 93 } 94 95 if (i2c_node == -FDT_ERR_NOTFOUND) { 96 int pmic_node; 97 const fdt32_t *cuint; 98 99 pmic_node = dt_get_pmic_node(fdt); 100 if (pmic_node < 0) { 101 return PMIC_NODE_NOT_FOUND; 102 } 103 104 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 105 if (cuint == NULL) { 106 return -FDT_ERR_NOTFOUND; 107 } 108 109 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 110 if (pmic_i2c_addr > UINT16_MAX) { 111 return -FDT_ERR_BADVALUE; 112 } 113 114 i2c_node = fdt_parent_offset(fdt, pmic_node); 115 if (i2c_node < 0) { 116 return -FDT_ERR_NOTFOUND; 117 } 118 } 119 120 dt_fill_device_info(i2c_info, i2c_node); 121 if (i2c_info->base == 0U) { 122 return -FDT_ERR_NOTFOUND; 123 } 124 125 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init); 126 } 127 128 int dt_pmic_configure_boot_on_regulators(void) 129 { 130 int pmic_node, regulators_node, regulator_node; 131 void *fdt; 132 133 if (fdt_get_address(&fdt) == 0) { 134 return -ENOENT; 135 } 136 137 pmic_node = dt_get_pmic_node(fdt); 138 if (pmic_node < 0) { 139 return -FDT_ERR_NOTFOUND; 140 } 141 142 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 143 if (regulators_node < 0) { 144 return -ENOENT; 145 } 146 147 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 148 const fdt32_t *cuint; 149 const char *node_name = fdt_get_name(fdt, regulator_node, NULL); 150 uint16_t voltage; 151 int status; 152 153 #if defined(IMAGE_BL2) 154 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on", 155 NULL) == NULL) && 156 (fdt_getprop(fdt, regulator_node, "regulator-always-on", 157 NULL) == NULL)) { 158 #else 159 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 160 NULL) == NULL) { 161 #endif 162 continue; 163 } 164 165 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down", 166 NULL) != NULL) { 167 168 status = stpmic1_regulator_pull_down_set(node_name); 169 if (status != 0) { 170 return status; 171 } 172 } 173 174 if (fdt_getprop(fdt, regulator_node, "st,mask-reset", 175 NULL) != NULL) { 176 177 status = stpmic1_regulator_mask_reset_set(node_name); 178 if (status != 0) { 179 return status; 180 } 181 } 182 183 cuint = fdt_getprop(fdt, regulator_node, 184 "regulator-min-microvolt", NULL); 185 if (cuint == NULL) { 186 continue; 187 } 188 189 /* DT uses microvolts, whereas driver awaits millivolts */ 190 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 191 192 status = stpmic1_regulator_voltage_set(node_name, voltage); 193 if (status != 0) { 194 return status; 195 } 196 197 if (!stpmic1_is_regulator_enabled(node_name)) { 198 status = stpmic1_regulator_enable(node_name); 199 if (status != 0) { 200 return status; 201 } 202 } 203 } 204 205 return 0; 206 } 207 208 bool initialize_pmic_i2c(void) 209 { 210 int ret; 211 struct dt_node_info i2c_info; 212 struct i2c_handle_s *i2c = &i2c_handle; 213 struct stm32_i2c_init_s i2c_init; 214 215 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init); 216 if (ret < 0) { 217 ERROR("I2C configuration failed %d\n", ret); 218 panic(); 219 } 220 221 if (ret != 0) { 222 return false; 223 } 224 225 /* Initialize PMIC I2C */ 226 i2c->i2c_base_addr = i2c_info.base; 227 i2c->dt_status = i2c_info.status; 228 i2c->clock = i2c_info.clock; 229 i2c->i2c_state = I2C_STATE_RESET; 230 i2c_init.own_address1 = pmic_i2c_addr; 231 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 232 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 233 i2c_init.own_address2 = 0; 234 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 235 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 236 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 237 i2c_init.analog_filter = 1; 238 i2c_init.digital_filter_coef = 0; 239 240 ret = stm32_i2c_init(i2c, &i2c_init); 241 if (ret != 0) { 242 ERROR("Cannot initialize I2C %x (%d)\n", 243 i2c->i2c_base_addr, ret); 244 panic(); 245 } 246 247 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1, 248 I2C_TIMEOUT_BUSY_MS)) { 249 ERROR("I2C device not ready\n"); 250 panic(); 251 } 252 253 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr); 254 255 return true; 256 } 257 258 static void register_pmic_shared_peripherals(void) 259 { 260 uintptr_t i2c_base = i2c_handle.i2c_base_addr; 261 262 if (dt_pmic_is_secure()) { 263 stm32mp_register_secure_periph_iomem(i2c_base); 264 } else { 265 if (i2c_base != 0U) { 266 stm32mp_register_non_secure_periph_iomem(i2c_base); 267 } 268 } 269 } 270 271 void initialize_pmic(void) 272 { 273 if (!initialize_pmic_i2c()) { 274 VERBOSE("No PMIC\n"); 275 return; 276 } 277 278 register_pmic_shared_peripherals(); 279 280 if (dt_pmic_configure_boot_on_regulators() < 0) { 281 panic(); 282 }; 283 } 284 285 #if DEBUG 286 void print_pmic_info_and_debug(void) 287 { 288 unsigned long pmic_version; 289 290 if (stpmic1_get_version(&pmic_version) != 0) { 291 ERROR("Failed to access PMIC\n"); 292 panic(); 293 } 294 295 INFO("PMIC version = 0x%02lx\n", pmic_version); 296 stpmic1_dump_regulators(); 297 } 298 #endif 299 300 int pmic_ddr_power_init(enum ddr_type ddr_type) 301 { 302 bool buck3_at_1v8 = false; 303 uint8_t read_val; 304 int status; 305 306 switch (ddr_type) { 307 case STM32MP_DDR3: 308 /* Set LDO3 to sync mode */ 309 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 310 if (status != 0) { 311 return status; 312 } 313 314 read_val &= ~STPMIC1_LDO3_MODE; 315 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 316 read_val |= STPMIC1_LDO3_DDR_SEL << 317 STPMIC1_LDO12356_OUTPUT_SHIFT; 318 319 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 320 if (status != 0) { 321 return status; 322 } 323 324 status = stpmic1_regulator_voltage_set("buck2", 1350); 325 if (status != 0) { 326 return status; 327 } 328 329 status = stpmic1_regulator_enable("buck2"); 330 if (status != 0) { 331 return status; 332 } 333 334 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 335 336 status = stpmic1_regulator_enable("vref_ddr"); 337 if (status != 0) { 338 return status; 339 } 340 341 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 342 343 status = stpmic1_regulator_enable("ldo3"); 344 if (status != 0) { 345 return status; 346 } 347 348 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 349 break; 350 351 case STM32MP_LPDDR2: 352 case STM32MP_LPDDR3: 353 /* 354 * Set LDO3 to 1.8V 355 * Set LDO3 to bypass mode if BUCK3 = 1.8V 356 * Set LDO3 to normal mode if BUCK3 != 1.8V 357 */ 358 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 359 if (status != 0) { 360 return status; 361 } 362 363 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 364 buck3_at_1v8 = true; 365 } 366 367 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 368 if (status != 0) { 369 return status; 370 } 371 372 read_val &= ~STPMIC1_LDO3_MODE; 373 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 374 read_val |= STPMIC1_LDO3_1800000; 375 if (buck3_at_1v8) { 376 read_val |= STPMIC1_LDO3_MODE; 377 } 378 379 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 380 if (status != 0) { 381 return status; 382 } 383 384 status = stpmic1_regulator_voltage_set("buck2", 1200); 385 if (status != 0) { 386 return status; 387 } 388 389 status = stpmic1_regulator_enable("ldo3"); 390 if (status != 0) { 391 return status; 392 } 393 394 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 395 396 status = stpmic1_regulator_enable("buck2"); 397 if (status != 0) { 398 return status; 399 } 400 401 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 402 403 status = stpmic1_regulator_enable("vref_ddr"); 404 if (status != 0) { 405 return status; 406 } 407 408 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 409 break; 410 411 default: 412 break; 413 }; 414 415 return 0; 416 } 417