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Searched refs:_VPU_Read2Byte (Results 1 – 25 of 62) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/vpu/
H A DhalVPU.c345 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_CPUSetting()
366 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRst()
371 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_SwRst()
375 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRst()
393 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_SwRstRelse()
399 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRstRelse()
410 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_SwRelseMAU()
447 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX0_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
450 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY)&VPU_REG_HI_MBOX1_RDY)?FALSE:TRUE; in HAL_VPU_MBoxRdy()
453 bResult = (_VPU_Read2Byte(VPU_REG_RISC_MBOX_RDY)&VPU_REG_RISC_MBOX0_RDY)?TRUE:FALSE; in HAL_VPU_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/vpu_ex/
H A DhalVPU_EX.c1136 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1137 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1974 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
1975 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
1980 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2018 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
2023 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
2027 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2047 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/vpu_ex/
H A DhalVPU_EX.c1136 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1137 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1974 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
1975 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
1980 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2018 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
2023 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
2027 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2047 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/vpu_ex/
H A DhalVPU_EX.c1111 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1112 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
1885 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
1926 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRst()
1931 tempreg = _VPU_Read2Byte(VPU_REG_RESET); in HAL_VPU_EX_SwRst()
1935 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
1955 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRstRelse()
1961 tempreg1 = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRstRelse()
1972 tempreg = _VPU_Read2Byte(MAU1_CPU_RST); in HAL_VPU_EX_SwRelseMAU()
2009 bResult = (_VPU_Read2Byte(VPU_REG_HI_MBOX_RDY) & VPU_REG_HI_MBOX0_RDY) ? FALSE : TRUE; in HAL_VPU_EX_MBoxRdy()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c1345 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1346 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2429 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2469 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2488 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2489 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2494 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2509 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2513 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2519 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c1387 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1388 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2496 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2536 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2555 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2556 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2561 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2576 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2580 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2587 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c1345 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1346 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2430 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2470 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2489 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2490 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2495 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2510 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2514 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2520 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c1384 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1385 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2459 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2499 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2518 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2519 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2524 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2540 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2547 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
2564 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c1503 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1504 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2710 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2750 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2769 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2770 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)|0x20); in HAL_VPU_EX_IQMemSetDAMode()
2775 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& (~0x10)); in HAL_VPU_EX_IQMemSetDAMode()
2776 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)& (~0x20)); in HAL_VPU_EX_IQMemSetDAMode()
2791 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2795 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c1502 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1503 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2718 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2758 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2777 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2778 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)|0x20); in HAL_VPU_EX_IQMemSetDAMode()
2783 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& (~0x10)); in HAL_VPU_EX_IQMemSetDAMode()
2784 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)& (~0x20)); in HAL_VPU_EX_IQMemSetDAMode()
2800 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2804 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c1499 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1500 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2706 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2746 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2765 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2766 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)|0x20); in HAL_VPU_EX_IQMemSetDAMode()
2771 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& (~0x10)); in HAL_VPU_EX_IQMemSetDAMode()
2772 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)& (~0x20)); in HAL_VPU_EX_IQMemSetDAMode()
2787 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2791 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c1408 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1409 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2550 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2590 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2609 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2610 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2615 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2630 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2634 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2641 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c1426 if (((_VPU_Read2Byte(MAU1_ARB0_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE) in _VPU_EX_MAU_IDLE()
1427 && ((_VPU_Read2Byte(MAU1_ARB1_DBG0) & MAU1_FSM_CS_MASK) == MAU1_FSM_CS_IDLE)) in _VPU_EX_MAU_IDLE()
2568 MS_U16 r2_miu_sel = (_VPU_Read2Byte(VPU_REG_R2_MI_SEL_BASE) & 0xfff); in HAL_VPU_EX_CPUSetting()
2608 tempreg = _VPU_Read2Byte(VPU_REG_CONTROL_SET); in HAL_VPU_EX_CPUSetting()
2627 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)|0x10); in HAL_VPU_EX_IQMemSetDAMode()
2628 _VPU_Write2Byte(VPU_REG_QMEM_OWNER, _VPU_Read2Byte(VPU_REG_QMEM_OWNER)&0xFFDE); in HAL_VPU_EX_IQMemSetDAMode()
2633 _VPU_Write2Byte(VPU_REG_IQMEM_SETTING, _VPU_Read2Byte(VPU_REG_IQMEM_SETTING)& 0xFFEF); in HAL_VPU_EX_IQMemSetDAMode()
2648 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2652 tempreg = _VPU_Read2Byte(VPU_REG_CPU_SETTING); in HAL_VPU_EX_SwRst()
2659 tempreg1 = _VPU_Read2Byte(VPU_REG_DCU_DBG_SEL); in HAL_VPU_EX_SwRst()
[all …]

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