Home
last modified time | relevance | path

Searched refs:VBY1_CLK_TBL_ROW (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A DhalPNL.c144 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
362 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
383 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
404 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
426 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
H A DhalPNL.h299 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A DhalPNL.c144 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
362 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
383 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
404 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
426 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
H A DhalPNL.h299 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A DhalPNL.c158 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
4075 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
4096 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
4117 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
4139 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
H A DhalPNL.h307 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A DhalPNL.c147 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
528 while(u8Count1<VBY1_CLK_TBL_ROW);
549 while(u8Count1<VBY1_CLK_TBL_ROW);
570 while(u8Count1<VBY1_CLK_TBL_ROW);
592 while(u8Count1<VBY1_CLK_TBL_ROW);
H A DhalPNL.h303 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A DhalPNL.c148 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
529 while(u8Count1<VBY1_CLK_TBL_ROW);
550 while(u8Count1<VBY1_CLK_TBL_ROW);
571 while(u8Count1<VBY1_CLK_TBL_ROW);
593 while(u8Count1<VBY1_CLK_TBL_ROW);
H A DhalPNL.h311 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A DhalPNL.c148 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
529 while(u8Count1<VBY1_CLK_TBL_ROW);
550 while(u8Count1<VBY1_CLK_TBL_ROW);
571 while(u8Count1<VBY1_CLK_TBL_ROW);
593 while(u8Count1<VBY1_CLK_TBL_ROW);
H A DhalPNL.h311 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A DhalPNL.c962 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
5781 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5801 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5821 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5842 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
H A DhalPNL.h309 #define VBY1_CLK_TBL_ROW 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A DhalPNL.c966 MS_U8 LANE_AND_CLK_TBL[VBY1_CLK_TBL_ROW][3]=
5831 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5851 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5871 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
5892 while(u8Count1<VBY1_CLK_TBL_ROW); in _MHal_PNL_Set_Clk()
H A DhalPNL.h309 #define VBY1_CLK_TBL_ROW 4 macro