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Searched refs:REG_TZPC_NONPM_BASE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_dip.h99 #define REG_TZPC_NONPM_BASE 0x123900UL macro
100 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
101 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dip.c142 #define REG_TZPC_NONPM_BASE 0x123900UL macro
143 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
144 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/security/hal/mooney/aesdma/
H A DhalAESDMA.c126 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
165 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h162 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/macan/aesdma/
H A DhalAESDMA.c128 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
170 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h162 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/mainz/aesdma/
H A DhalAESDMA.c129 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
169 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h162 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/messi/aesdma/
H A DhalAESDMA.c129 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
169 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h162 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/maxim/aesdma/
H A DhalAESDMA.c126 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
169 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
/utopia/UTPA2-700.0.x/modules/security/hal/manhattan/aesdma/
H A DhalAESDMA.c126 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
169 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h164 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/M7621/aesdma/
H A DhalAESDMA.c126 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
169 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h164 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c149 #define REG_TZPC_NONPM_BASE 0x123900UL macro
150 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
151 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c148 #define REG_TZPC_NONPM_BASE 0x123900UL macro
149 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
150 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/security/hal/maserati/aesdma/
H A DhalAESDMA.c142 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
185 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h170 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/M7821/aesdma/
H A DhalAESDMA.c142 static REG_TZPCCtrl *_TZPCCtrl = (REG_TZPCCtrl*)REG_TZPC_NONPM_BASE;
185 _TZPCCtrl = (REG_TZPCCtrl*)(_u32RegBase + REG_TZPC_NONPM_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h170 #define REG_TZPC_NONPM_BASE 0x47200UL //(0x23900/2 + 0x00) * 4 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c153 #define REG_TZPC_NONPM_BASE 0x123900UL macro
154 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
155 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c153 #define REG_TZPC_NONPM_BASE 0x123900UL macro
154 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
155 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c153 #define REG_TZPC_NONPM_BASE 0x123900UL macro
154 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
155 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c157 #define REG_TZPC_NONPM_BASE 0x123900UL macro
158 #define REG_TZPC_NONPM_DIP (REG_TZPC_NONPM_BASE + (0x74<<1) )
159 #define REG_TZPC_NONPM_DWIN0 (REG_TZPC_NONPM_BASE + (0x79<<1) )

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