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Searched refs:REG_CLKGEN2_TSO1_IN (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c215 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
543 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()
544 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()
551 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()
552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()
724 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
730 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
825 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
829 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
2092 _u16TSOTopReg[0][4] = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN); in HAL_TSO_SaveRegs()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c217 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()
553 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()
560 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()
561 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()
745 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
751 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
846 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
850 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
2117 _u16TSOTopReg[0][4] = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN); in HAL_TSO_SaveRegs()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c217 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()
553 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()
560 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()
561 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()
745 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
751 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
846 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
850 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
2117 _u16TSOTopReg[0][4] = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN); in HAL_TSO_SaveRegs()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c215 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
543 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()
544 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()
551 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()
552 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()
724 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
730 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
825 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
829 …u16data = (TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
2092 _u16TSOTopReg[0][4] = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN); in HAL_TSO_SaveRegs()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DhalTSO.c209 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
484 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO1_IN_MASK; in HAL_TSO_PowerCtrl()
485 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN2_TSO2_IN_MASK; in HAL_TSO_PowerCtrl()
492 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO1_IN_DISABLE; in HAL_TSO_PowerCtrl()
493 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN2_TSO2_IN_DISABLE; in HAL_TSO_PowerCtrl()
689 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
695 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
777 …u16data = (TSO_CLKGEN0_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
781 …u16data = (TSO_CLKGEN0_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DhalTSO.c201 #define REG_CLKGEN2_TSO1_IN 0x10UL macro
661 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
667 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
749 …u16data = (TSO_CLKGEN0_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO1_IN_MASK) >> REG_CLKGEN2_TSO1_IN… in HAL_TSO_GetInputTSIF_Status()
753 …u16data = (TSO_CLKGEN0_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN2_TSO2_IN_MASK) >> REG_CLKGEN2_TSO2_IN… in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c157 #define REG_CLKGEN2_TSO1_IN 0x06 macro
428 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
469 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
2091 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2107 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c157 #define REG_CLKGEN2_TSO1_IN 0x06 macro
428 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
469 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
2091 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2107 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c157 #define REG_CLKGEN2_TSO1_IN 0x06 macro
428 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
472 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
2156 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2172 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c157 #define REG_CLKGEN2_TSO1_IN 0x06 macro
426 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
470 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
2162 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2178 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c158 #define REG_CLKGEN2_TSO1_IN 0x06 macro
429 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()
473 u16Reg = REG_CLKGEN2_TSO1_IN; in HAL_TSO_Set_InClk()
2154 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()
2170 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()