Home
last modified time | relevance | path

Searched refs:GOP_BIT2 (Results 1 – 25 of 49) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/gop/
H A DhalGOP.c337 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
347 u16Mask1 |= GOP_BIT2; in HAL_GOP_SetGOPACKMask()
388 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL_EX, GOP_BIT2 , GOP_BIT2); in HAL_GOP_SetGOPACK()
444 if(reg_val&GOP_BIT2) in HAL_GOP_GetGOPACK()
487 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, GOP_BIT2, GOP_BIT2); // SD data Enable in HAL_GOP_Init()
545 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
562 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1447 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1451 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1481 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
[all …]
H A DregGOP.h246 #define CKG_GOPG0_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
261 #define CKG_GOPMIXER_MASK (GOP_BIT4|GOP_BIT3 | GOP_BIT2)
280 #define CKG_GOPG2_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
296 #define CKG_GOPG4_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
311 #define CKG_SRAM1_DISABLE_CLK (GOP_BIT2)
313 #define CKG_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
319 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
327 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6/gop/
H A DhalGOP.c338 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
348 u16Mask1 |= GOP_BIT2; in HAL_GOP_SetGOPACKMask()
389 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL_EX, GOP_BIT2 , GOP_BIT2); in HAL_GOP_SetGOPACK()
445 if(reg_val&GOP_BIT2) in HAL_GOP_GetGOPACK()
492 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, GOP_BIT2, GOP_BIT2); // SD data Enable in HAL_GOP_Init()
550 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
567 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1453 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1457 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1487 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
[all …]
H A DregGOP.h246 #define CKG_GOPG0_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
261 #define CKG_GOPMIXER_MASK (GOP_BIT4|GOP_BIT3 | GOP_BIT2)
280 #define CKG_GOPG2_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
296 #define CKG_GOPG4_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
311 #define CKG_SRAM1_DISABLE_CLK (GOP_BIT2)
313 #define CKG_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
319 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
327 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/curry/gop/
H A DhalGOP.c326 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
481 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, GOP_BIT2, GOP_BIT2); // SD data Enable in HAL_GOP_Init()
497 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
498 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
543 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
557 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1397 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1401 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1431 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1435 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
[all …]
H A DregGOP.h246 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
263 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
269 #define CKG_GOPMIXER_MASK (GOP_BIT4|GOP_BIT3 | GOP_BIT2)
284 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
328 #define CKG_SRAM1_DISABLE_CLK (GOP_BIT2)
330 #define CKG_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
336 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
344 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/kano/gop/
H A DhalGOP.c321 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
483 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
484 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
531 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
545 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1411 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1415 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1445 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1449 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
2048 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MIXER_CTRL, 0x0, GOP_BIT2); //alpha mode: 0 bypass mode: 1 in HAL_GOP_MIXER_SetGOPEnable2Mixer()
[all …]
H A DregGOP.h245 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
262 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
268 #define CKG_GOPMIXER_MASK (GOP_BIT4|GOP_BIT3 | GOP_BIT2)
283 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
327 #define CKG_SRAM1_DISABLE_CLK (GOP_BIT2)
329 #define CKG_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
335 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
343 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/gop/
H A DhalGOP.c310 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
463 HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_H121, GOP_BIT2, GOP_BIT2); // SD data Enable in HAL_GOP_Init()
515 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
532 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1403 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1407 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_L, 0<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1437 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1441 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_VOP2BLENDING_H, 2<<1, GOP_BIT1|GOP_BIT2); in HAL_GOP_SetGOPEnable2SC()
1893 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_MIXER_CTRL, 0x0, GOP_BIT2); //alpha mode: 0 bypass mode: 1 in HAL_GOP_MIXER_SetGOPEnable2Mixer()
1924 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_VE_ENABLE_OSD, GOP_BIT2, GOP_BIT2); in HAL_GOP_MIXER_SetGOPEnable2Mixer()
[all …]
H A DregGOP.h234 #define CKG_GOPG0_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
244 #define CKG_GOPMIXER_MASK (GOP_BIT4|GOP_BIT3 | GOP_BIT2)
259 #define CKG_GOPG2_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
272 #define CKG_GOPG4_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
290 #define CKG_SRAM1_DISABLE_CLK (GOP_BIT2)
292 #define CKG_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
298 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
306 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/gop/
H A DregGOP.h228 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
242 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
255 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
274 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
301 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
309 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
H A DhalGOP.c431 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
654 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
655 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
697 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
717 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
2896 u16Val=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2898 u16enable=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
3099 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2); in HAL_GOP_PowerState()
3100 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2); in HAL_GOP_PowerState()
3153 …HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GW… in HAL_GOP_Set_GWIN_INTERNAL_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/gop/
H A DregGOP.h228 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
242 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
255 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
274 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
301 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
309 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
H A DhalGOP.c431 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
654 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
655 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
697 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
717 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
2896 u16Val=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2898 u16enable=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
3099 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2); in HAL_GOP_PowerState()
3100 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2); in HAL_GOP_PowerState()
3153 …HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GW… in HAL_GOP_Set_GWIN_INTERNAL_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/gop/
H A DregGOP.h227 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
241 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
254 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
273 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
300 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
308 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
H A DhalGOP.c503 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
739 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
740 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
782 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
802 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
2951 u16Val=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2953 u16enable=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
3154 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2); in HAL_GOP_PowerState()
3155 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2); in HAL_GOP_PowerState()
3208 …HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GW… in HAL_GOP_Set_GWIN_INTERNAL_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/gop/
H A DregGOP.h227 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
241 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
254 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
273 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
300 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
308 #define CKG_AFBCCLK_DISABLE_CLK_MASK (GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3)
H A DhalGOP.c503 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
739 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
740 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
782 …HAL_GOP_Write16Reg(pGOPHalLocal, GOP_AFBCCLK, CKG_AFBCCLK_432, GOP_BIT2|GOP_BIT3); //Clk… in HAL_GOP_Init()
802 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
2954 u16Val=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2956 u16enable=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
3157 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2); in HAL_GOP_PowerState()
3158 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2); in HAL_GOP_PowerState()
3211 …HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GW… in HAL_GOP_Set_GWIN_INTERNAL_MIU()
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/manhattan/gop/
H A DhalGOP.c319 if (u16GopMask&GOP_BIT2) in HAL_GOP_SetGOPACKMask()
455 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_SCALING, GOP_BIT2|GOP_BIT3 , GOP_REG_WORD_MASK); in HAL_GOP_Init()
456 HAL_GOP_Write16Reg(pGOPHalLocal, CKG_GOPG0_MG, 0, GOP_BIT2); in HAL_GOP_Init()
507 …HAL_GOP_Write16Reg(pGOPHalLocal, u32bankoff+GOP_4G_MIU_SEL, u8MIUSel<<2, GOP_BIT2|GOP_BIT3 );//GWI… in HAL_GOP_Init()
1836 u8Miu= (u16RegVal_L& (GOP_BIT2|GOP_BIT3)) >>2; in HAL_GOP_GetMIUDst()
2454 u16Val=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2456 u16enable=GOP_BIT2; in HAL_GOP_EnableScalingDownSram()
2657 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCMISC, pGOP_STRPrivate->XC_GopReg[10], GOP_BIT2); in HAL_GOP_PowerState()
2658 … HAL_GOP_Write16Reg(pGOPHalLocal, GOP_SC_OCALPHA, pGOP_STRPrivate->XC_GopReg[11], GOP_BIT2); in HAL_GOP_PowerState()
2694 …HAL_GOP_Write16Reg(pGOPHalLocal, u32BankOffSet+GOP_4G_MIU_SEL, miusel<<2, GOP_BIT2|GOP_BIT3 );//GW… in HAL_GOP_Set_GWIN_INTERNAL_MIU()
[all …]
H A DregGOP.h218 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
232 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
245 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
264 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
291 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/messi/gop/
H A DregGOP.h208 #define CKG_GOPG0_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
220 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
231 #define CKG_GOPG2_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
249 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
275 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/mainz/gop/
H A DregGOP.h208 #define CKG_GOPG0_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
220 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
231 #define CKG_GOPG2_MASK (GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
249 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
275 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/mooney/gop/
H A DregGOP.h205 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
218 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
230 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
247 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
273 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/hal/macan/gop/
H A DregGOP.h216 #define CKG_GOPG0_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
230 #define CKG_GOPG0_MG_MASK (GOP_BIT3 | GOP_BIT2)
243 #define CKG_GOPG2_MASK (GOP_BIT5 |GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
262 #define CKG_GOPG3_MASK (GOP_BIT5 | GOP_BIT4 | GOP_BIT3 | GOP_BIT2)
289 #define CKG_LB_SRAM1_MASK (GOP_BIT2|GOP_BIT3)
/utopia/UTPA2-700.0.x/modules/graphic/drv/gop/
H A DdrvGOP.c2550 …vLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x0,(GOP_BIT0|GOP_BIT1|GOP_BIT2)); // clear H/V… in MDrv_GOP_Init()
2594 … HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, GOP_BIT2, GOP_BIT2); in MDrv_GOP_Init()
3947 …, u32BankOffSet + GOP_4G_HVSTRCHMD, _GOP_MAP_DRVVscale2Reg_Emun(VStrchMode)<<2, GOP_BIT2|GOP_BIT3); in MDrv_GOP_GWIN_Set_VStretchMode()
4551 …Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), bEnable== TRUE?GOP_BIT2:0, GOP_BIT2); in MDrv_GOP_GWIN_SetVScroll()
5729 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, mode<<2, (GOP_BIT2|GOP_BIT3)); in MDrv_GOP_DWIN_SetUVSample()
6119 …OP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, (GOP_BIT2|GOP_BIT1|GOP_BIT0), (GOP_BIT2|GO… in MDrv_GOP_SetGOPBWStrength()
6126 …HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, (GOP_BIT2|GOP_BIT0), (GOP_BIT2|GOP_BI… in MDrv_GOP_SetGOPBWStrength()
6133 …HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, GOP_BIT1, (GOP_BIT2|GOP_BIT1|GOP_BIT0… in MDrv_GOP_SetGOPBWStrength()
6151 u16RegVal &= (GOP_BIT3|GOP_BIT2); in MDrv_GOP_GetGOPBWStrength()
6773 …nkOffSet+GOP_4G_YUV_SWAP, (((MS_U16)en3DOSDMode)<<1)|GOP_BIT0, GOP_BIT3|GOP_BIT2|GOP_BIT1|GOP_BIT0… in MDrv_GOP_Set3DOSD_Mode()
[all …]

12