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Searched refs:pl310 (Results 1 – 23 of 23) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dcache.c42 struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE; in v7_outer_cache_enable() local
51 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
58 setbits_le32(&pl310->pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE); in v7_outer_cache_enable()
69 writel(0x132, &pl310->pl310_tag_latency_ctrl); in v7_outer_cache_enable()
70 writel(0x132, &pl310->pl310_data_latency_ctrl); in v7_outer_cache_enable()
72 val = readl(&pl310->pl310_prefetch_ctrl); in v7_outer_cache_enable()
90 writel(val, &pl310->pl310_prefetch_ctrl); in v7_outer_cache_enable()
92 val = readl(&pl310->pl310_power_ctrl); in v7_outer_cache_enable()
95 writel(val, &pl310->pl310_power_ctrl); in v7_outer_cache_enable()
97 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
[all …]
/rk3399_rockchip-uboot/arch/arm/lib/
H A Dcache-pl310.c15 struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; variable
19 writel(0, &pl310->pl310_cache_sync); in pl310_cache_sync()
26 assoc_16 = readl(&pl310->pl310_aux_ctrl) & in pl310_background_op_all_ways()
44 pl310_background_op_all_ways(&pl310->pl310_inv_way); in v7_outer_cache_inval_all()
49 pl310_background_op_all_ways(&pl310->pl310_clean_inv_way); in v7_outer_cache_flush_all()
65 writel(pa, &pl310->pl310_clean_inv_line_pa); in v7_outer_cache_flush_range()
99 writel(pa, &pl310->pl310_inv_line_pa); in v7_outer_cache_inval_range()
H A DMakefile38 obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A Dmisc.c26 static const struct pl310_regs *const pl310 = variable
59 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
62 setbits_le32(&pl310->pl310_aux_ctrl, in v7_outer_cache_enable()
68 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
74 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()
H A Dspl.c32 static struct pl310_regs *const pl310 = variable
120 writel(0x1, &pl310->pl310_addr_filter_start); in board_init_f()
H A Dmisc_arria10.c34 static struct pl310_regs *const pl310 = variable
92 writel(0x1, &pl310->pl310_addr_filter_start); in arch_early_init_r()
H A Dmisc_gen5.c29 static struct pl310_regs *const pl310 = variable
276 writel(0x1, &pl310->pl310_addr_filter_start); in arch_early_init_r()
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/
H A Dcpu.c369 struct pl310_regs *const pl310 = in arch_cpu_init() local
397 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in arch_cpu_init()
560 struct pl310_regs *const pl310 = in v7_outer_cache_enable() local
577 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
583 struct pl310_regs *const pl310 = in v7_outer_cache_disable() local
586 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dzynq-7000.dtsi148 compatible = "arm,pl310-cache";
H A Drk3xxx.dtsi82 compatible = "arm,pl310-cache";
H A Darmada-38x.dtsi144 compatible = "arm,pl310-cache";
H A Dsocfpga.dtsi617 compatible = "arm,pl310-cache";
H A Darmada-375.dtsi177 compatible = "arm,pl310-cache";
H A Dtegra20.dtsi162 compatible = "arm,pl310-cache";
H A Dsocfpga_arria10.dtsi627 compatible = "arm,pl310-cache";
H A Dtegra30.dtsi247 compatible = "arm,pl310-cache";
H A Dimx6sll.dtsi170 compatible = "arm,pl310-cache";
H A Dimx6sl.dtsi119 compatible = "arm,pl310-cache";
H A Dstih407-family.dtsi89 compatible = "arm,pl310-cache";
H A Dam4372.dtsi64 compatible = "arm,pl310-cache";
H A Dimx6qdl.dtsi181 compatible = "arm,pl310-cache";
H A Dimx6sx.dtsi153 compatible = "arm,pl310-cache";
H A Dsama5d4.dtsi277 compatible = "arm,pl310-cache";