History log of /rk3399_rockchip-uboot/arch/arm/dts/socfpga.dtsi (Results 1 – 17 of 17)
Revision Date Author Comments
# c851a245 24-Aug-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-socfpga

Conflicts:
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig

Merged these by hand and re-ran savedefco

Merge git://git.denx.de/u-boot-socfpga

Conflicts:
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig

Merged these by hand and re-ran savedefconfig on them.

Signed-off-by: Tom Rini <trini@konsulko.com>

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# 660f53bc 10-Aug-2015 Marek Vasut <marex@denx.de>

arm: socfpga: dts: Add bank-name property to each GPIO bank

Add "bank-name" property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the "regulator-name"
prop

arm: socfpga: dts: Add bank-name property to each GPIO bank

Add "bank-name" property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the "regulator-name"
property for regulators.

Signed-off-by: Marek Vasut <marex@denx.de>

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# afe13993 02-Aug-2015 Marek Vasut <marex@denx.de>

arm: socfpga: Make the DT mmc node consistent

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the u

arm: socfpga: Make the DT mmc node consistent

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the useless mmc alias while at this.

Signed-off-by: Marek Vasut <marex@denx.de>

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# 2e8fcc7e 25-Jul-2015 Marek Vasut <marex@denx.de>

arm: dts: socfpga: Add mmc alias

Add alias for the SD/MMC controller, so it can be located by U-Boot OF support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.alte

arm: dts: socfpga: Add mmc alias

Add alias for the SD/MMC controller, so it can be located by U-Boot OF support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

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# b09b72d8 21-Jul-2015 Marek Vasut <marex@denx.de>

arm: dts: socfpga: Fix SPI aliases

The SPI aliases are completely wrong. First, they point to non-existing
/spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
ad-hoc string inste

arm: dts: socfpga: Fix SPI aliases

The SPI aliases are completely wrong. First, they point to non-existing
/spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
ad-hoc string instead of a handle. Furthermore, they are copied multiple
times in each board DTS.

So fix it such that we move these into socfpga.dtsi and make them use
the usual handles.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

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# f448c5d3 17-Jul-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 4905dfc6 14-Jul-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-spi


# 90a2f717 03-Jul-2015 Vikas Manocha <vikas.manocha@st.com>

spi: cadence_qspi: get sram size from device tree

sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device

spi: cadence_qspi: get sram size from device tree

sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device tree.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>

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# f10d86d3 08-Jan-2015 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-spi


# 653cda8f 31-Dec-2014 Marek Vasut <marex@denx.de>

dt: socfpga: Replace num-chipselect with num-cs

This optional DT property is called 'num-cs', so repair the misnomers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensourc

dt: socfpga: Replace num-chipselect with num-cs

This optional DT property is called 'num-cs', so repair the misnomers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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# 74114862 31-Dec-2014 Marek Vasut <marex@denx.de>

dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi

Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.

Signed-off-by:

dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi

Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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# 3bfbf32b 16-Dec-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# ae79e2d2 07-Nov-2014 Stefan Roese <sr@denx.de>

arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc:

arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>

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# 881f6a44 07-Nov-2014 Stefan Roese <sr@denx.de>

arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi

This DT node is taken from the Rocketboard.org Linux repsitory. And
is needed to enable (configure) the Cadence DM SPI driver.

Signed-off

arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi

This DT node is taken from the Rocketboard.org Linux repsitory. And
is needed to enable (configure) the Cadence DM SPI driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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# 5bf1f1ed 14-Nov-2014 Stefan Roese <sr@denx.de>

arm: socfpga: dts: Move to SPDX license identifiers

The socfpga dts files are copied from the Rocketboards.org repository.
In U-Boot we usually replace the full-blown license header text with
the SP

arm: socfpga: dts: Move to SPDX license identifiers

The socfpga dts files are copied from the Rocketboards.org repository.
In U-Boot we usually replace the full-blown license header text with
the SPDX license identifiers. Lets do this for these new dts files
as well.

I just forgot to do this while adding the DT support for socfpga.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>

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# c88eaea0 11-Nov-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# 51c580c6 07-Nov-2014 Stefan Roese <sr@denx.de>

arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the ne

arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
"socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
support.

Until this patch, the only SoCFPGA U-Boot target in mainline is
"socfpga_cyclone5". This build target is not (yet) changed to support
DT. So nothing changes for this target. Even though the long-term
goal should be to move all SoCFPGA targets over to DT.

One of the reasons to enable DT support in SoCFPGA is, that I need to
support multiple different SPI controllers for this platform. This is
the QSPI Cadence controller and the Designware SPI master controller.
Both are implemented in the SoCFPGA. And enabling both controllers is
only possible by using the new driver model (DM). The DM SPI code
only supports DT based probing. So it was easier to move SoCFPGA to
DT than to add the (deprecated) platform-data based probing to the
DM SPI suport.

Note that the image with the dtb embedded is u-boot-dtb.img. This needs
to be used now for those DT enabled boards instead of u-boot.img.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>

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