148038c4aSMugunthan V N/* 248038c4aSMugunthan V N * Device Tree Source for AM4372 SoC 348038c4aSMugunthan V N * 448038c4aSMugunthan V N * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 548038c4aSMugunthan V N * 648038c4aSMugunthan V N * This file is licensed under the terms of the GNU General Public License 748038c4aSMugunthan V N * version 2. This program is licensed "as is" without any warranty of any 848038c4aSMugunthan V N * kind, whether express or implied. 948038c4aSMugunthan V N */ 1048038c4aSMugunthan V N 1148038c4aSMugunthan V N#include <dt-bindings/gpio/gpio.h> 1248038c4aSMugunthan V N#include <dt-bindings/interrupt-controller/arm-gic.h> 1348038c4aSMugunthan V N 1448038c4aSMugunthan V N#include "skeleton.dtsi" 1548038c4aSMugunthan V N 1648038c4aSMugunthan V N/ { 1748038c4aSMugunthan V N compatible = "ti,am4372", "ti,am43"; 1848038c4aSMugunthan V N interrupt-parent = <&wakeupgen>; 1948038c4aSMugunthan V N 2048038c4aSMugunthan V N 2148038c4aSMugunthan V N aliases { 2248038c4aSMugunthan V N i2c0 = &i2c0; 2348038c4aSMugunthan V N i2c1 = &i2c1; 2448038c4aSMugunthan V N i2c2 = &i2c2; 2548038c4aSMugunthan V N serial0 = &uart0; 2648038c4aSMugunthan V N ethernet0 = &cpsw_emac0; 2748038c4aSMugunthan V N ethernet1 = &cpsw_emac1; 284fb01c44SMugunthan V N spi0 = &qspi; 2948038c4aSMugunthan V N }; 3048038c4aSMugunthan V N 3148038c4aSMugunthan V N cpus { 3248038c4aSMugunthan V N #address-cells = <1>; 3348038c4aSMugunthan V N #size-cells = <0>; 3448038c4aSMugunthan V N cpu: cpu@0 { 3548038c4aSMugunthan V N compatible = "arm,cortex-a9"; 3648038c4aSMugunthan V N device_type = "cpu"; 3748038c4aSMugunthan V N reg = <0>; 3848038c4aSMugunthan V N 3948038c4aSMugunthan V N clocks = <&dpll_mpu_ck>; 4048038c4aSMugunthan V N clock-names = "cpu"; 4148038c4aSMugunthan V N 4248038c4aSMugunthan V N clock-latency = <300000>; /* From omap-cpufreq driver */ 4348038c4aSMugunthan V N }; 4448038c4aSMugunthan V N }; 4548038c4aSMugunthan V N 4648038c4aSMugunthan V N gic: interrupt-controller@48241000 { 4748038c4aSMugunthan V N compatible = "arm,cortex-a9-gic"; 4848038c4aSMugunthan V N interrupt-controller; 4948038c4aSMugunthan V N #interrupt-cells = <3>; 5048038c4aSMugunthan V N reg = <0x48241000 0x1000>, 5148038c4aSMugunthan V N <0x48240100 0x0100>; 5248038c4aSMugunthan V N interrupt-parent = <&gic>; 5348038c4aSMugunthan V N }; 5448038c4aSMugunthan V N 5548038c4aSMugunthan V N wakeupgen: interrupt-controller@48281000 { 5648038c4aSMugunthan V N compatible = "ti,omap4-wugen-mpu"; 5748038c4aSMugunthan V N interrupt-controller; 5848038c4aSMugunthan V N #interrupt-cells = <3>; 5948038c4aSMugunthan V N reg = <0x48281000 0x1000>; 6048038c4aSMugunthan V N interrupt-parent = <&gic>; 6148038c4aSMugunthan V N }; 6248038c4aSMugunthan V N 6348038c4aSMugunthan V N l2-cache-controller@48242000 { 6448038c4aSMugunthan V N compatible = "arm,pl310-cache"; 6548038c4aSMugunthan V N reg = <0x48242000 0x1000>; 6648038c4aSMugunthan V N cache-unified; 6748038c4aSMugunthan V N cache-level = <2>; 6848038c4aSMugunthan V N }; 6948038c4aSMugunthan V N 7048038c4aSMugunthan V N ocp { 7148038c4aSMugunthan V N compatible = "ti,am4372-l3-noc", "simple-bus"; 7248038c4aSMugunthan V N #address-cells = <1>; 7348038c4aSMugunthan V N #size-cells = <1>; 7448038c4aSMugunthan V N ranges; 7548038c4aSMugunthan V N ti,hwmods = "l3_main"; 7648038c4aSMugunthan V N reg = <0x44000000 0x400000 7748038c4aSMugunthan V N 0x44800000 0x400000>; 7848038c4aSMugunthan V N interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 7948038c4aSMugunthan V N <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 8048038c4aSMugunthan V N 8148038c4aSMugunthan V N l4_wkup: l4_wkup@44c00000 { 8248038c4aSMugunthan V N compatible = "ti,am4-l4-wkup", "simple-bus"; 8348038c4aSMugunthan V N #address-cells = <1>; 8448038c4aSMugunthan V N #size-cells = <1>; 8548038c4aSMugunthan V N ranges = <0 0x44c00000 0x287000>; 8648038c4aSMugunthan V N 8748038c4aSMugunthan V N prcm: prcm@1f0000 { 8848038c4aSMugunthan V N compatible = "ti,am4-prcm"; 8948038c4aSMugunthan V N reg = <0x1f0000 0x11000>; 9048038c4aSMugunthan V N 9148038c4aSMugunthan V N prcm_clocks: clocks { 9248038c4aSMugunthan V N #address-cells = <1>; 9348038c4aSMugunthan V N #size-cells = <0>; 9448038c4aSMugunthan V N }; 9548038c4aSMugunthan V N 9648038c4aSMugunthan V N prcm_clockdomains: clockdomains { 9748038c4aSMugunthan V N }; 9848038c4aSMugunthan V N }; 9948038c4aSMugunthan V N 10048038c4aSMugunthan V N scm: scm@210000 { 10148038c4aSMugunthan V N compatible = "ti,am4-scm", "simple-bus"; 10248038c4aSMugunthan V N reg = <0x210000 0x4000>; 10348038c4aSMugunthan V N #address-cells = <1>; 10448038c4aSMugunthan V N #size-cells = <1>; 10548038c4aSMugunthan V N ranges = <0 0x210000 0x4000>; 10648038c4aSMugunthan V N 10748038c4aSMugunthan V N am43xx_pinmux: pinmux@800 { 10848038c4aSMugunthan V N compatible = "ti,am437-padconf", 10948038c4aSMugunthan V N "pinctrl-single"; 11048038c4aSMugunthan V N reg = <0x800 0x31c>; 11148038c4aSMugunthan V N #address-cells = <1>; 11248038c4aSMugunthan V N #size-cells = <0>; 11348038c4aSMugunthan V N #interrupt-cells = <1>; 11448038c4aSMugunthan V N interrupt-controller; 11548038c4aSMugunthan V N pinctrl-single,register-width = <32>; 11648038c4aSMugunthan V N pinctrl-single,function-mask = <0xffffffff>; 11748038c4aSMugunthan V N }; 11848038c4aSMugunthan V N 11948038c4aSMugunthan V N scm_conf: scm_conf@0 { 12048038c4aSMugunthan V N compatible = "syscon"; 12148038c4aSMugunthan V N reg = <0x0 0x800>; 12248038c4aSMugunthan V N #address-cells = <1>; 12348038c4aSMugunthan V N #size-cells = <1>; 12448038c4aSMugunthan V N 12548038c4aSMugunthan V N scm_clocks: clocks { 12648038c4aSMugunthan V N #address-cells = <1>; 12748038c4aSMugunthan V N #size-cells = <0>; 12848038c4aSMugunthan V N }; 12948038c4aSMugunthan V N }; 13048038c4aSMugunthan V N 13148038c4aSMugunthan V N scm_clockdomains: clockdomains { 13248038c4aSMugunthan V N }; 13348038c4aSMugunthan V N }; 13448038c4aSMugunthan V N }; 13548038c4aSMugunthan V N 13648038c4aSMugunthan V N emif: emif@4c000000 { 13748038c4aSMugunthan V N compatible = "ti,emif-am4372"; 13848038c4aSMugunthan V N reg = <0x4c000000 0x1000000>; 13948038c4aSMugunthan V N ti,hwmods = "emif"; 14048038c4aSMugunthan V N }; 14148038c4aSMugunthan V N 14248038c4aSMugunthan V N edma: edma@49000000 { 14348038c4aSMugunthan V N compatible = "ti,edma3"; 14448038c4aSMugunthan V N ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; 14548038c4aSMugunthan V N reg = <0x49000000 0x10000>, 14648038c4aSMugunthan V N <0x44e10f90 0x10>; 14748038c4aSMugunthan V N interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 14848038c4aSMugunthan V N <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 14948038c4aSMugunthan V N <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 15048038c4aSMugunthan V N #dma-cells = <1>; 15148038c4aSMugunthan V N }; 15248038c4aSMugunthan V N 15348038c4aSMugunthan V N uart0: serial@44e09000 { 15448038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 15548038c4aSMugunthan V N reg = <0x44e09000 0x2000>; 15685cf0e62SMugunthan V N reg-shift = <2>; 15748038c4aSMugunthan V N interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 15848038c4aSMugunthan V N ti,hwmods = "uart1"; 15948038c4aSMugunthan V N }; 16048038c4aSMugunthan V N 16148038c4aSMugunthan V N uart1: serial@48022000 { 16248038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 16348038c4aSMugunthan V N reg = <0x48022000 0x2000>; 16485cf0e62SMugunthan V N reg-shift = <2>; 16548038c4aSMugunthan V N interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 16648038c4aSMugunthan V N ti,hwmods = "uart2"; 16748038c4aSMugunthan V N status = "disabled"; 16848038c4aSMugunthan V N }; 16948038c4aSMugunthan V N 17048038c4aSMugunthan V N uart2: serial@48024000 { 17148038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 17248038c4aSMugunthan V N reg = <0x48024000 0x2000>; 17385cf0e62SMugunthan V N reg-shift = <2>; 17448038c4aSMugunthan V N interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 17548038c4aSMugunthan V N ti,hwmods = "uart3"; 17648038c4aSMugunthan V N status = "disabled"; 17748038c4aSMugunthan V N }; 17848038c4aSMugunthan V N 17948038c4aSMugunthan V N uart3: serial@481a6000 { 18048038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 18148038c4aSMugunthan V N reg = <0x481a6000 0x2000>; 18285cf0e62SMugunthan V N reg-shift = <2>; 18348038c4aSMugunthan V N interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 18448038c4aSMugunthan V N ti,hwmods = "uart4"; 18548038c4aSMugunthan V N status = "disabled"; 18648038c4aSMugunthan V N }; 18748038c4aSMugunthan V N 18848038c4aSMugunthan V N uart4: serial@481a8000 { 18948038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 19048038c4aSMugunthan V N reg = <0x481a8000 0x2000>; 19185cf0e62SMugunthan V N reg-shift = <2>; 19248038c4aSMugunthan V N interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 19348038c4aSMugunthan V N ti,hwmods = "uart5"; 19448038c4aSMugunthan V N status = "disabled"; 19548038c4aSMugunthan V N }; 19648038c4aSMugunthan V N 19748038c4aSMugunthan V N uart5: serial@481aa000 { 19848038c4aSMugunthan V N compatible = "ti,am4372-uart","ti,omap2-uart"; 19948038c4aSMugunthan V N reg = <0x481aa000 0x2000>; 20085cf0e62SMugunthan V N reg-shift = <2>; 20148038c4aSMugunthan V N interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 20248038c4aSMugunthan V N ti,hwmods = "uart6"; 20348038c4aSMugunthan V N status = "disabled"; 20448038c4aSMugunthan V N }; 20548038c4aSMugunthan V N 20648038c4aSMugunthan V N mailbox: mailbox@480C8000 { 20748038c4aSMugunthan V N compatible = "ti,omap4-mailbox"; 20848038c4aSMugunthan V N reg = <0x480C8000 0x200>; 20948038c4aSMugunthan V N interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 21048038c4aSMugunthan V N ti,hwmods = "mailbox"; 21148038c4aSMugunthan V N #mbox-cells = <1>; 21248038c4aSMugunthan V N ti,mbox-num-users = <4>; 21348038c4aSMugunthan V N ti,mbox-num-fifos = <8>; 21448038c4aSMugunthan V N mbox_wkupm3: wkup_m3 { 21548038c4aSMugunthan V N ti,mbox-tx = <0 0 0>; 21648038c4aSMugunthan V N ti,mbox-rx = <0 0 3>; 21748038c4aSMugunthan V N }; 21848038c4aSMugunthan V N }; 21948038c4aSMugunthan V N 22048038c4aSMugunthan V N timer1: timer@44e31000 { 22148038c4aSMugunthan V N compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 22248038c4aSMugunthan V N reg = <0x44e31000 0x400>; 22348038c4aSMugunthan V N interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 22448038c4aSMugunthan V N ti,timer-alwon; 22548038c4aSMugunthan V N ti,hwmods = "timer1"; 22648038c4aSMugunthan V N }; 22748038c4aSMugunthan V N 22848038c4aSMugunthan V N timer2: timer@48040000 { 22948038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 23048038c4aSMugunthan V N reg = <0x48040000 0x400>; 23148038c4aSMugunthan V N interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 23248038c4aSMugunthan V N ti,hwmods = "timer2"; 23348038c4aSMugunthan V N }; 23448038c4aSMugunthan V N 23548038c4aSMugunthan V N timer3: timer@48042000 { 23648038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 23748038c4aSMugunthan V N reg = <0x48042000 0x400>; 23848038c4aSMugunthan V N interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 23948038c4aSMugunthan V N ti,hwmods = "timer3"; 24048038c4aSMugunthan V N status = "disabled"; 24148038c4aSMugunthan V N }; 24248038c4aSMugunthan V N 24348038c4aSMugunthan V N timer4: timer@48044000 { 24448038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 24548038c4aSMugunthan V N reg = <0x48044000 0x400>; 24648038c4aSMugunthan V N interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 24748038c4aSMugunthan V N ti,timer-pwm; 24848038c4aSMugunthan V N ti,hwmods = "timer4"; 24948038c4aSMugunthan V N status = "disabled"; 25048038c4aSMugunthan V N }; 25148038c4aSMugunthan V N 25248038c4aSMugunthan V N timer5: timer@48046000 { 25348038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 25448038c4aSMugunthan V N reg = <0x48046000 0x400>; 25548038c4aSMugunthan V N interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 25648038c4aSMugunthan V N ti,timer-pwm; 25748038c4aSMugunthan V N ti,hwmods = "timer5"; 25848038c4aSMugunthan V N status = "disabled"; 25948038c4aSMugunthan V N }; 26048038c4aSMugunthan V N 26148038c4aSMugunthan V N timer6: timer@48048000 { 26248038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 26348038c4aSMugunthan V N reg = <0x48048000 0x400>; 26448038c4aSMugunthan V N interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 26548038c4aSMugunthan V N ti,timer-pwm; 26648038c4aSMugunthan V N ti,hwmods = "timer6"; 26748038c4aSMugunthan V N status = "disabled"; 26848038c4aSMugunthan V N }; 26948038c4aSMugunthan V N 27048038c4aSMugunthan V N timer7: timer@4804a000 { 27148038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 27248038c4aSMugunthan V N reg = <0x4804a000 0x400>; 27348038c4aSMugunthan V N interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 27448038c4aSMugunthan V N ti,timer-pwm; 27548038c4aSMugunthan V N ti,hwmods = "timer7"; 27648038c4aSMugunthan V N status = "disabled"; 27748038c4aSMugunthan V N }; 27848038c4aSMugunthan V N 27948038c4aSMugunthan V N timer8: timer@481c1000 { 28048038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 28148038c4aSMugunthan V N reg = <0x481c1000 0x400>; 28248038c4aSMugunthan V N interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 28348038c4aSMugunthan V N ti,hwmods = "timer8"; 28448038c4aSMugunthan V N status = "disabled"; 28548038c4aSMugunthan V N }; 28648038c4aSMugunthan V N 28748038c4aSMugunthan V N timer9: timer@4833d000 { 28848038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 28948038c4aSMugunthan V N reg = <0x4833d000 0x400>; 29048038c4aSMugunthan V N interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 29148038c4aSMugunthan V N ti,hwmods = "timer9"; 29248038c4aSMugunthan V N status = "disabled"; 29348038c4aSMugunthan V N }; 29448038c4aSMugunthan V N 29548038c4aSMugunthan V N timer10: timer@4833f000 { 29648038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 29748038c4aSMugunthan V N reg = <0x4833f000 0x400>; 29848038c4aSMugunthan V N interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 29948038c4aSMugunthan V N ti,hwmods = "timer10"; 30048038c4aSMugunthan V N status = "disabled"; 30148038c4aSMugunthan V N }; 30248038c4aSMugunthan V N 30348038c4aSMugunthan V N timer11: timer@48341000 { 30448038c4aSMugunthan V N compatible = "ti,am4372-timer","ti,am335x-timer"; 30548038c4aSMugunthan V N reg = <0x48341000 0x400>; 30648038c4aSMugunthan V N interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 30748038c4aSMugunthan V N ti,hwmods = "timer11"; 30848038c4aSMugunthan V N status = "disabled"; 30948038c4aSMugunthan V N }; 31048038c4aSMugunthan V N 31148038c4aSMugunthan V N counter32k: counter@44e86000 { 31248038c4aSMugunthan V N compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 31348038c4aSMugunthan V N reg = <0x44e86000 0x40>; 31448038c4aSMugunthan V N ti,hwmods = "counter_32k"; 31548038c4aSMugunthan V N }; 31648038c4aSMugunthan V N 31748038c4aSMugunthan V N rtc: rtc@44e3e000 { 31848038c4aSMugunthan V N compatible = "ti,am4372-rtc","ti,da830-rtc"; 31948038c4aSMugunthan V N reg = <0x44e3e000 0x1000>; 32048038c4aSMugunthan V N interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 32148038c4aSMugunthan V N GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 32248038c4aSMugunthan V N ti,hwmods = "rtc"; 32348038c4aSMugunthan V N status = "disabled"; 32448038c4aSMugunthan V N }; 32548038c4aSMugunthan V N 32648038c4aSMugunthan V N wdt: wdt@44e35000 { 32748038c4aSMugunthan V N compatible = "ti,am4372-wdt","ti,omap3-wdt"; 32848038c4aSMugunthan V N reg = <0x44e35000 0x1000>; 32948038c4aSMugunthan V N interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 33048038c4aSMugunthan V N ti,hwmods = "wd_timer2"; 33148038c4aSMugunthan V N }; 33248038c4aSMugunthan V N 33348038c4aSMugunthan V N gpio0: gpio@44e07000 { 33448038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 33548038c4aSMugunthan V N reg = <0x44e07000 0x1000>; 33648038c4aSMugunthan V N interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 33748038c4aSMugunthan V N gpio-controller; 33848038c4aSMugunthan V N #gpio-cells = <2>; 33948038c4aSMugunthan V N interrupt-controller; 34048038c4aSMugunthan V N #interrupt-cells = <2>; 34148038c4aSMugunthan V N ti,hwmods = "gpio1"; 34248038c4aSMugunthan V N status = "disabled"; 34348038c4aSMugunthan V N }; 34448038c4aSMugunthan V N 34548038c4aSMugunthan V N gpio1: gpio@4804c000 { 34648038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 34748038c4aSMugunthan V N reg = <0x4804c000 0x1000>; 34848038c4aSMugunthan V N interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 34948038c4aSMugunthan V N gpio-controller; 35048038c4aSMugunthan V N #gpio-cells = <2>; 35148038c4aSMugunthan V N interrupt-controller; 35248038c4aSMugunthan V N #interrupt-cells = <2>; 35348038c4aSMugunthan V N ti,hwmods = "gpio2"; 35448038c4aSMugunthan V N status = "disabled"; 35548038c4aSMugunthan V N }; 35648038c4aSMugunthan V N 35748038c4aSMugunthan V N gpio2: gpio@481ac000 { 35848038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 35948038c4aSMugunthan V N reg = <0x481ac000 0x1000>; 36048038c4aSMugunthan V N interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 36148038c4aSMugunthan V N gpio-controller; 36248038c4aSMugunthan V N #gpio-cells = <2>; 36348038c4aSMugunthan V N interrupt-controller; 36448038c4aSMugunthan V N #interrupt-cells = <2>; 36548038c4aSMugunthan V N ti,hwmods = "gpio3"; 36648038c4aSMugunthan V N status = "disabled"; 36748038c4aSMugunthan V N }; 36848038c4aSMugunthan V N 36948038c4aSMugunthan V N gpio3: gpio@481ae000 { 37048038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 37148038c4aSMugunthan V N reg = <0x481ae000 0x1000>; 37248038c4aSMugunthan V N interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 37348038c4aSMugunthan V N gpio-controller; 37448038c4aSMugunthan V N #gpio-cells = <2>; 37548038c4aSMugunthan V N interrupt-controller; 37648038c4aSMugunthan V N #interrupt-cells = <2>; 37748038c4aSMugunthan V N ti,hwmods = "gpio4"; 37848038c4aSMugunthan V N status = "disabled"; 37948038c4aSMugunthan V N }; 38048038c4aSMugunthan V N 38148038c4aSMugunthan V N gpio4: gpio@48320000 { 38248038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 38348038c4aSMugunthan V N reg = <0x48320000 0x1000>; 38448038c4aSMugunthan V N interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 38548038c4aSMugunthan V N gpio-controller; 38648038c4aSMugunthan V N #gpio-cells = <2>; 38748038c4aSMugunthan V N interrupt-controller; 38848038c4aSMugunthan V N #interrupt-cells = <2>; 38948038c4aSMugunthan V N ti,hwmods = "gpio5"; 39048038c4aSMugunthan V N status = "disabled"; 39148038c4aSMugunthan V N }; 39248038c4aSMugunthan V N 39348038c4aSMugunthan V N gpio5: gpio@48322000 { 39448038c4aSMugunthan V N compatible = "ti,am4372-gpio","ti,omap4-gpio"; 39548038c4aSMugunthan V N reg = <0x48322000 0x1000>; 39648038c4aSMugunthan V N interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 39748038c4aSMugunthan V N gpio-controller; 39848038c4aSMugunthan V N #gpio-cells = <2>; 39948038c4aSMugunthan V N interrupt-controller; 40048038c4aSMugunthan V N #interrupt-cells = <2>; 40148038c4aSMugunthan V N ti,hwmods = "gpio6"; 40248038c4aSMugunthan V N status = "disabled"; 40348038c4aSMugunthan V N }; 40448038c4aSMugunthan V N 40548038c4aSMugunthan V N hwspinlock: spinlock@480ca000 { 40648038c4aSMugunthan V N compatible = "ti,omap4-hwspinlock"; 40748038c4aSMugunthan V N reg = <0x480ca000 0x1000>; 40848038c4aSMugunthan V N ti,hwmods = "spinlock"; 40948038c4aSMugunthan V N #hwlock-cells = <1>; 41048038c4aSMugunthan V N }; 41148038c4aSMugunthan V N 41248038c4aSMugunthan V N i2c0: i2c@44e0b000 { 41348038c4aSMugunthan V N compatible = "ti,am4372-i2c","ti,omap4-i2c"; 41448038c4aSMugunthan V N reg = <0x44e0b000 0x1000>; 41548038c4aSMugunthan V N interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 41648038c4aSMugunthan V N ti,hwmods = "i2c1"; 41748038c4aSMugunthan V N #address-cells = <1>; 41848038c4aSMugunthan V N #size-cells = <0>; 41948038c4aSMugunthan V N status = "disabled"; 42048038c4aSMugunthan V N }; 42148038c4aSMugunthan V N 42248038c4aSMugunthan V N i2c1: i2c@4802a000 { 42348038c4aSMugunthan V N compatible = "ti,am4372-i2c","ti,omap4-i2c"; 42448038c4aSMugunthan V N reg = <0x4802a000 0x1000>; 42548038c4aSMugunthan V N interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 42648038c4aSMugunthan V N ti,hwmods = "i2c2"; 42748038c4aSMugunthan V N #address-cells = <1>; 42848038c4aSMugunthan V N #size-cells = <0>; 42948038c4aSMugunthan V N status = "disabled"; 43048038c4aSMugunthan V N }; 43148038c4aSMugunthan V N 43248038c4aSMugunthan V N i2c2: i2c@4819c000 { 43348038c4aSMugunthan V N compatible = "ti,am4372-i2c","ti,omap4-i2c"; 43448038c4aSMugunthan V N reg = <0x4819c000 0x1000>; 43548038c4aSMugunthan V N interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 43648038c4aSMugunthan V N ti,hwmods = "i2c3"; 43748038c4aSMugunthan V N #address-cells = <1>; 43848038c4aSMugunthan V N #size-cells = <0>; 43948038c4aSMugunthan V N status = "disabled"; 44048038c4aSMugunthan V N }; 44148038c4aSMugunthan V N 44248038c4aSMugunthan V N spi0: spi@48030000 { 44348038c4aSMugunthan V N compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 44448038c4aSMugunthan V N reg = <0x48030000 0x400>; 44548038c4aSMugunthan V N interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 44648038c4aSMugunthan V N ti,hwmods = "spi0"; 44748038c4aSMugunthan V N #address-cells = <1>; 44848038c4aSMugunthan V N #size-cells = <0>; 44948038c4aSMugunthan V N status = "disabled"; 45048038c4aSMugunthan V N }; 45148038c4aSMugunthan V N 45248038c4aSMugunthan V N mmc1: mmc@48060000 { 45348038c4aSMugunthan V N compatible = "ti,omap4-hsmmc"; 45448038c4aSMugunthan V N reg = <0x48060000 0x1000>; 45548038c4aSMugunthan V N ti,hwmods = "mmc1"; 45648038c4aSMugunthan V N ti,dual-volt; 45748038c4aSMugunthan V N ti,needs-special-reset; 45848038c4aSMugunthan V N dmas = <&edma 24 45948038c4aSMugunthan V N &edma 25>; 46048038c4aSMugunthan V N dma-names = "tx", "rx"; 46148038c4aSMugunthan V N interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 46248038c4aSMugunthan V N status = "disabled"; 46348038c4aSMugunthan V N }; 46448038c4aSMugunthan V N 46548038c4aSMugunthan V N mmc2: mmc@481d8000 { 46648038c4aSMugunthan V N compatible = "ti,omap4-hsmmc"; 46748038c4aSMugunthan V N reg = <0x481d8000 0x1000>; 46848038c4aSMugunthan V N ti,hwmods = "mmc2"; 46948038c4aSMugunthan V N ti,needs-special-reset; 47048038c4aSMugunthan V N dmas = <&edma 2 47148038c4aSMugunthan V N &edma 3>; 47248038c4aSMugunthan V N dma-names = "tx", "rx"; 47348038c4aSMugunthan V N interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 47448038c4aSMugunthan V N status = "disabled"; 47548038c4aSMugunthan V N }; 47648038c4aSMugunthan V N 47748038c4aSMugunthan V N mmc3: mmc@47810000 { 47848038c4aSMugunthan V N compatible = "ti,omap4-hsmmc"; 47948038c4aSMugunthan V N reg = <0x47810000 0x1000>; 48048038c4aSMugunthan V N ti,hwmods = "mmc3"; 48148038c4aSMugunthan V N ti,needs-special-reset; 48248038c4aSMugunthan V N interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 48348038c4aSMugunthan V N status = "disabled"; 48448038c4aSMugunthan V N }; 48548038c4aSMugunthan V N 48648038c4aSMugunthan V N spi1: spi@481a0000 { 48748038c4aSMugunthan V N compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 48848038c4aSMugunthan V N reg = <0x481a0000 0x400>; 48948038c4aSMugunthan V N interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 49048038c4aSMugunthan V N ti,hwmods = "spi1"; 49148038c4aSMugunthan V N #address-cells = <1>; 49248038c4aSMugunthan V N #size-cells = <0>; 49348038c4aSMugunthan V N status = "disabled"; 49448038c4aSMugunthan V N }; 49548038c4aSMugunthan V N 49648038c4aSMugunthan V N spi2: spi@481a2000 { 49748038c4aSMugunthan V N compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 49848038c4aSMugunthan V N reg = <0x481a2000 0x400>; 49948038c4aSMugunthan V N interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 50048038c4aSMugunthan V N ti,hwmods = "spi2"; 50148038c4aSMugunthan V N #address-cells = <1>; 50248038c4aSMugunthan V N #size-cells = <0>; 50348038c4aSMugunthan V N status = "disabled"; 50448038c4aSMugunthan V N }; 50548038c4aSMugunthan V N 50648038c4aSMugunthan V N spi3: spi@481a4000 { 50748038c4aSMugunthan V N compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 50848038c4aSMugunthan V N reg = <0x481a4000 0x400>; 50948038c4aSMugunthan V N interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 51048038c4aSMugunthan V N ti,hwmods = "spi3"; 51148038c4aSMugunthan V N #address-cells = <1>; 51248038c4aSMugunthan V N #size-cells = <0>; 51348038c4aSMugunthan V N status = "disabled"; 51448038c4aSMugunthan V N }; 51548038c4aSMugunthan V N 51648038c4aSMugunthan V N spi4: spi@48345000 { 51748038c4aSMugunthan V N compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 51848038c4aSMugunthan V N reg = <0x48345000 0x400>; 51948038c4aSMugunthan V N interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 52048038c4aSMugunthan V N ti,hwmods = "spi4"; 52148038c4aSMugunthan V N #address-cells = <1>; 52248038c4aSMugunthan V N #size-cells = <0>; 52348038c4aSMugunthan V N status = "disabled"; 52448038c4aSMugunthan V N }; 52548038c4aSMugunthan V N 52648038c4aSMugunthan V N mac: ethernet@4a100000 { 52748038c4aSMugunthan V N compatible = "ti,am4372-cpsw","ti,cpsw"; 52848038c4aSMugunthan V N reg = <0x4a100000 0x800 52948038c4aSMugunthan V N 0x4a101200 0x100>; 53048038c4aSMugunthan V N interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 53148038c4aSMugunthan V N GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 53248038c4aSMugunthan V N GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 53348038c4aSMugunthan V N GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 53448038c4aSMugunthan V N #address-cells = <1>; 53548038c4aSMugunthan V N #size-cells = <1>; 53648038c4aSMugunthan V N ti,hwmods = "cpgmac0"; 53748038c4aSMugunthan V N clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 53848038c4aSMugunthan V N clock-names = "fck", "cpts"; 53948038c4aSMugunthan V N status = "disabled"; 54048038c4aSMugunthan V N cpdma_channels = <8>; 54148038c4aSMugunthan V N ale_entries = <1024>; 54248038c4aSMugunthan V N bd_ram_size = <0x2000>; 54348038c4aSMugunthan V N no_bd_ram = <0>; 54448038c4aSMugunthan V N rx_descs = <64>; 54548038c4aSMugunthan V N mac_control = <0x20>; 54648038c4aSMugunthan V N slaves = <2>; 54748038c4aSMugunthan V N active_slave = <0>; 54848038c4aSMugunthan V N cpts_clock_mult = <0x80000000>; 54948038c4aSMugunthan V N cpts_clock_shift = <29>; 550*dcda79e1SMugunthan V N syscon = <&scm_conf>; 55148038c4aSMugunthan V N ranges; 55248038c4aSMugunthan V N 55348038c4aSMugunthan V N davinci_mdio: mdio@4a101000 { 55448038c4aSMugunthan V N compatible = "ti,am4372-mdio","ti,davinci_mdio"; 55548038c4aSMugunthan V N reg = <0x4a101000 0x100>; 55648038c4aSMugunthan V N #address-cells = <1>; 55748038c4aSMugunthan V N #size-cells = <0>; 55848038c4aSMugunthan V N ti,hwmods = "davinci_mdio"; 55948038c4aSMugunthan V N bus_freq = <1000000>; 56048038c4aSMugunthan V N status = "disabled"; 56148038c4aSMugunthan V N }; 56248038c4aSMugunthan V N 56348038c4aSMugunthan V N cpsw_emac0: slave@4a100200 { 56448038c4aSMugunthan V N /* Filled in by U-Boot */ 56548038c4aSMugunthan V N mac-address = [ 00 00 00 00 00 00 ]; 56648038c4aSMugunthan V N }; 56748038c4aSMugunthan V N 56848038c4aSMugunthan V N cpsw_emac1: slave@4a100300 { 56948038c4aSMugunthan V N /* Filled in by U-Boot */ 57048038c4aSMugunthan V N mac-address = [ 00 00 00 00 00 00 ]; 57148038c4aSMugunthan V N }; 57248038c4aSMugunthan V N 57348038c4aSMugunthan V N phy_sel: cpsw-phy-sel@44e10650 { 57448038c4aSMugunthan V N compatible = "ti,am43xx-cpsw-phy-sel"; 57548038c4aSMugunthan V N reg= <0x44e10650 0x4>; 57648038c4aSMugunthan V N reg-names = "gmii-sel"; 57748038c4aSMugunthan V N }; 57848038c4aSMugunthan V N }; 57948038c4aSMugunthan V N 58048038c4aSMugunthan V N epwmss0: epwmss@48300000 { 58148038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 58248038c4aSMugunthan V N reg = <0x48300000 0x10>; 58348038c4aSMugunthan V N #address-cells = <1>; 58448038c4aSMugunthan V N #size-cells = <1>; 58548038c4aSMugunthan V N ranges; 58648038c4aSMugunthan V N ti,hwmods = "epwmss0"; 58748038c4aSMugunthan V N status = "disabled"; 58848038c4aSMugunthan V N 58948038c4aSMugunthan V N ecap0: ecap@48300100 { 59048038c4aSMugunthan V N compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 59148038c4aSMugunthan V N #pwm-cells = <3>; 59248038c4aSMugunthan V N reg = <0x48300100 0x80>; 59348038c4aSMugunthan V N ti,hwmods = "ecap0"; 59448038c4aSMugunthan V N status = "disabled"; 59548038c4aSMugunthan V N }; 59648038c4aSMugunthan V N 59748038c4aSMugunthan V N ehrpwm0: ehrpwm@48300200 { 59848038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 59948038c4aSMugunthan V N #pwm-cells = <3>; 60048038c4aSMugunthan V N reg = <0x48300200 0x80>; 60148038c4aSMugunthan V N ti,hwmods = "ehrpwm0"; 60248038c4aSMugunthan V N status = "disabled"; 60348038c4aSMugunthan V N }; 60448038c4aSMugunthan V N }; 60548038c4aSMugunthan V N 60648038c4aSMugunthan V N epwmss1: epwmss@48302000 { 60748038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 60848038c4aSMugunthan V N reg = <0x48302000 0x10>; 60948038c4aSMugunthan V N #address-cells = <1>; 61048038c4aSMugunthan V N #size-cells = <1>; 61148038c4aSMugunthan V N ranges; 61248038c4aSMugunthan V N ti,hwmods = "epwmss1"; 61348038c4aSMugunthan V N status = "disabled"; 61448038c4aSMugunthan V N 61548038c4aSMugunthan V N ecap1: ecap@48302100 { 61648038c4aSMugunthan V N compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 61748038c4aSMugunthan V N #pwm-cells = <3>; 61848038c4aSMugunthan V N reg = <0x48302100 0x80>; 61948038c4aSMugunthan V N ti,hwmods = "ecap1"; 62048038c4aSMugunthan V N status = "disabled"; 62148038c4aSMugunthan V N }; 62248038c4aSMugunthan V N 62348038c4aSMugunthan V N ehrpwm1: ehrpwm@48302200 { 62448038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 62548038c4aSMugunthan V N #pwm-cells = <3>; 62648038c4aSMugunthan V N reg = <0x48302200 0x80>; 62748038c4aSMugunthan V N ti,hwmods = "ehrpwm1"; 62848038c4aSMugunthan V N status = "disabled"; 62948038c4aSMugunthan V N }; 63048038c4aSMugunthan V N }; 63148038c4aSMugunthan V N 63248038c4aSMugunthan V N epwmss2: epwmss@48304000 { 63348038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 63448038c4aSMugunthan V N reg = <0x48304000 0x10>; 63548038c4aSMugunthan V N #address-cells = <1>; 63648038c4aSMugunthan V N #size-cells = <1>; 63748038c4aSMugunthan V N ranges; 63848038c4aSMugunthan V N ti,hwmods = "epwmss2"; 63948038c4aSMugunthan V N status = "disabled"; 64048038c4aSMugunthan V N 64148038c4aSMugunthan V N ecap2: ecap@48304100 { 64248038c4aSMugunthan V N compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 64348038c4aSMugunthan V N #pwm-cells = <3>; 64448038c4aSMugunthan V N reg = <0x48304100 0x80>; 64548038c4aSMugunthan V N ti,hwmods = "ecap2"; 64648038c4aSMugunthan V N status = "disabled"; 64748038c4aSMugunthan V N }; 64848038c4aSMugunthan V N 64948038c4aSMugunthan V N ehrpwm2: ehrpwm@48304200 { 65048038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 65148038c4aSMugunthan V N #pwm-cells = <3>; 65248038c4aSMugunthan V N reg = <0x48304200 0x80>; 65348038c4aSMugunthan V N ti,hwmods = "ehrpwm2"; 65448038c4aSMugunthan V N status = "disabled"; 65548038c4aSMugunthan V N }; 65648038c4aSMugunthan V N }; 65748038c4aSMugunthan V N 65848038c4aSMugunthan V N epwmss3: epwmss@48306000 { 65948038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 66048038c4aSMugunthan V N reg = <0x48306000 0x10>; 66148038c4aSMugunthan V N #address-cells = <1>; 66248038c4aSMugunthan V N #size-cells = <1>; 66348038c4aSMugunthan V N ranges; 66448038c4aSMugunthan V N ti,hwmods = "epwmss3"; 66548038c4aSMugunthan V N status = "disabled"; 66648038c4aSMugunthan V N 66748038c4aSMugunthan V N ehrpwm3: ehrpwm@48306200 { 66848038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 66948038c4aSMugunthan V N #pwm-cells = <3>; 67048038c4aSMugunthan V N reg = <0x48306200 0x80>; 67148038c4aSMugunthan V N ti,hwmods = "ehrpwm3"; 67248038c4aSMugunthan V N status = "disabled"; 67348038c4aSMugunthan V N }; 67448038c4aSMugunthan V N }; 67548038c4aSMugunthan V N 67648038c4aSMugunthan V N epwmss4: epwmss@48308000 { 67748038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 67848038c4aSMugunthan V N reg = <0x48308000 0x10>; 67948038c4aSMugunthan V N #address-cells = <1>; 68048038c4aSMugunthan V N #size-cells = <1>; 68148038c4aSMugunthan V N ranges; 68248038c4aSMugunthan V N ti,hwmods = "epwmss4"; 68348038c4aSMugunthan V N status = "disabled"; 68448038c4aSMugunthan V N 68548038c4aSMugunthan V N ehrpwm4: ehrpwm@48308200 { 68648038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 68748038c4aSMugunthan V N #pwm-cells = <3>; 68848038c4aSMugunthan V N reg = <0x48308200 0x80>; 68948038c4aSMugunthan V N ti,hwmods = "ehrpwm4"; 69048038c4aSMugunthan V N status = "disabled"; 69148038c4aSMugunthan V N }; 69248038c4aSMugunthan V N }; 69348038c4aSMugunthan V N 69448038c4aSMugunthan V N epwmss5: epwmss@4830a000 { 69548038c4aSMugunthan V N compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 69648038c4aSMugunthan V N reg = <0x4830a000 0x10>; 69748038c4aSMugunthan V N #address-cells = <1>; 69848038c4aSMugunthan V N #size-cells = <1>; 69948038c4aSMugunthan V N ranges; 70048038c4aSMugunthan V N ti,hwmods = "epwmss5"; 70148038c4aSMugunthan V N status = "disabled"; 70248038c4aSMugunthan V N 70348038c4aSMugunthan V N ehrpwm5: ehrpwm@4830a200 { 70448038c4aSMugunthan V N compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 70548038c4aSMugunthan V N #pwm-cells = <3>; 70648038c4aSMugunthan V N reg = <0x4830a200 0x80>; 70748038c4aSMugunthan V N ti,hwmods = "ehrpwm5"; 70848038c4aSMugunthan V N status = "disabled"; 70948038c4aSMugunthan V N }; 71048038c4aSMugunthan V N }; 71148038c4aSMugunthan V N 71248038c4aSMugunthan V N tscadc: tscadc@44e0d000 { 71348038c4aSMugunthan V N compatible = "ti,am3359-tscadc"; 71448038c4aSMugunthan V N reg = <0x44e0d000 0x1000>; 71548038c4aSMugunthan V N ti,hwmods = "adc_tsc"; 71648038c4aSMugunthan V N interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 71748038c4aSMugunthan V N clocks = <&adc_tsc_fck>; 71848038c4aSMugunthan V N clock-names = "fck"; 71948038c4aSMugunthan V N status = "disabled"; 72048038c4aSMugunthan V N 72148038c4aSMugunthan V N tsc { 72248038c4aSMugunthan V N compatible = "ti,am3359-tsc"; 72348038c4aSMugunthan V N }; 72448038c4aSMugunthan V N 72548038c4aSMugunthan V N adc { 72648038c4aSMugunthan V N #io-channel-cells = <1>; 72748038c4aSMugunthan V N compatible = "ti,am3359-adc"; 72848038c4aSMugunthan V N }; 72948038c4aSMugunthan V N 73048038c4aSMugunthan V N }; 73148038c4aSMugunthan V N 73248038c4aSMugunthan V N sham: sham@53100000 { 73348038c4aSMugunthan V N compatible = "ti,omap5-sham"; 73448038c4aSMugunthan V N ti,hwmods = "sham"; 73548038c4aSMugunthan V N reg = <0x53100000 0x300>; 73648038c4aSMugunthan V N dmas = <&edma 36>; 73748038c4aSMugunthan V N dma-names = "rx"; 73848038c4aSMugunthan V N interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 73948038c4aSMugunthan V N }; 74048038c4aSMugunthan V N 74148038c4aSMugunthan V N aes: aes@53501000 { 74248038c4aSMugunthan V N compatible = "ti,omap4-aes"; 74348038c4aSMugunthan V N ti,hwmods = "aes"; 74448038c4aSMugunthan V N reg = <0x53501000 0xa0>; 74548038c4aSMugunthan V N interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 74648038c4aSMugunthan V N dmas = <&edma 6 74748038c4aSMugunthan V N &edma 5>; 74848038c4aSMugunthan V N dma-names = "tx", "rx"; 74948038c4aSMugunthan V N }; 75048038c4aSMugunthan V N 75148038c4aSMugunthan V N des: des@53701000 { 75248038c4aSMugunthan V N compatible = "ti,omap4-des"; 75348038c4aSMugunthan V N ti,hwmods = "des"; 75448038c4aSMugunthan V N reg = <0x53701000 0xa0>; 75548038c4aSMugunthan V N interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 75648038c4aSMugunthan V N dmas = <&edma 34 75748038c4aSMugunthan V N &edma 33>; 75848038c4aSMugunthan V N dma-names = "tx", "rx"; 75948038c4aSMugunthan V N }; 76048038c4aSMugunthan V N 76148038c4aSMugunthan V N mcasp0: mcasp@48038000 { 76248038c4aSMugunthan V N compatible = "ti,am33xx-mcasp-audio"; 76348038c4aSMugunthan V N ti,hwmods = "mcasp0"; 76448038c4aSMugunthan V N reg = <0x48038000 0x2000>, 76548038c4aSMugunthan V N <0x46000000 0x400000>; 76648038c4aSMugunthan V N reg-names = "mpu", "dat"; 76748038c4aSMugunthan V N interrupts = <80>, <81>; 76848038c4aSMugunthan V N interrupt-names = "tx", "rx"; 76948038c4aSMugunthan V N status = "disabled"; 77048038c4aSMugunthan V N dmas = <&edma 8>, 77148038c4aSMugunthan V N <&edma 9>; 77248038c4aSMugunthan V N dma-names = "tx", "rx"; 77348038c4aSMugunthan V N }; 77448038c4aSMugunthan V N 77548038c4aSMugunthan V N mcasp1: mcasp@4803C000 { 77648038c4aSMugunthan V N compatible = "ti,am33xx-mcasp-audio"; 77748038c4aSMugunthan V N ti,hwmods = "mcasp1"; 77848038c4aSMugunthan V N reg = <0x4803C000 0x2000>, 77948038c4aSMugunthan V N <0x46400000 0x400000>; 78048038c4aSMugunthan V N reg-names = "mpu", "dat"; 78148038c4aSMugunthan V N interrupts = <82>, <83>; 78248038c4aSMugunthan V N interrupt-names = "tx", "rx"; 78348038c4aSMugunthan V N status = "disabled"; 78448038c4aSMugunthan V N dmas = <&edma 10>, 78548038c4aSMugunthan V N <&edma 11>; 78648038c4aSMugunthan V N dma-names = "tx", "rx"; 78748038c4aSMugunthan V N }; 78848038c4aSMugunthan V N 78948038c4aSMugunthan V N elm: elm@48080000 { 79048038c4aSMugunthan V N compatible = "ti,am3352-elm"; 79148038c4aSMugunthan V N reg = <0x48080000 0x2000>; 79248038c4aSMugunthan V N interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 79348038c4aSMugunthan V N ti,hwmods = "elm"; 79448038c4aSMugunthan V N clocks = <&l4ls_gclk>; 79548038c4aSMugunthan V N clock-names = "fck"; 79648038c4aSMugunthan V N status = "disabled"; 79748038c4aSMugunthan V N }; 79848038c4aSMugunthan V N 79948038c4aSMugunthan V N gpmc: gpmc@50000000 { 80048038c4aSMugunthan V N compatible = "ti,am3352-gpmc"; 80148038c4aSMugunthan V N ti,hwmods = "gpmc"; 80248038c4aSMugunthan V N clocks = <&l3s_gclk>; 80348038c4aSMugunthan V N clock-names = "fck"; 80448038c4aSMugunthan V N reg = <0x50000000 0x2000>; 80548038c4aSMugunthan V N interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 80648038c4aSMugunthan V N gpmc,num-cs = <7>; 80748038c4aSMugunthan V N gpmc,num-waitpins = <2>; 80848038c4aSMugunthan V N #address-cells = <2>; 80948038c4aSMugunthan V N #size-cells = <1>; 81048038c4aSMugunthan V N status = "disabled"; 81148038c4aSMugunthan V N }; 81248038c4aSMugunthan V N 81348038c4aSMugunthan V N am43xx_control_usb2phy1: control-phy@44e10620 { 81448038c4aSMugunthan V N compatible = "ti,control-phy-usb2-am437"; 81548038c4aSMugunthan V N reg = <0x44e10620 0x4>; 81648038c4aSMugunthan V N reg-names = "power"; 81748038c4aSMugunthan V N }; 81848038c4aSMugunthan V N 81948038c4aSMugunthan V N am43xx_control_usb2phy2: control-phy@0x44e10628 { 82048038c4aSMugunthan V N compatible = "ti,control-phy-usb2-am437"; 82148038c4aSMugunthan V N reg = <0x44e10628 0x4>; 82248038c4aSMugunthan V N reg-names = "power"; 82348038c4aSMugunthan V N }; 82448038c4aSMugunthan V N 82548038c4aSMugunthan V N ocp2scp0: ocp2scp@483a8000 { 82648038c4aSMugunthan V N compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 82748038c4aSMugunthan V N #address-cells = <1>; 82848038c4aSMugunthan V N #size-cells = <1>; 82948038c4aSMugunthan V N ranges; 83048038c4aSMugunthan V N ti,hwmods = "ocp2scp0"; 83148038c4aSMugunthan V N 83248038c4aSMugunthan V N usb2_phy1: phy@483a8000 { 83348038c4aSMugunthan V N compatible = "ti,am437x-usb2"; 83448038c4aSMugunthan V N reg = <0x483a8000 0x8000>; 83548038c4aSMugunthan V N ctrl-module = <&am43xx_control_usb2phy1>; 83648038c4aSMugunthan V N clocks = <&usb_phy0_always_on_clk32k>, 83748038c4aSMugunthan V N <&usb_otg_ss0_refclk960m>; 83848038c4aSMugunthan V N clock-names = "wkupclk", "refclk"; 83948038c4aSMugunthan V N #phy-cells = <0>; 84048038c4aSMugunthan V N status = "disabled"; 84148038c4aSMugunthan V N }; 84248038c4aSMugunthan V N }; 84348038c4aSMugunthan V N 84448038c4aSMugunthan V N ocp2scp1: ocp2scp@483e8000 { 84548038c4aSMugunthan V N compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 84648038c4aSMugunthan V N #address-cells = <1>; 84748038c4aSMugunthan V N #size-cells = <1>; 84848038c4aSMugunthan V N ranges; 84948038c4aSMugunthan V N ti,hwmods = "ocp2scp1"; 85048038c4aSMugunthan V N 85148038c4aSMugunthan V N usb2_phy2: phy@483e8000 { 85248038c4aSMugunthan V N compatible = "ti,am437x-usb2"; 85348038c4aSMugunthan V N reg = <0x483e8000 0x8000>; 85448038c4aSMugunthan V N ctrl-module = <&am43xx_control_usb2phy2>; 85548038c4aSMugunthan V N clocks = <&usb_phy1_always_on_clk32k>, 85648038c4aSMugunthan V N <&usb_otg_ss1_refclk960m>; 85748038c4aSMugunthan V N clock-names = "wkupclk", "refclk"; 85848038c4aSMugunthan V N #phy-cells = <0>; 85948038c4aSMugunthan V N status = "disabled"; 86048038c4aSMugunthan V N }; 86148038c4aSMugunthan V N }; 86248038c4aSMugunthan V N 86348038c4aSMugunthan V N dwc3_1: omap_dwc3@48380000 { 86448038c4aSMugunthan V N compatible = "ti,am437x-dwc3"; 86548038c4aSMugunthan V N ti,hwmods = "usb_otg_ss0"; 86648038c4aSMugunthan V N reg = <0x48380000 0x10000>; 86748038c4aSMugunthan V N interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 86848038c4aSMugunthan V N #address-cells = <1>; 86948038c4aSMugunthan V N #size-cells = <1>; 87048038c4aSMugunthan V N utmi-mode = <1>; 87148038c4aSMugunthan V N ranges; 87248038c4aSMugunthan V N 87348038c4aSMugunthan V N usb1: usb@48390000 { 87448038c4aSMugunthan V N compatible = "synopsys,dwc3"; 87548038c4aSMugunthan V N reg = <0x48390000 0x10000>; 87648038c4aSMugunthan V N interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 87748038c4aSMugunthan V N phys = <&usb2_phy1>; 87848038c4aSMugunthan V N phy-names = "usb2-phy"; 87948038c4aSMugunthan V N maximum-speed = "high-speed"; 88048038c4aSMugunthan V N dr_mode = "otg"; 88148038c4aSMugunthan V N status = "disabled"; 88248038c4aSMugunthan V N snps,dis_u3_susphy_quirk; 88348038c4aSMugunthan V N snps,dis_u2_susphy_quirk; 88448038c4aSMugunthan V N }; 88548038c4aSMugunthan V N }; 88648038c4aSMugunthan V N 88748038c4aSMugunthan V N dwc3_2: omap_dwc3@483c0000 { 88848038c4aSMugunthan V N compatible = "ti,am437x-dwc3"; 88948038c4aSMugunthan V N ti,hwmods = "usb_otg_ss1"; 89048038c4aSMugunthan V N reg = <0x483c0000 0x10000>; 89148038c4aSMugunthan V N interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 89248038c4aSMugunthan V N #address-cells = <1>; 89348038c4aSMugunthan V N #size-cells = <1>; 89448038c4aSMugunthan V N utmi-mode = <1>; 89548038c4aSMugunthan V N ranges; 89648038c4aSMugunthan V N 89748038c4aSMugunthan V N usb2: usb@483d0000 { 89848038c4aSMugunthan V N compatible = "synopsys,dwc3"; 89948038c4aSMugunthan V N reg = <0x483d0000 0x10000>; 90048038c4aSMugunthan V N interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 90148038c4aSMugunthan V N phys = <&usb2_phy2>; 90248038c4aSMugunthan V N phy-names = "usb2-phy"; 90348038c4aSMugunthan V N maximum-speed = "high-speed"; 90448038c4aSMugunthan V N dr_mode = "otg"; 90548038c4aSMugunthan V N status = "disabled"; 90648038c4aSMugunthan V N snps,dis_u3_susphy_quirk; 90748038c4aSMugunthan V N snps,dis_u2_susphy_quirk; 90848038c4aSMugunthan V N }; 90948038c4aSMugunthan V N }; 91048038c4aSMugunthan V N 91148038c4aSMugunthan V N qspi: qspi@47900000 { 91248038c4aSMugunthan V N compatible = "ti,am4372-qspi"; 9134fb01c44SMugunthan V N reg = <0x47900000 0x100>, 9144fb01c44SMugunthan V N <0x30000000 0x4000000>; 9154fb01c44SMugunthan V N reg-names = "qspi_base", "qspi_mmap"; 91648038c4aSMugunthan V N #address-cells = <1>; 91748038c4aSMugunthan V N #size-cells = <0>; 91848038c4aSMugunthan V N ti,hwmods = "qspi"; 91948038c4aSMugunthan V N interrupts = <0 138 0x4>; 92048038c4aSMugunthan V N num-cs = <4>; 92148038c4aSMugunthan V N status = "disabled"; 92248038c4aSMugunthan V N }; 92348038c4aSMugunthan V N 92448038c4aSMugunthan V N hdq: hdq@48347000 { 92548038c4aSMugunthan V N compatible = "ti,am4372-hdq"; 92648038c4aSMugunthan V N reg = <0x48347000 0x1000>; 92748038c4aSMugunthan V N interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 92848038c4aSMugunthan V N clocks = <&func_12m_clk>; 92948038c4aSMugunthan V N clock-names = "fck"; 93048038c4aSMugunthan V N ti,hwmods = "hdq1w"; 93148038c4aSMugunthan V N status = "disabled"; 93248038c4aSMugunthan V N }; 93348038c4aSMugunthan V N 93448038c4aSMugunthan V N dss: dss@4832a000 { 93548038c4aSMugunthan V N compatible = "ti,omap3-dss"; 93648038c4aSMugunthan V N reg = <0x4832a000 0x200>; 93748038c4aSMugunthan V N status = "disabled"; 93848038c4aSMugunthan V N ti,hwmods = "dss_core"; 93948038c4aSMugunthan V N clocks = <&disp_clk>; 94048038c4aSMugunthan V N clock-names = "fck"; 94148038c4aSMugunthan V N #address-cells = <1>; 94248038c4aSMugunthan V N #size-cells = <1>; 94348038c4aSMugunthan V N ranges; 94448038c4aSMugunthan V N 94548038c4aSMugunthan V N dispc: dispc@4832a400 { 94648038c4aSMugunthan V N compatible = "ti,omap3-dispc"; 94748038c4aSMugunthan V N reg = <0x4832a400 0x400>; 94848038c4aSMugunthan V N interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 94948038c4aSMugunthan V N ti,hwmods = "dss_dispc"; 95048038c4aSMugunthan V N clocks = <&disp_clk>; 95148038c4aSMugunthan V N clock-names = "fck"; 95248038c4aSMugunthan V N }; 95348038c4aSMugunthan V N 95448038c4aSMugunthan V N rfbi: rfbi@4832a800 { 95548038c4aSMugunthan V N compatible = "ti,omap3-rfbi"; 95648038c4aSMugunthan V N reg = <0x4832a800 0x100>; 95748038c4aSMugunthan V N ti,hwmods = "dss_rfbi"; 95848038c4aSMugunthan V N clocks = <&disp_clk>; 95948038c4aSMugunthan V N clock-names = "fck"; 96048038c4aSMugunthan V N status = "disabled"; 96148038c4aSMugunthan V N }; 96248038c4aSMugunthan V N }; 96348038c4aSMugunthan V N 96448038c4aSMugunthan V N ocmcram: ocmcram@40300000 { 96548038c4aSMugunthan V N compatible = "mmio-sram"; 96648038c4aSMugunthan V N reg = <0x40300000 0x40000>; /* 256k */ 96748038c4aSMugunthan V N }; 96848038c4aSMugunthan V N 96948038c4aSMugunthan V N dcan0: can@481cc000 { 97048038c4aSMugunthan V N compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 97148038c4aSMugunthan V N ti,hwmods = "d_can0"; 97248038c4aSMugunthan V N clocks = <&dcan0_fck>; 97348038c4aSMugunthan V N clock-names = "fck"; 97448038c4aSMugunthan V N reg = <0x481cc000 0x2000>; 97548038c4aSMugunthan V N syscon-raminit = <&scm_conf 0x644 0>; 97648038c4aSMugunthan V N interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 97748038c4aSMugunthan V N status = "disabled"; 97848038c4aSMugunthan V N }; 97948038c4aSMugunthan V N 98048038c4aSMugunthan V N dcan1: can@481d0000 { 98148038c4aSMugunthan V N compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 98248038c4aSMugunthan V N ti,hwmods = "d_can1"; 98348038c4aSMugunthan V N clocks = <&dcan1_fck>; 98448038c4aSMugunthan V N clock-names = "fck"; 98548038c4aSMugunthan V N reg = <0x481d0000 0x2000>; 98648038c4aSMugunthan V N syscon-raminit = <&scm_conf 0x644 1>; 98748038c4aSMugunthan V N interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 98848038c4aSMugunthan V N status = "disabled"; 98948038c4aSMugunthan V N }; 99048038c4aSMugunthan V N 99148038c4aSMugunthan V N vpfe0: vpfe@48326000 { 99248038c4aSMugunthan V N compatible = "ti,am437x-vpfe"; 99348038c4aSMugunthan V N reg = <0x48326000 0x2000>; 99448038c4aSMugunthan V N interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 99548038c4aSMugunthan V N ti,hwmods = "vpfe0"; 99648038c4aSMugunthan V N status = "disabled"; 99748038c4aSMugunthan V N }; 99848038c4aSMugunthan V N 99948038c4aSMugunthan V N vpfe1: vpfe@48328000 { 100048038c4aSMugunthan V N compatible = "ti,am437x-vpfe"; 100148038c4aSMugunthan V N reg = <0x48328000 0x2000>; 100248038c4aSMugunthan V N interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 100348038c4aSMugunthan V N ti,hwmods = "vpfe1"; 100448038c4aSMugunthan V N status = "disabled"; 100548038c4aSMugunthan V N }; 100648038c4aSMugunthan V N }; 100748038c4aSMugunthan V N}; 100848038c4aSMugunthan V N 100948038c4aSMugunthan V N/include/ "am43xx-clocks.dtsi" 1010