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Searched refs:reg_apu_infra_req_mask_b (Results 1 – 23 of 23) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_idle.c128 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_suspend.c145 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_vcorefs.c161 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_internal.h168 uint8_t reg_apu_infra_req_mask_b; member
H A Dmt_spm_internal.c220 ((pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 16) | in __spm_set_power_control()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_idle.c147 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_suspend.c170 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_vcorefs.c193 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_internal.h233 uint8_t reg_apu_infra_req_mask_b; member
H A Dmt_spm_internal.c264 ((pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 24) | in __spm_set_power_control()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_idle.c130 .reg_apu_infra_req_mask_b = 0,
H A Dmt_spm_suspend.c143 .reg_apu_infra_req_mask_b = 0,
H A Dmt_spm_vcorefs.c133 .reg_apu_infra_req_mask_b = 0,
H A Dmt_spm_internal.h204 uint8_t reg_apu_infra_req_mask_b; member
H A Dmt_spm_internal.c288 ((pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 24) | in __spm_set_power_control()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_idle.c129 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_suspend.c148 .reg_apu_infra_req_mask_b = 1,
H A Dmt_spm_internal.h230 uint8_t reg_apu_infra_req_mask_b; member
H A Dmt_spm_internal.c164 ((pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 16) | in __spm_set_power_control()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_idle.c81 .reg_apu_infra_req_mask_b = 0x1,
H A Dmt_spm_suspend.c101 .reg_apu_infra_req_mask_b = 0x1,
H A Dmt_spm_internal.h136 uint8_t reg_apu_infra_req_mask_b; member
H A Dmt_spm_internal.c227 (((uint32_t)pwrctrl->reg_apu_infra_req_mask_b & 0x1) << 3) | in __spm_set_power_control()