17ac6a76cSjason-ch chen /*
27ac6a76cSjason-ch chen * Copyright (c) 2022, MediaTek Inc. All rights reserved.
37ac6a76cSjason-ch chen *
47ac6a76cSjason-ch chen * SPDX-License-Identifier: BSD-3-Clause
57ac6a76cSjason-ch chen */
67ac6a76cSjason-ch chen
77ac6a76cSjason-ch chen #ifndef MT_SPM_INTERNAL
87ac6a76cSjason-ch chen #define MT_SPM_INTERNAL
97ac6a76cSjason-ch chen
107ac6a76cSjason-ch chen #include "mt_spm.h"
117ac6a76cSjason-ch chen
127ac6a76cSjason-ch chen /* Config and Parameter */
137ac6a76cSjason-ch chen #define POWER_ON_VAL0_DEF (0x0000F100)
147ac6a76cSjason-ch chen #define POWER_ON_VAL1_DEF (0x80015860)
157ac6a76cSjason-ch chen #define PCM_WDT_TIMEOUT (30 * 32768) /* 30s */
167ac6a76cSjason-ch chen #define PCM_TIMER_MAX (0xffffffff - PCM_WDT_TIMEOUT)
177ac6a76cSjason-ch chen
187ac6a76cSjason-ch chen /* Define and Declare */
197ac6a76cSjason-ch chen /* PCM_PWR_IO_EN */
207ac6a76cSjason-ch chen #define PCM_PWRIO_EN_R0 BIT(0)
217ac6a76cSjason-ch chen #define PCM_PWRIO_EN_R7 BIT(7)
227ac6a76cSjason-ch chen #define PCM_RF_SYNC_R0 BIT(16)
237ac6a76cSjason-ch chen #define PCM_RF_SYNC_R6 BIT(22)
247ac6a76cSjason-ch chen #define PCM_RF_SYNC_R7 BIT(23)
257ac6a76cSjason-ch chen
267ac6a76cSjason-ch chen /* SPM_SWINT */
277ac6a76cSjason-ch chen #define PCM_SW_INT0 BIT(0)
287ac6a76cSjason-ch chen #define PCM_SW_INT1 BIT(1)
297ac6a76cSjason-ch chen #define PCM_SW_INT2 BIT(2)
307ac6a76cSjason-ch chen #define PCM_SW_INT3 BIT(3)
317ac6a76cSjason-ch chen #define PCM_SW_INT4 BIT(4)
327ac6a76cSjason-ch chen #define PCM_SW_INT5 BIT(5)
337ac6a76cSjason-ch chen #define PCM_SW_INT6 BIT(6)
347ac6a76cSjason-ch chen #define PCM_SW_INT7 BIT(7)
357ac6a76cSjason-ch chen #define PCM_SW_INT8 BIT(8)
367ac6a76cSjason-ch chen #define PCM_SW_INT9 BIT(9)
377ac6a76cSjason-ch chen #define PCM_SW_INT_ALL (PCM_SW_INT9 | PCM_SW_INT8 | PCM_SW_INT7 | \
387ac6a76cSjason-ch chen PCM_SW_INT6 | PCM_SW_INT5 | PCM_SW_INT4 | \
397ac6a76cSjason-ch chen PCM_SW_INT3 | PCM_SW_INT2 | PCM_SW_INT1 | \
407ac6a76cSjason-ch chen PCM_SW_INT0)
417ac6a76cSjason-ch chen
427ac6a76cSjason-ch chen /* SPM_AP_STANDBY_CON */
437ac6a76cSjason-ch chen #define WFI_OP_AND (1U)
447ac6a76cSjason-ch chen #define WFI_OP_OR (0U)
457ac6a76cSjason-ch chen
467ac6a76cSjason-ch chen /* SPM_IRQ_MASK */
477ac6a76cSjason-ch chen #define ISRM_TWAM (1U << 2)
487ac6a76cSjason-ch chen #define ISRM_PCM_RETURN (1U << 3)
497ac6a76cSjason-ch chen #define ISRM_RET_IRQ0 (1U << 8)
507ac6a76cSjason-ch chen #define ISRM_RET_IRQ1 (1U << 9)
517ac6a76cSjason-ch chen #define ISRM_RET_IRQ2 (1U << 10)
527ac6a76cSjason-ch chen #define ISRM_RET_IRQ3 (1U << 11)
537ac6a76cSjason-ch chen #define ISRM_RET_IRQ4 (1U << 12)
547ac6a76cSjason-ch chen #define ISRM_RET_IRQ5 (1U << 13)
557ac6a76cSjason-ch chen #define ISRM_RET_IRQ6 (1U << 14)
567ac6a76cSjason-ch chen #define ISRM_RET_IRQ7 (1U << 15)
577ac6a76cSjason-ch chen #define ISRM_RET_IRQ8 (1U << 16)
587ac6a76cSjason-ch chen #define ISRM_RET_IRQ9 (1U << 17)
597ac6a76cSjason-ch chen #define ISRM_RET_IRQ_AUX ((ISRM_RET_IRQ9) | (ISRM_RET_IRQ8) | \
607ac6a76cSjason-ch chen (ISRM_RET_IRQ7) | (ISRM_RET_IRQ6) | \
617ac6a76cSjason-ch chen (ISRM_RET_IRQ5) | (ISRM_RET_IRQ4) | \
627ac6a76cSjason-ch chen (ISRM_RET_IRQ3) | (ISRM_RET_IRQ2) | \
637ac6a76cSjason-ch chen (ISRM_RET_IRQ1))
647ac6a76cSjason-ch chen #define ISRM_ALL_EXC_TWAM (ISRM_RET_IRQ_AUX)
657ac6a76cSjason-ch chen #define ISRM_ALL (ISRM_ALL_EXC_TWAM | ISRM_TWAM)
667ac6a76cSjason-ch chen
677ac6a76cSjason-ch chen /* SPM_IRQ_STA */
687ac6a76cSjason-ch chen #define ISRS_TWAM BIT(2)
697ac6a76cSjason-ch chen #define ISRS_PCM_RETURN BIT(3)
707ac6a76cSjason-ch chen #define ISRC_TWAM ISRS_TWAM
717ac6a76cSjason-ch chen #define ISRC_ALL_EXC_TWAM ISRS_PCM_RETURN
727ac6a76cSjason-ch chen #define ISRC_ALL (ISRC_ALL_EXC_TWAM | ISRC_TWAM)
737ac6a76cSjason-ch chen
747ac6a76cSjason-ch chen /* SPM_WAKEUP_MISC */
757ac6a76cSjason-ch chen #define WAKE_MISC_GIC_WAKEUP (0x3FF)
767ac6a76cSjason-ch chen #define WAKE_MISC_DVFSRC_IRQ DVFSRC_IRQ_LSB
777ac6a76cSjason-ch chen #define WAKE_MISC_REG_CPU_WAKEUP SPM_WAKEUP_MISC_REG_CPU_WAKEUP_LSB
787ac6a76cSjason-ch chen #define WAKE_MISC_PCM_TIMER_EVENT PCM_TIMER_EVENT_LSB
797ac6a76cSjason-ch chen #define WAKE_MISC_PMIC_OUT_B ((1U << 19) | (1U << 20))
807ac6a76cSjason-ch chen #define WAKE_MISC_TWAM_IRQ_B TWAM_IRQ_B_LSB
817ac6a76cSjason-ch chen #define WAKE_MISC_SPM_ACK_CHK_WAKEUP_0 SPM_ACK_CHK_WAKEUP_0_LSB
827ac6a76cSjason-ch chen #define WAKE_MISC_SPM_ACK_CHK_WAKEUP_1 SPM_ACK_CHK_WAKEUP_1_LSB
837ac6a76cSjason-ch chen #define WAKE_MISC_SPM_ACK_CHK_WAKEUP_2 SPM_ACK_CHK_WAKEUP_2_LSB
847ac6a76cSjason-ch chen #define WAKE_MISC_SPM_ACK_CHK_WAKEUP_3 SPM_ACK_CHK_WAKEUP_3_LSB
857ac6a76cSjason-ch chen #define WAKE_MISC_SPM_ACK_CHK_WAKEUP_ALL SPM_ACK_CHK_WAKEUP_ALL_LSB
867ac6a76cSjason-ch chen #define WAKE_MISC_PMIC_IRQ_ACK PMIC_IRQ_ACK_LSB
877ac6a76cSjason-ch chen #define WAKE_MISC_PMIC_SCP_IRQ PMIC_SCP_IRQ_LSB
887ac6a76cSjason-ch chen
897ac6a76cSjason-ch chen /* ABORT MASK for DEBUG FOORTPRINT */
907ac6a76cSjason-ch chen #define DEBUG_ABORT_MASK \
917ac6a76cSjason-ch chen (SPM_DBG_DEBUG_IDX_DRAM_SREF_ABORT_IN_APSRC | \
927ac6a76cSjason-ch chen SPM_DBG_DEBUG_IDX_DRAM_SREF_ABORT_IN_DDREN)
937ac6a76cSjason-ch chen
947ac6a76cSjason-ch chen #define DEBUG_ABORT_MASK_1 \
957ac6a76cSjason-ch chen (SPM_DBG1_DEBUG_IDX_VRCXO_SLEEP_ABORT | \
967ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_PWRAP_SLEEP_ACK_LOW_ABORT | \
977ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_PWRAP_SLEEP_ACK_HIGH_ABORT | \
987ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_EMI_SLP_IDLE_ABORT | \
997ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_SCP_SLP_ACK_LOW_ABORT | \
1007ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_SCP_SLP_ACK_HIGH_ABORT | \
1017ac6a76cSjason-ch chen SPM_DBG1_DEBUG_IDX_SPM_DVFS_CMD_RDY_ABORT)
1027ac6a76cSjason-ch chen
1037ac6a76cSjason-ch chen #define MCUPM_MBOX_WAKEUP_CPU (0x0C55FD10)
1047ac6a76cSjason-ch chen
1057ac6a76cSjason-ch chen struct pwr_ctrl {
1067ac6a76cSjason-ch chen uint32_t pcm_flags;
1077ac6a76cSjason-ch chen uint32_t pcm_flags_cust;
1087ac6a76cSjason-ch chen uint32_t pcm_flags_cust_set;
1097ac6a76cSjason-ch chen uint32_t pcm_flags_cust_clr;
1107ac6a76cSjason-ch chen uint32_t pcm_flags1;
1117ac6a76cSjason-ch chen uint32_t pcm_flags1_cust;
1127ac6a76cSjason-ch chen uint32_t pcm_flags1_cust_set;
1137ac6a76cSjason-ch chen uint32_t pcm_flags1_cust_clr;
1147ac6a76cSjason-ch chen uint32_t timer_val;
1157ac6a76cSjason-ch chen uint32_t timer_val_cust;
1167ac6a76cSjason-ch chen uint32_t timer_val_ramp_en;
1177ac6a76cSjason-ch chen uint32_t timer_val_ramp_en_sec;
1187ac6a76cSjason-ch chen uint32_t wake_src;
1197ac6a76cSjason-ch chen uint32_t wake_src_cust;
1207ac6a76cSjason-ch chen uint32_t wakelock_timer_val;
1217ac6a76cSjason-ch chen uint8_t wdt_disable;
1227ac6a76cSjason-ch chen
1237ac6a76cSjason-ch chen /* Auto-gen Start */
1247ac6a76cSjason-ch chen
1257ac6a76cSjason-ch chen /* SPM_AP_STANDBY_CON */
1267ac6a76cSjason-ch chen uint8_t reg_wfi_op;
1277ac6a76cSjason-ch chen uint8_t reg_wfi_type;
1287ac6a76cSjason-ch chen uint8_t reg_mp0_cputop_idle_mask;
1297ac6a76cSjason-ch chen uint8_t reg_mp1_cputop_idle_mask;
1307ac6a76cSjason-ch chen uint8_t reg_mcusys_idle_mask;
1317ac6a76cSjason-ch chen uint8_t reg_md_apsrc_1_sel;
1327ac6a76cSjason-ch chen uint8_t reg_md_apsrc_0_sel;
1337ac6a76cSjason-ch chen uint8_t reg_conn_apsrc_sel;
1347ac6a76cSjason-ch chen
1357ac6a76cSjason-ch chen /* SPM_SRC6_MASK */
1367ac6a76cSjason-ch chen uint32_t reg_ccif_event_infra_req_mask_b;
1377ac6a76cSjason-ch chen uint32_t reg_ccif_event_apsrc_req_mask_b;
1387ac6a76cSjason-ch chen
1397ac6a76cSjason-ch chen /* SPM_SRC_REQ */
1407ac6a76cSjason-ch chen uint8_t reg_spm_apsrc_req;
1417ac6a76cSjason-ch chen uint8_t reg_spm_f26m_req;
1427ac6a76cSjason-ch chen uint8_t reg_spm_infra_req;
1437ac6a76cSjason-ch chen uint8_t reg_spm_vrf18_req;
1447ac6a76cSjason-ch chen uint8_t reg_spm_ddren_req;
1457ac6a76cSjason-ch chen uint8_t reg_spm_dvfs_req;
1467ac6a76cSjason-ch chen uint8_t reg_spm_sw_mailbox_req;
1477ac6a76cSjason-ch chen uint8_t reg_spm_sspm_mailbox_req;
1487ac6a76cSjason-ch chen uint8_t reg_spm_adsp_mailbox_req;
1497ac6a76cSjason-ch chen uint8_t reg_spm_scp_mailbox_req;
1507ac6a76cSjason-ch chen
1517ac6a76cSjason-ch chen /* SPM_SRC_MASK */
1527ac6a76cSjason-ch chen uint8_t reg_md_0_srcclkena_mask_b;
1537ac6a76cSjason-ch chen uint8_t reg_md_0_infra_req_mask_b;
1547ac6a76cSjason-ch chen uint8_t reg_md_0_apsrc_req_mask_b;
1557ac6a76cSjason-ch chen uint8_t reg_md_0_vrf18_req_mask_b;
1567ac6a76cSjason-ch chen uint8_t reg_md_0_ddren_req_mask_b;
1577ac6a76cSjason-ch chen uint8_t reg_md_1_srcclkena_mask_b;
1587ac6a76cSjason-ch chen uint8_t reg_md_1_infra_req_mask_b;
1597ac6a76cSjason-ch chen uint8_t reg_md_1_apsrc_req_mask_b;
1607ac6a76cSjason-ch chen uint8_t reg_md_1_vrf18_req_mask_b;
1617ac6a76cSjason-ch chen uint8_t reg_md_1_ddren_req_mask_b;
1627ac6a76cSjason-ch chen uint8_t reg_conn_srcclkena_mask_b;
1637ac6a76cSjason-ch chen uint8_t reg_conn_srcclkenb_mask_b;
1647ac6a76cSjason-ch chen uint8_t reg_conn_infra_req_mask_b;
1657ac6a76cSjason-ch chen uint8_t reg_conn_apsrc_req_mask_b;
1667ac6a76cSjason-ch chen uint8_t reg_conn_vrf18_req_mask_b;
1677ac6a76cSjason-ch chen uint8_t reg_conn_ddren_req_mask_b;
1687ac6a76cSjason-ch chen uint8_t reg_conn_vfe28_mask_b;
1697ac6a76cSjason-ch chen uint8_t reg_srcclkeni_srcclkena_mask_b;
1707ac6a76cSjason-ch chen uint8_t reg_srcclkeni_infra_req_mask_b;
1717ac6a76cSjason-ch chen uint8_t reg_infrasys_apsrc_req_mask_b;
1727ac6a76cSjason-ch chen uint8_t reg_infrasys_ddren_req_mask_b;
1737ac6a76cSjason-ch chen uint8_t reg_sspm_srcclkena_mask_b;
1747ac6a76cSjason-ch chen uint8_t reg_sspm_infra_req_mask_b;
1757ac6a76cSjason-ch chen uint8_t reg_sspm_apsrc_req_mask_b;
1767ac6a76cSjason-ch chen uint8_t reg_sspm_vrf18_req_mask_b;
1777ac6a76cSjason-ch chen uint8_t reg_sspm_ddren_req_mask_b;
1787ac6a76cSjason-ch chen
1797ac6a76cSjason-ch chen /* SPM_SRC2_MASK */
1807ac6a76cSjason-ch chen uint8_t reg_scp_srcclkena_mask_b;
1817ac6a76cSjason-ch chen uint8_t reg_scp_infra_req_mask_b;
1827ac6a76cSjason-ch chen uint8_t reg_scp_apsrc_req_mask_b;
1837ac6a76cSjason-ch chen uint8_t reg_scp_vrf18_req_mask_b;
1847ac6a76cSjason-ch chen uint8_t reg_scp_ddren_req_mask_b;
1857ac6a76cSjason-ch chen uint8_t reg_audio_dsp_srcclkena_mask_b;
1867ac6a76cSjason-ch chen uint8_t reg_audio_dsp_infra_req_mask_b;
1877ac6a76cSjason-ch chen uint8_t reg_audio_dsp_apsrc_req_mask_b;
1887ac6a76cSjason-ch chen uint8_t reg_audio_dsp_vrf18_req_mask_b;
1897ac6a76cSjason-ch chen uint8_t reg_audio_dsp_ddren_req_mask_b;
1907ac6a76cSjason-ch chen uint8_t reg_ufs_srcclkena_mask_b;
1917ac6a76cSjason-ch chen uint8_t reg_ufs_infra_req_mask_b;
1927ac6a76cSjason-ch chen uint8_t reg_ufs_apsrc_req_mask_b;
1937ac6a76cSjason-ch chen uint8_t reg_ufs_vrf18_req_mask_b;
1947ac6a76cSjason-ch chen uint8_t reg_ufs_ddren_req_mask_b;
1957ac6a76cSjason-ch chen uint8_t reg_disp0_apsrc_req_mask_b;
1967ac6a76cSjason-ch chen uint8_t reg_disp0_ddren_req_mask_b;
1977ac6a76cSjason-ch chen uint8_t reg_disp1_apsrc_req_mask_b;
1987ac6a76cSjason-ch chen uint8_t reg_disp1_ddren_req_mask_b;
1997ac6a76cSjason-ch chen uint8_t reg_gce_infra_req_mask_b;
2007ac6a76cSjason-ch chen uint8_t reg_gce_apsrc_req_mask_b;
2017ac6a76cSjason-ch chen uint8_t reg_gce_vrf18_req_mask_b;
2027ac6a76cSjason-ch chen uint8_t reg_gce_ddren_req_mask_b;
2037ac6a76cSjason-ch chen uint8_t reg_apu_srcclkena_mask_b;
2047ac6a76cSjason-ch chen uint8_t reg_apu_infra_req_mask_b;
2057ac6a76cSjason-ch chen uint8_t reg_apu_apsrc_req_mask_b;
2067ac6a76cSjason-ch chen uint8_t reg_apu_vrf18_req_mask_b;
2077ac6a76cSjason-ch chen uint8_t reg_apu_ddren_req_mask_b;
2087ac6a76cSjason-ch chen uint8_t reg_cg_check_srcclkena_mask_b;
2097ac6a76cSjason-ch chen uint8_t reg_cg_check_apsrc_req_mask_b;
2107ac6a76cSjason-ch chen uint8_t reg_cg_check_vrf18_req_mask_b;
2117ac6a76cSjason-ch chen uint8_t reg_cg_check_ddren_req_mask_b;
2127ac6a76cSjason-ch chen
2137ac6a76cSjason-ch chen /* SPM_SRC3_MASK */
2147ac6a76cSjason-ch chen uint8_t reg_dvfsrc_event_trigger_mask_b;
2157ac6a76cSjason-ch chen uint8_t reg_sw2spm_wakeup_mask_b;
2167ac6a76cSjason-ch chen uint8_t reg_adsp2spm_wakeup_mask_b;
2177ac6a76cSjason-ch chen uint8_t reg_sspm2spm_wakeup_mask_b;
2187ac6a76cSjason-ch chen uint8_t reg_scp2spm_wakeup_mask_b;
2197ac6a76cSjason-ch chen uint8_t reg_csyspwrup_ack_mask;
2207ac6a76cSjason-ch chen uint8_t reg_spm_reserved_srcclkena_mask_b;
2217ac6a76cSjason-ch chen uint8_t reg_spm_reserved_infra_req_mask_b;
2227ac6a76cSjason-ch chen uint8_t reg_spm_reserved_apsrc_req_mask_b;
2237ac6a76cSjason-ch chen uint8_t reg_spm_reserved_vrf18_req_mask_b;
2247ac6a76cSjason-ch chen uint8_t reg_spm_reserved_ddren_req_mask_b;
2257ac6a76cSjason-ch chen uint8_t reg_mcupm_srcclkena_mask_b;
2267ac6a76cSjason-ch chen uint8_t reg_mcupm_infra_req_mask_b;
2277ac6a76cSjason-ch chen uint8_t reg_mcupm_apsrc_req_mask_b;
2287ac6a76cSjason-ch chen uint8_t reg_mcupm_vrf18_req_mask_b;
2297ac6a76cSjason-ch chen uint8_t reg_mcupm_ddren_req_mask_b;
2307ac6a76cSjason-ch chen uint8_t reg_msdc0_srcclkena_mask_b;
2317ac6a76cSjason-ch chen uint8_t reg_msdc0_infra_req_mask_b;
2327ac6a76cSjason-ch chen uint8_t reg_msdc0_apsrc_req_mask_b;
2337ac6a76cSjason-ch chen uint8_t reg_msdc0_vrf18_req_mask_b;
2347ac6a76cSjason-ch chen uint8_t reg_msdc0_ddren_req_mask_b;
2357ac6a76cSjason-ch chen uint8_t reg_msdc1_srcclkena_mask_b;
2367ac6a76cSjason-ch chen uint8_t reg_msdc1_infra_req_mask_b;
2377ac6a76cSjason-ch chen uint8_t reg_msdc1_apsrc_req_mask_b;
2387ac6a76cSjason-ch chen uint8_t reg_msdc1_vrf18_req_mask_b;
2397ac6a76cSjason-ch chen uint8_t reg_msdc1_ddren_req_mask_b;
2407ac6a76cSjason-ch chen
2417ac6a76cSjason-ch chen /* SPM_SRC4_MASK */
2427ac6a76cSjason-ch chen uint32_t reg_ccif_event_srcclkena_mask_b;
2437ac6a76cSjason-ch chen uint8_t reg_bak_psri_srcclkena_mask_b;
2447ac6a76cSjason-ch chen uint8_t reg_bak_psri_infra_req_mask_b;
2457ac6a76cSjason-ch chen uint8_t reg_bak_psri_apsrc_req_mask_b;
2467ac6a76cSjason-ch chen uint8_t reg_bak_psri_vrf18_req_mask_b;
2477ac6a76cSjason-ch chen uint8_t reg_bak_psri_ddren_req_mask_b;
2487ac6a76cSjason-ch chen uint8_t reg_dramc_md32_infra_req_mask_b;
2497ac6a76cSjason-ch chen uint8_t reg_dramc_md32_vrf18_req_mask_b;
2507ac6a76cSjason-ch chen uint8_t reg_conn_srcclkenb2pwrap_mask_b;
2517ac6a76cSjason-ch chen uint8_t reg_dramc_md32_apsrc_req_mask_b;
2527ac6a76cSjason-ch chen
2537ac6a76cSjason-ch chen /* SPM_SRC5_MASK */
2547ac6a76cSjason-ch chen uint32_t reg_mcusys_merge_apsrc_req_mask_b;
2557ac6a76cSjason-ch chen uint32_t reg_mcusys_merge_ddren_req_mask_b;
2567ac6a76cSjason-ch chen uint8_t reg_afe_srcclkena_mask_b;
2577ac6a76cSjason-ch chen uint8_t reg_afe_infra_req_mask_b;
2587ac6a76cSjason-ch chen uint8_t reg_afe_apsrc_req_mask_b;
2597ac6a76cSjason-ch chen uint8_t reg_afe_vrf18_req_mask_b;
2607ac6a76cSjason-ch chen uint8_t reg_afe_ddren_req_mask_b;
2617ac6a76cSjason-ch chen uint8_t reg_msdc2_srcclkena_mask_b;
2627ac6a76cSjason-ch chen uint8_t reg_msdc2_infra_req_mask_b;
2637ac6a76cSjason-ch chen uint8_t reg_msdc2_apsrc_req_mask_b;
2647ac6a76cSjason-ch chen uint8_t reg_msdc2_vrf18_req_mask_b;
2657ac6a76cSjason-ch chen uint8_t reg_msdc2_ddren_req_mask_b;
2667ac6a76cSjason-ch chen
2677ac6a76cSjason-ch chen /* SPM_WAKEUP_EVENT_MASK */
2687ac6a76cSjason-ch chen uint32_t reg_wakeup_event_mask;
2697ac6a76cSjason-ch chen
2707ac6a76cSjason-ch chen /* SPM_WAKEUP_EVENT_EXT_MASK */
2717ac6a76cSjason-ch chen uint32_t reg_ext_wakeup_event_mask;
2727ac6a76cSjason-ch chen
2737ac6a76cSjason-ch chen /* SPM_SRC7_MASK */
2747ac6a76cSjason-ch chen uint8_t reg_pcie_srcclkena_mask_b;
2757ac6a76cSjason-ch chen uint8_t reg_pcie_infra_req_mask_b;
2767ac6a76cSjason-ch chen uint8_t reg_pcie_apsrc_req_mask_b;
2777ac6a76cSjason-ch chen uint8_t reg_pcie_vrf18_req_mask_b;
2787ac6a76cSjason-ch chen uint8_t reg_pcie_ddren_req_mask_b;
2797ac6a76cSjason-ch chen uint8_t reg_dpmaif_srcclkena_mask_b;
2807ac6a76cSjason-ch chen uint8_t reg_dpmaif_infra_req_mask_b;
2817ac6a76cSjason-ch chen uint8_t reg_dpmaif_apsrc_req_mask_b;
2827ac6a76cSjason-ch chen uint8_t reg_dpmaif_vrf18_req_mask_b;
2837ac6a76cSjason-ch chen uint8_t reg_dpmaif_ddren_req_mask_b;
2847ac6a76cSjason-ch chen
2857ac6a76cSjason-ch chen /* Auto-gen End */
2867ac6a76cSjason-ch chen };
2877ac6a76cSjason-ch chen
2887ac6a76cSjason-ch chen /* code gen by spm_pwr_ctrl_atf.pl, need struct pwr_ctrl */
2897ac6a76cSjason-ch chen enum pwr_ctrl_enum {
2907ac6a76cSjason-ch chen PW_PCM_FLAGS,
2917ac6a76cSjason-ch chen PW_PCM_FLAGS_CUST,
2927ac6a76cSjason-ch chen PW_PCM_FLAGS_CUST_SET,
2937ac6a76cSjason-ch chen PW_PCM_FLAGS_CUST_CLR,
2947ac6a76cSjason-ch chen PW_PCM_FLAGS1,
2957ac6a76cSjason-ch chen PW_PCM_FLAGS1_CUST,
2967ac6a76cSjason-ch chen PW_PCM_FLAGS1_CUST_SET,
2977ac6a76cSjason-ch chen PW_PCM_FLAGS1_CUST_CLR,
2987ac6a76cSjason-ch chen PW_TIMER_VAL,
2997ac6a76cSjason-ch chen PW_TIMER_VAL_CUST,
3007ac6a76cSjason-ch chen PW_TIMER_VAL_RAMP_EN,
3017ac6a76cSjason-ch chen PW_TIMER_VAL_RAMP_EN_SEC,
3027ac6a76cSjason-ch chen PW_WAKE_SRC,
3037ac6a76cSjason-ch chen PW_WAKE_SRC_CUST,
3047ac6a76cSjason-ch chen PW_WAKELOCK_TIMER_VAL,
3057ac6a76cSjason-ch chen PW_WDT_DISABLE,
3067ac6a76cSjason-ch chen
3077ac6a76cSjason-ch chen /* SPM_AP_STANDBY_CON */
3087ac6a76cSjason-ch chen PW_REG_WFI_OP,
3097ac6a76cSjason-ch chen PW_REG_WFI_TYPE,
3107ac6a76cSjason-ch chen PW_REG_MP0_CPUTOP_IDLE_MASK,
3117ac6a76cSjason-ch chen PW_REG_MP1_CPUTOP_IDLE_MASK,
3127ac6a76cSjason-ch chen PW_REG_MCUSYS_IDLE_MASK,
3137ac6a76cSjason-ch chen PW_REG_MD_APSRC_1_SEL,
3147ac6a76cSjason-ch chen PW_REG_MD_APSRC_0_SEL,
3157ac6a76cSjason-ch chen PW_REG_CONN_APSRC_SEL,
3167ac6a76cSjason-ch chen
3177ac6a76cSjason-ch chen /* SPM_SRC6_MASK */
3187ac6a76cSjason-ch chen PW_REG_CCIF_EVENT_INFRA_REQ_MASK_B,
3197ac6a76cSjason-ch chen PW_REG_CCIF_EVENT_APSRC_REQ_MASK_B,
3207ac6a76cSjason-ch chen
3217ac6a76cSjason-ch chen /* SPM_WAKEUP_EVENT_SENS */
3227ac6a76cSjason-ch chen PW_REG_WAKEUP_EVENT_SENS,
3237ac6a76cSjason-ch chen
3247ac6a76cSjason-ch chen /* SPM_SRC_REQ */
3257ac6a76cSjason-ch chen PW_REG_SPM_APSRC_REQ,
3267ac6a76cSjason-ch chen PW_REG_SPM_F26M_REQ,
3277ac6a76cSjason-ch chen PW_REG_SPM_INFRA_REQ,
3287ac6a76cSjason-ch chen PW_REG_SPM_VRF18_REQ,
3297ac6a76cSjason-ch chen PW_REG_SPM_DDREN_REQ,
3307ac6a76cSjason-ch chen PW_REG_SPM_DVFS_REQ,
3317ac6a76cSjason-ch chen PW_REG_SPM_SW_MAILBOX_REQ,
3327ac6a76cSjason-ch chen PW_REG_SPM_SSPM_MAILBOX_REQ,
3337ac6a76cSjason-ch chen PW_REG_SPM_ADSP_MAILBOX_REQ,
3347ac6a76cSjason-ch chen PW_REG_SPM_SCP_MAILBOX_REQ,
3357ac6a76cSjason-ch chen
3367ac6a76cSjason-ch chen /* SPM_SRC_MASK */
3377ac6a76cSjason-ch chen PW_REG_MD_0_SRCCLKENA_MASK_B,
3387ac6a76cSjason-ch chen PW_REG_MD_0_INFRA_REQ_MASK_B,
3397ac6a76cSjason-ch chen PW_REG_MD_0_APSRC_REQ_MASK_B,
3407ac6a76cSjason-ch chen PW_REG_MD_0_VRF18_REQ_MASK_B,
3417ac6a76cSjason-ch chen PW_REG_MD_0_DDREN_REQ_MASK_B,
3427ac6a76cSjason-ch chen PW_REG_MD_1_SRCCLKENA_MASK_B,
3437ac6a76cSjason-ch chen PW_REG_MD_1_INFRA_REQ_MASK_B,
3447ac6a76cSjason-ch chen PW_REG_MD_1_APSRC_REQ_MASK_B,
3457ac6a76cSjason-ch chen PW_REG_MD_1_VRF18_REQ_MASK_B,
3467ac6a76cSjason-ch chen PW_REG_MD_1_DDREN_REQ_MASK_B,
3477ac6a76cSjason-ch chen PW_REG_CONN_SRCCLKENA_MASK_B,
3487ac6a76cSjason-ch chen PW_REG_CONN_SRCCLKENB_MASK_B,
3497ac6a76cSjason-ch chen PW_REG_CONN_INFRA_REQ_MASK_B,
3507ac6a76cSjason-ch chen PW_REG_CONN_APSRC_REQ_MASK_B,
3517ac6a76cSjason-ch chen PW_REG_CONN_VRF18_REQ_MASK_B,
3527ac6a76cSjason-ch chen PW_REG_CONN_DDREN_REQ_MASK_B,
3537ac6a76cSjason-ch chen PW_REG_CONN_VFE28_MASK_B,
3547ac6a76cSjason-ch chen PW_REG_SRCCLKENI_SRCCLKENA_MASK_B,
3557ac6a76cSjason-ch chen PW_REG_SRCCLKENI_INFRA_REQ_MASK_B,
3567ac6a76cSjason-ch chen PW_REG_INFRASYS_APSRC_REQ_MASK_B,
3577ac6a76cSjason-ch chen PW_REG_INFRASYS_DDREN_REQ_MASK_B,
3587ac6a76cSjason-ch chen PW_REG_SSPM_SRCCLKENA_MASK_B,
3597ac6a76cSjason-ch chen PW_REG_SSPM_INFRA_REQ_MASK_B,
3607ac6a76cSjason-ch chen PW_REG_SSPM_APSRC_REQ_MASK_B,
3617ac6a76cSjason-ch chen PW_REG_SSPM_VRF18_REQ_MASK_B,
3627ac6a76cSjason-ch chen PW_REG_SSPM_DDREN_REQ_MASK_B,
3637ac6a76cSjason-ch chen
3647ac6a76cSjason-ch chen /* SPM_SRC2_MASK */
3657ac6a76cSjason-ch chen PW_REG_SCP_SRCCLKENA_MASK_B,
3667ac6a76cSjason-ch chen PW_REG_SCP_INFRA_REQ_MASK_B,
3677ac6a76cSjason-ch chen PW_REG_SCP_APSRC_REQ_MASK_B,
3687ac6a76cSjason-ch chen PW_REG_SCP_VRF18_REQ_MASK_B,
3697ac6a76cSjason-ch chen PW_REG_SCP_DDREN_REQ_MASK_B,
3707ac6a76cSjason-ch chen PW_REG_AUDIO_DSP_SRCCLKENA_MASK_B,
3717ac6a76cSjason-ch chen PW_REG_AUDIO_DSP_INFRA_REQ_MASK_B,
3727ac6a76cSjason-ch chen PW_REG_AUDIO_DSP_APSRC_REQ_MASK_B,
3737ac6a76cSjason-ch chen PW_REG_AUDIO_DSP_VRF18_REQ_MASK_B,
3747ac6a76cSjason-ch chen PW_REG_AUDIO_DSP_DDREN_REQ_MASK_B,
3757ac6a76cSjason-ch chen PW_REG_UFS_SRCCLKENA_MASK_B,
3767ac6a76cSjason-ch chen PW_REG_UFS_INFRA_REQ_MASK_B,
3777ac6a76cSjason-ch chen PW_REG_UFS_APSRC_REQ_MASK_B,
3787ac6a76cSjason-ch chen PW_REG_UFS_VRF18_REQ_MASK_B,
3797ac6a76cSjason-ch chen PW_REG_UFS_DDREN_REQ_MASK_B,
3807ac6a76cSjason-ch chen PW_REG_DISP0_APSRC_REQ_MASK_B,
3817ac6a76cSjason-ch chen PW_REG_DISP0_DDREN_REQ_MASK_B,
3827ac6a76cSjason-ch chen PW_REG_DISP1_APSRC_REQ_MASK_B,
3837ac6a76cSjason-ch chen PW_REG_DISP1_DDREN_REQ_MASK_B,
3847ac6a76cSjason-ch chen PW_REG_GCE_INFRA_REQ_MASK_B,
3857ac6a76cSjason-ch chen PW_REG_GCE_APSRC_REQ_MASK_B,
3867ac6a76cSjason-ch chen PW_REG_GCE_VRF18_REQ_MASK_B,
3877ac6a76cSjason-ch chen PW_REG_GCE_DDREN_REQ_MASK_B,
3887ac6a76cSjason-ch chen PW_REG_APU_SRCCLKENA_MASK_B,
3897ac6a76cSjason-ch chen PW_REG_APU_INFRA_REQ_MASK_B,
3907ac6a76cSjason-ch chen PW_REG_APU_APSRC_REQ_MASK_B,
3917ac6a76cSjason-ch chen PW_REG_APU_VRF18_REQ_MASK_B,
3927ac6a76cSjason-ch chen PW_REG_APU_DDREN_REQ_MASK_B,
3937ac6a76cSjason-ch chen PW_REG_CG_CHECK_SRCCLKENA_MASK_B,
3947ac6a76cSjason-ch chen PW_REG_CG_CHECK_APSRC_REQ_MASK_B,
3957ac6a76cSjason-ch chen PW_REG_CG_CHECK_VRF18_REQ_MASK_B,
3967ac6a76cSjason-ch chen PW_REG_CG_CHECK_DDREN_REQ_MASK_B,
3977ac6a76cSjason-ch chen
3987ac6a76cSjason-ch chen /* SPM_SRC3_MASK */
3997ac6a76cSjason-ch chen PW_REG_DVFSRC_EVENT_TRIGGER_MASK_B,
4007ac6a76cSjason-ch chen PW_REG_SW2SPM_WAKEUP_MASK_B,
4017ac6a76cSjason-ch chen PW_REG_ADSP2SPM_WAKEUP_MASK_B,
4027ac6a76cSjason-ch chen PW_REG_SSPM2SPM_WAKEUP_MASK_B,
4037ac6a76cSjason-ch chen PW_REG_SCP2SPM_WAKEUP_MASK_B,
4047ac6a76cSjason-ch chen PW_REG_CSYSPWRUP_ACK_MASK,
4057ac6a76cSjason-ch chen PW_REG_SPM_RESERVED_SRCCLKENA_MASK_B,
4067ac6a76cSjason-ch chen PW_REG_SPM_RESERVED_INFRA_REQ_MASK_B,
4077ac6a76cSjason-ch chen PW_REG_SPM_RESERVED_APSRC_REQ_MASK_B,
4087ac6a76cSjason-ch chen PW_REG_SPM_RESERVED_VRF18_REQ_MASK_B,
4097ac6a76cSjason-ch chen PW_REG_SPM_RESERVED_DDREN_REQ_MASK_B,
4107ac6a76cSjason-ch chen PW_REG_MCUPM_SRCCLKENA_MASK_B,
4117ac6a76cSjason-ch chen PW_REG_MCUPM_INFRA_REQ_MASK_B,
4127ac6a76cSjason-ch chen PW_REG_MCUPM_APSRC_REQ_MASK_B,
4137ac6a76cSjason-ch chen PW_REG_MCUPM_VRF18_REQ_MASK_B,
4147ac6a76cSjason-ch chen PW_REG_MCUPM_DDREN_REQ_MASK_B,
4157ac6a76cSjason-ch chen PW_REG_MSDC0_SRCCLKENA_MASK_B,
4167ac6a76cSjason-ch chen PW_REG_MSDC0_INFRA_REQ_MASK_B,
4177ac6a76cSjason-ch chen PW_REG_MSDC0_APSRC_REQ_MASK_B,
4187ac6a76cSjason-ch chen PW_REG_MSDC0_VRF18_REQ_MASK_B,
4197ac6a76cSjason-ch chen PW_REG_MSDC0_DDREN_REQ_MASK_B,
4207ac6a76cSjason-ch chen PW_REG_MSDC1_SRCCLKENA_MASK_B,
4217ac6a76cSjason-ch chen PW_REG_MSDC1_INFRA_REQ_MASK_B,
4227ac6a76cSjason-ch chen PW_REG_MSDC1_APSRC_REQ_MASK_B,
4237ac6a76cSjason-ch chen PW_REG_MSDC1_VRF18_REQ_MASK_B,
4247ac6a76cSjason-ch chen PW_REG_MSDC1_DDREN_REQ_MASK_B,
4257ac6a76cSjason-ch chen
4267ac6a76cSjason-ch chen /* SPM_SRC4_MASK */
4277ac6a76cSjason-ch chen PW_REG_CCIF_EVENT_SRCCLKENA_MASK_B,
4287ac6a76cSjason-ch chen PW_REG_BAK_PSRI_SRCCLKENA_MASK_B,
4297ac6a76cSjason-ch chen PW_REG_BAK_PSRI_INFRA_REQ_MASK_B,
4307ac6a76cSjason-ch chen PW_REG_BAK_PSRI_APSRC_REQ_MASK_B,
4317ac6a76cSjason-ch chen PW_REG_BAK_PSRI_VRF18_REQ_MASK_B,
4327ac6a76cSjason-ch chen PW_REG_BAK_PSRI_DDREN_REQ_MASK_B,
4337ac6a76cSjason-ch chen PW_REG_DRAMC_MD32_INFRA_REQ_MASK_B,
4347ac6a76cSjason-ch chen PW_REG_DRAMC_MD32_VRF18_REQ_MASK_B,
4357ac6a76cSjason-ch chen PW_REG_CONN_SRCCLKENB2PWRAP_MASK_B,
4367ac6a76cSjason-ch chen PW_REG_DRAMC_MD32_APSRC_REQ_MASK_B,
4377ac6a76cSjason-ch chen
4387ac6a76cSjason-ch chen /* SPM_SRC5_MASK */
4397ac6a76cSjason-ch chen PW_REG_MCUSYS_MERGE_APSRC_REQ_MASK_B,
4407ac6a76cSjason-ch chen PW_REG_MCUSYS_MERGE_DDREN_REQ_MASK_B,
4417ac6a76cSjason-ch chen PW_REG_AFE_SRCCLKENA_MASK_B,
4427ac6a76cSjason-ch chen PW_REG_AFE_INFRA_REQ_MASK_B,
4437ac6a76cSjason-ch chen PW_REG_AFE_APSRC_REQ_MASK_B,
4447ac6a76cSjason-ch chen PW_REG_AFE_VRF18_REQ_MASK_B,
4457ac6a76cSjason-ch chen PW_REG_AFE_DDREN_REQ_MASK_B,
4467ac6a76cSjason-ch chen PW_REG_MSDC2_SRCCLKENA_MASK_B,
4477ac6a76cSjason-ch chen PW_REG_MSDC2_INFRA_REQ_MASK_B,
4487ac6a76cSjason-ch chen PW_REG_MSDC2_APSRC_REQ_MASK_B,
4497ac6a76cSjason-ch chen PW_REG_MSDC2_VRF18_REQ_MASK_B,
4507ac6a76cSjason-ch chen PW_REG_MSDC2_DDREN_REQ_MASK_B,
4517ac6a76cSjason-ch chen
4527ac6a76cSjason-ch chen /* SPM_WAKEUP_EVENT_MASK */
4537ac6a76cSjason-ch chen PW_REG_WAKEUP_EVENT_MASK,
4547ac6a76cSjason-ch chen
4557ac6a76cSjason-ch chen /* SPM_WAKEUP_EVENT_EXT_MASK */
4567ac6a76cSjason-ch chen PW_REG_EXT_WAKEUP_EVENT_MASK,
4577ac6a76cSjason-ch chen
4587ac6a76cSjason-ch chen /* SPM_SRC7_MASK */
4597ac6a76cSjason-ch chen PW_REG_PCIE_SRCCLKENA_MASK_B,
4607ac6a76cSjason-ch chen PW_REG_PCIE_INFRA_REQ_MASK_B,
4617ac6a76cSjason-ch chen PW_REG_PCIE_APSRC_REQ_MASK_B,
4627ac6a76cSjason-ch chen PW_REG_PCIE_VRF18_REQ_MASK_B,
4637ac6a76cSjason-ch chen PW_REG_PCIE_DDREN_REQ_MASK_B,
4647ac6a76cSjason-ch chen PW_REG_DPMAIF_SRCCLKENA_MASK_B,
4657ac6a76cSjason-ch chen PW_REG_DPMAIF_INFRA_REQ_MASK_B,
4667ac6a76cSjason-ch chen PW_REG_DPMAIF_APSRC_REQ_MASK_B,
4677ac6a76cSjason-ch chen PW_REG_DPMAIF_VRF18_REQ_MASK_B,
4687ac6a76cSjason-ch chen PW_REG_DPMAIF_DDREN_REQ_MASK_B,
4697ac6a76cSjason-ch chen
4707ac6a76cSjason-ch chen PW_MAX_COUNT,
4717ac6a76cSjason-ch chen };
4727ac6a76cSjason-ch chen
4737ac6a76cSjason-ch chen /*
4747ac6a76cSjason-ch chen * ACK HW MODE SETTING
4757ac6a76cSjason-ch chen * 0: trigger(1)
4767ac6a76cSjason-ch chen * 1: trigger(0)
4777ac6a76cSjason-ch chen * 2: trigger(1) and target(0)
4787ac6a76cSjason-ch chen * 3: trigger(0) and target(1)
4797ac6a76cSjason-ch chen * 4: trigger(1) and target(1)
4807ac6a76cSjason-ch chen * 5: trigger(0) and target(0)
4817ac6a76cSjason-ch chen */
4827ac6a76cSjason-ch chen #define TRIG_H_TAR_L (2U)
4837ac6a76cSjason-ch chen #define TRIG_L_TAR_H (3U)
4847ac6a76cSjason-ch chen #define TRIG_H_TAR_H (4U)
4857ac6a76cSjason-ch chen #define TRIG_L_TAR_L (5U)
4867ac6a76cSjason-ch chen
4877ac6a76cSjason-ch chen #define SPM_INTERNAL_STATUS_HW_S1 (1U << 0)
4887ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_SEL_HW_S1 (0x00350098)
4897ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_HW_S1_CNT (1U)
4907ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_CON_HW_MODE_TRIG (TRIG_L_TAR_H << 9u)
4917ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_CON_EN (0x110)
4927ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_CON_CLR_ALL (0x2)
4937ac6a76cSjason-ch chen #define SPM_ACK_CHK_3_CON_RESULT (0x8000)
4947ac6a76cSjason-ch chen
4957ac6a76cSjason-ch chen struct wake_status_trace_comm {
4967ac6a76cSjason-ch chen uint32_t debug_flag; /* PCM_WDT_LATCH_SPARE_0 */
4977ac6a76cSjason-ch chen uint32_t debug_flag1; /* PCM_WDT_LATCH_SPARE_1 */
4987ac6a76cSjason-ch chen uint32_t timer_out; /* SPM_SW_RSV_6*/
4997ac6a76cSjason-ch chen uint32_t b_sw_flag0; /* SPM_SW_RSV_7 */
5007ac6a76cSjason-ch chen uint32_t b_sw_flag1; /* SPM_SW_RSV_7 */
5017ac6a76cSjason-ch chen uint32_t r12; /* SPM_SW_RSV_0 */
5027ac6a76cSjason-ch chen uint32_t r13; /* PCM_REG13_DATA */
5037ac6a76cSjason-ch chen uint32_t req_sta0; /* SRC_REQ_STA_0 */
5047ac6a76cSjason-ch chen uint32_t req_sta1; /* SRC_REQ_STA_1 */
5057ac6a76cSjason-ch chen uint32_t req_sta2; /* SRC_REQ_STA_2 */
5067ac6a76cSjason-ch chen uint32_t req_sta3; /* SRC_REQ_STA_3 */
5077ac6a76cSjason-ch chen uint32_t req_sta4; /* SRC_REQ_STA_4 */
5087ac6a76cSjason-ch chen uint32_t raw_sta; /* SPM_WAKEUP_STA */
5097ac6a76cSjason-ch chen uint32_t times_h; /* timestamp high bits */
5107ac6a76cSjason-ch chen uint32_t times_l; /* timestamp low bits */
5117ac6a76cSjason-ch chen uint32_t resumetime; /* timestamp low bits */
5127ac6a76cSjason-ch chen };
5137ac6a76cSjason-ch chen
5147ac6a76cSjason-ch chen struct wake_status_trace {
5157ac6a76cSjason-ch chen struct wake_status_trace_comm comm;
5167ac6a76cSjason-ch chen };
5177ac6a76cSjason-ch chen
5187ac6a76cSjason-ch chen struct wake_status {
5197ac6a76cSjason-ch chen struct wake_status_trace tr;
5207ac6a76cSjason-ch chen uint32_t r12; /* SPM_BK_WAKE_EVENT */
5217ac6a76cSjason-ch chen uint32_t r12_ext; /* SPM_WAKEUP_EXT_STA */
5227ac6a76cSjason-ch chen uint32_t raw_sta; /* SPM_WAKEUP_STA */
5237ac6a76cSjason-ch chen uint32_t raw_ext_sta; /* SPM_WAKEUP_EXT_STA */
5247ac6a76cSjason-ch chen uint32_t md32pcm_wakeup_sta; /* MD32CPM_WAKEUP_STA */
5257ac6a76cSjason-ch chen uint32_t md32pcm_event_sta; /* MD32PCM_EVENT_STA */
5267ac6a76cSjason-ch chen uint32_t wake_misc; /* SPM_BK_WAKE_MISC */
5277ac6a76cSjason-ch chen uint32_t timer_out; /* SPM_BK_PCM_TIMER */
5287ac6a76cSjason-ch chen uint32_t r13; /* PCM_REG13_DATA */
5297ac6a76cSjason-ch chen uint32_t idle_sta; /* SUBSYS_IDLE_STA */
5307ac6a76cSjason-ch chen uint32_t req_sta0; /* SRC_REQ_STA_0 */
5317ac6a76cSjason-ch chen uint32_t req_sta1; /* SRC_REQ_STA_1 */
5327ac6a76cSjason-ch chen uint32_t req_sta2; /* SRC_REQ_STA_2 */
5337ac6a76cSjason-ch chen uint32_t req_sta3; /* SRC_REQ_STA_3 */
5347ac6a76cSjason-ch chen uint32_t req_sta4; /* SRC_REQ_STA_4 */
5357ac6a76cSjason-ch chen uint32_t cg_check_sta; /* SPM_CG_CHECK_STA */
5367ac6a76cSjason-ch chen uint32_t debug_flag; /* PCM_WDT_LATCH_SPARE_0 */
5377ac6a76cSjason-ch chen uint32_t debug_flag1; /* PCM_WDT_LATCH_SPARE_1 */
5387ac6a76cSjason-ch chen uint32_t b_sw_flag0; /* SPM_SW_RSV_7 */
5397ac6a76cSjason-ch chen uint32_t b_sw_flag1; /* SPM_SW_RSV_8 */
5407ac6a76cSjason-ch chen uint32_t isr; /* SPM_IRQ_STA */
5417ac6a76cSjason-ch chen uint32_t sw_flag0; /* SPM_SW_FLAG_0 */
5427ac6a76cSjason-ch chen uint32_t sw_flag1; /* SPM_SW_FLAG_1 */
5437ac6a76cSjason-ch chen uint32_t clk_settle; /* SPM_CLK_SETTLE */
5447ac6a76cSjason-ch chen uint32_t src_req; /* SPM_SRC_REQ */
5457ac6a76cSjason-ch chen uint32_t log_index;
5467ac6a76cSjason-ch chen uint32_t abort;
5477ac6a76cSjason-ch chen uint32_t rt_req_sta0; /* SPM_SW_RSV_2 */
5487ac6a76cSjason-ch chen uint32_t rt_req_sta1; /* SPM_SW_RSV_3 */
5497ac6a76cSjason-ch chen uint32_t rt_req_sta2; /* SPM_SW_RSV_4 */
5507ac6a76cSjason-ch chen uint32_t rt_req_sta3; /* SPM_SW_RSV_5 */
5517ac6a76cSjason-ch chen uint32_t rt_req_sta4; /* SPM_SW_RSV_6 */
5527ac6a76cSjason-ch chen uint32_t mcupm_req_sta;
5537ac6a76cSjason-ch chen };
5547ac6a76cSjason-ch chen
5557ac6a76cSjason-ch chen struct spm_lp_scen {
5567ac6a76cSjason-ch chen struct pcm_desc *pcmdesc;
5577ac6a76cSjason-ch chen struct pwr_ctrl *pwrctrl;
5587ac6a76cSjason-ch chen };
5597ac6a76cSjason-ch chen
5607ac6a76cSjason-ch chen extern struct spm_lp_scen __spm_vcorefs;
5617ac6a76cSjason-ch chen
5627ac6a76cSjason-ch chen extern void __spm_set_cpu_status(unsigned int cpu);
5637ac6a76cSjason-ch chen extern void __spm_reset_and_init_pcm(const struct pcm_desc *pcmdesc);
5647ac6a76cSjason-ch chen extern void __spm_kick_im_to_fetch(const struct pcm_desc *pcmdesc);
5657ac6a76cSjason-ch chen extern void __spm_init_pcm_register(void);
5667ac6a76cSjason-ch chen extern void __spm_src_req_update(const struct pwr_ctrl *pwrctrl,
5677ac6a76cSjason-ch chen unsigned int resource_usage);
5687ac6a76cSjason-ch chen extern void __spm_set_power_control(const struct pwr_ctrl *pwrctrl);
5697ac6a76cSjason-ch chen extern void __spm_disable_pcm_timer(void);
5707ac6a76cSjason-ch chen extern void __spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl);
5717ac6a76cSjason-ch chen extern void __spm_kick_pcm_to_run(struct pwr_ctrl *pwrctrl);
5727ac6a76cSjason-ch chen extern void __spm_set_pcm_flags(struct pwr_ctrl *pwrctrl);
5737ac6a76cSjason-ch chen extern void __spm_send_cpu_wakeup_event(void);
5747ac6a76cSjason-ch chen
5757ac6a76cSjason-ch chen extern void __spm_get_wakeup_status(struct wake_status *wakesta,
5767ac6a76cSjason-ch chen unsigned int ext_status);
5777ac6a76cSjason-ch chen extern void __spm_clean_after_wakeup(void);
5787ac6a76cSjason-ch chen extern wake_reason_t __spm_output_wake_reason(int state_id,
5797ac6a76cSjason-ch chen const struct wake_status *wakesta);
580*635e6b10Sjason-ch chen extern void __spm_sync_vcore_dvfs_power_control(struct pwr_ctrl *dest_pwr_ctrl,
581*635e6b10Sjason-ch chen const struct pwr_ctrl *src_pwr_ctrl);
5827ac6a76cSjason-ch chen extern void __spm_set_pcm_wdt(int en);
5837ac6a76cSjason-ch chen extern uint32_t _spm_get_wake_period(int pwake_time, wake_reason_t last_wr);
5847ac6a76cSjason-ch chen extern void __spm_set_fw_resume_option(struct pwr_ctrl *pwrctrl);
5857ac6a76cSjason-ch chen extern void __spm_ext_int_wakeup_req_clr(void);
5867ac6a76cSjason-ch chen extern void __spm_xo_soc_bblpm(int en);
5877ac6a76cSjason-ch chen
set_pwrctrl_pcm_flags(struct pwr_ctrl * pwrctrl,uint32_t flags)5887ac6a76cSjason-ch chen static inline void set_pwrctrl_pcm_flags(struct pwr_ctrl *pwrctrl,
5897ac6a76cSjason-ch chen uint32_t flags)
5907ac6a76cSjason-ch chen {
5917ac6a76cSjason-ch chen if (pwrctrl->pcm_flags_cust == 0U) {
5927ac6a76cSjason-ch chen pwrctrl->pcm_flags = flags;
5937ac6a76cSjason-ch chen } else {
5947ac6a76cSjason-ch chen pwrctrl->pcm_flags = pwrctrl->pcm_flags_cust;
5957ac6a76cSjason-ch chen }
5967ac6a76cSjason-ch chen }
5977ac6a76cSjason-ch chen
set_pwrctrl_pcm_flags1(struct pwr_ctrl * pwrctrl,uint32_t flags)5987ac6a76cSjason-ch chen static inline void set_pwrctrl_pcm_flags1(struct pwr_ctrl *pwrctrl,
5997ac6a76cSjason-ch chen uint32_t flags)
6007ac6a76cSjason-ch chen {
6017ac6a76cSjason-ch chen if (pwrctrl->pcm_flags1_cust == 0U) {
6027ac6a76cSjason-ch chen pwrctrl->pcm_flags1 = flags;
6037ac6a76cSjason-ch chen } else {
6047ac6a76cSjason-ch chen pwrctrl->pcm_flags1 = pwrctrl->pcm_flags1_cust;
6057ac6a76cSjason-ch chen }
6067ac6a76cSjason-ch chen }
6077ac6a76cSjason-ch chen
6087ac6a76cSjason-ch chen extern void __spm_hw_s1_state_monitor(int en, unsigned int *status);
6097ac6a76cSjason-ch chen
spm_hw_s1_state_monitor_resume(void)6107ac6a76cSjason-ch chen static inline void spm_hw_s1_state_monitor_resume(void)
6117ac6a76cSjason-ch chen {
6127ac6a76cSjason-ch chen __spm_hw_s1_state_monitor(1, NULL);
6137ac6a76cSjason-ch chen }
6147ac6a76cSjason-ch chen
spm_hw_s1_state_monitor_pause(unsigned int * status)6157ac6a76cSjason-ch chen static inline void spm_hw_s1_state_monitor_pause(unsigned int *status)
6167ac6a76cSjason-ch chen {
6177ac6a76cSjason-ch chen __spm_hw_s1_state_monitor(0, status);
6187ac6a76cSjason-ch chen }
6197ac6a76cSjason-ch chen
6207ac6a76cSjason-ch chen #endif /* MT_SPM_INTERNAL_H */
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