| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_xlat_setup.c | 20 mmap_add_region(total_base, total_base, in sq_mmap_setup()
27 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in sq_mmap_setup()
34 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, in sq_mmap_setup()
42 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in sq_mmap_setup()
47 mmap_add_region(SQ_REG_REGION_BASE, SQ_REG_REGION_BASE, in sq_mmap_setup()
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_xlat_setup.c | 41 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in uniphier_mmap_setup()
48 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in uniphier_mmap_setup()
55 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in uniphier_mmap_setup()
61 mmap_add_region(uniphier_reg_region[soc].base, in uniphier_mmap_setup()
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| /rk3399_ARM-atf/plat/rockchip/common/aarch32/ |
| H A D | platform_common.c | 26 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_svc_mon()
28 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_svc_mon()
30 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in plat_configure_mmu_svc_mon()
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| /rk3399_ARM-atf/plat/marvell/armada/common/aarch64/ |
| H A D | marvell_common.c | 52 mmap_add_region(total_base, total_base, in marvell_setup_page_tables()
59 mmap_add_region(code_start, code_start, in marvell_setup_page_tables()
66 mmap_add_region(rodata_start, rodata_start, in marvell_setup_page_tables()
74 mmap_add_region(coh_start, coh_start, in marvell_setup_page_tables()
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| /rk3399_ARM-atf/plat/rockchip/common/aarch64/ |
| H A D | platform_common.c | 40 mmap_add_region(total_base, total_base, \
43 mmap_add_region(ro_start, ro_start, \
47 mmap_add_region(coh_start, coh_start, \
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| /rk3399_ARM-atf/plat/hisilicon/poplar/aarch64/ |
| H A D | platform_common.c | 58 mmap_add_region(total_base, total_base, \
61 mmap_add_region(ro_start, ro_start, \
64 mmap_add_region(coh_start, coh_start, \
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| /rk3399_ARM-atf/plat/mediatek/mt8173/aarch64/ |
| H A D | platform_common.c | 48 mmap_add_region(total_base, total_base, \
51 mmap_add_region(ro_start, ro_start, \
54 mmap_add_region(coh_start, coh_start, \
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_common.c | 36 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in sunxi_configure_mmu_el3()
39 mmap_add_region(BL_CODE_END, BL_CODE_END, in sunxi_configure_mmu_el3()
43 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, in sunxi_configure_mmu_el3()
48 mmap_add_region(BL_NOBITS_BASE, BL_NOBITS_BASE, in sunxi_configure_mmu_el3()
53 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in sunxi_configure_mmu_el3()
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| /rk3399_ARM-atf/plat/qti/msm8916/ |
| H A D | msm8916_setup.c | 103 mmap_add_region(base, base, size, MT_RW_DATA | MT_SECURE); in msm8916_plat_arch_setup()
104 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in msm8916_plat_arch_setup()
107 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, in msm8916_plat_arch_setup()
110 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in msm8916_plat_arch_setup()
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| /rk3399_ARM-atf/plat/mediatek/mt8183/aarch64/ |
| H A D | platform_common.c | 45 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
47 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
49 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in plat_configure_mmu_el3()
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| /rk3399_ARM-atf/plat/nxp/common/setup/ |
| H A D | ls_common.c | 71 mmap_add_region(info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
87 mmap_add_region((info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
104 mmap_add_region(info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
208 mmap_add_region(total_base, total_base, in ls_setup_page_tables()
215 mmap_add_region(code_start, code_start, in ls_setup_page_tables()
222 mmap_add_region(rodata_start, rodata_start, in ls_setup_page_tables()
230 mmap_add_region(coh_start, coh_start, in ls_setup_page_tables()
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| /rk3399_ARM-atf/plat/hisilicon/hikey/aarch64/ |
| H A D | hikey_common.c | 101 mmap_add_region(total_base, total_base, \
104 mmap_add_region(ro_start, ro_start, \
107 mmap_add_region(coh_start, coh_start, \
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/aarch64/ |
| H A D | hikey960_common.c | 96 mmap_add_region(total_base, total_base, \
99 mmap_add_region(ro_start, ro_start, \
102 mmap_add_region(coh_start, coh_start, \
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| /rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/ |
| H A D | s32cc_bl_common.c | 32 mmap_add_region(code_start, code_start, code_size, in s32cc_bl_mmu_setup()
34 mmap_add_region(rw_start, rw_start, rw_size, in s32cc_bl_mmu_setup()
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| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi3_common.c | 149 mmap_add_region(total_base, total_base, in rpi3_setup_page_tables()
156 mmap_add_region(code_start, code_start, in rpi3_setup_page_tables()
163 mmap_add_region(rodata_start, rodata_start, in rpi3_setup_page_tables()
171 mmap_add_region(coh_start, coh_start, in rpi3_setup_page_tables()
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| /rk3399_ARM-atf/plat/mediatek/mt8186/aarch64/ |
| H A D | platform_common.c | 32 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
34 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
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| /rk3399_ARM-atf/plat/aspeed/ast2700/ |
| H A D | plat_bl31_setup.c | 72 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in bl31_plat_arch_setup()
76 mmap_add_region(BL_CODE_END, BL_CODE_END, in bl31_plat_arch_setup()
81 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_plat_arch_setup()
86 mmap_add_region(BL32_BASE, BL32_BASE, BL32_SIZE, in bl31_plat_arch_setup()
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| /rk3399_ARM-atf/plat/mediatek/mt8192/aarch64/ |
| H A D | platform_common.c | 44 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
46 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
|
| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | bl31_plat_setup.c | 34 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in bl31_early_platform_setup2()
42 mmap_add_region(arg1, arg1, STM32MP_SOC_FW_CONFIG_MAX_SIZE, MT_RO_DATA | MT_SECURE); in bl31_early_platform_setup2()
46 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/mediatek/mt8195/aarch64/ |
| H A D | platform_common.c | 44 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
46 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
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| /rk3399_ARM-atf/plat/renesas/common/aarch64/ |
| H A D | platform_common.c | 160 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
162 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in rcar_configure_mmu_el3()
164 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in rcar_configure_mmu_el3()
177 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
179 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in rcar_configure_mmu_el3()
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| /rk3399_ARM-atf/plat/nvidia/tegra/common/ |
| H A D | tegra_bl31_setup.c | 292 mmap_add_region(rw_start, rw_start, in bl31_plat_arch_setup()
295 mmap_add_region(rodata_start, rodata_start, in bl31_plat_arch_setup()
298 mmap_add_region(code_base, code_base, in bl31_plat_arch_setup()
304 mmap_add_region(params_from_bl2->tzdram_base, in bl31_plat_arch_setup()
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| /rk3399_ARM-atf/plat/imx/imx9/common/ |
| H A D | imx9_bl31_setup.c | 92 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
94 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), in bl31_plat_arch_setup()
98 mmap_add_region(BL32_BASE, BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW); in bl31_plat_arch_setup()
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| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_common.c | 96 mmap_add_region(total_base, total_base, in qti_setup_page_tables()
102 mmap_add_region(code_start, code_start, in qti_setup_page_tables()
108 mmap_add_region(rodata_start, rodata_start, in qti_setup_page_tables()
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| /rk3399_ARM-atf/plat/renesas/rcar_gen4/aarch64/ |
| H A D | platform_common.c | 77 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
79 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in rcar_configure_mmu_el3()
|