xref: /rk3399_ARM-atf/plat/hisilicon/hikey960/aarch64/hikey960_common.c (revision 07217574afcdcd618320c6bcef3bb9887f334537)
12f2abcf4SHaojian Zhuang /*
2*6cfc8078SLukas Hanel  * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
32f2abcf4SHaojian Zhuang  *
42f2abcf4SHaojian Zhuang  * SPDX-License-Identifier: BSD-3-Clause
52f2abcf4SHaojian Zhuang  */
62f2abcf4SHaojian Zhuang 
72f2abcf4SHaojian Zhuang #include <assert.h>
809d40e0eSAntonio Nino Diaz 
92f2abcf4SHaojian Zhuang #include <platform_def.h>
1009d40e0eSAntonio Nino Diaz 
1109d40e0eSAntonio Nino Diaz #include <arch_helpers.h>
1209d40e0eSAntonio Nino Diaz #include <common/bl_common.h>
1309d40e0eSAntonio Nino Diaz #include <common/debug.h>
1409d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
15*6cfc8078SLukas Hanel #include <lib/xlat_tables/xlat_tables_v2.h>
1609d40e0eSAntonio Nino Diaz #include <plat/common/platform.h>
172f2abcf4SHaojian Zhuang 
182f2abcf4SHaojian Zhuang #include "../hikey960_def.h"
192f2abcf4SHaojian Zhuang #include "../hikey960_private.h"
202f2abcf4SHaojian Zhuang 
212f2abcf4SHaojian Zhuang #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
228495c03aSHaojian Zhuang 					DDR_SIZE - DDR_SEC_SIZE,	\
232f2abcf4SHaojian Zhuang 					MT_MEMORY | MT_RW | MT_NS)
242f2abcf4SHaojian Zhuang 
252f2abcf4SHaojian Zhuang #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
262f2abcf4SHaojian Zhuang 					DEVICE_SIZE,			\
272f2abcf4SHaojian Zhuang 					MT_DEVICE | MT_RW | MT_SECURE)
282f2abcf4SHaojian Zhuang 
292f2abcf4SHaojian Zhuang #define MAP_BL1_RW	MAP_REGION_FLAT(BL1_RW_BASE,			\
302f2abcf4SHaojian Zhuang 					BL1_RW_LIMIT - BL1_RW_BASE,	\
312f2abcf4SHaojian Zhuang 					MT_MEMORY | MT_RW | MT_NS)
322f2abcf4SHaojian Zhuang 
332f2abcf4SHaojian Zhuang #define MAP_UFS_DATA	MAP_REGION_FLAT(HIKEY960_UFS_DATA_BASE,		\
342f2abcf4SHaojian Zhuang 					HIKEY960_UFS_DATA_SIZE,		\
352f2abcf4SHaojian Zhuang 					MT_MEMORY | MT_RW | MT_NS)
362f2abcf4SHaojian Zhuang 
372f2abcf4SHaojian Zhuang #define MAP_UFS_DESC	MAP_REGION_FLAT(HIKEY960_UFS_DESC_BASE,		\
382f2abcf4SHaojian Zhuang 					HIKEY960_UFS_DESC_SIZE,		\
392f2abcf4SHaojian Zhuang 					MT_MEMORY | MT_RW | MT_NS)
402f2abcf4SHaojian Zhuang 
415e3325e7SVictor Chong #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
425e3325e7SVictor Chong 					TSP_SEC_MEM_SIZE,		\
435e3325e7SVictor Chong 					MT_MEMORY | MT_RW | MT_SECURE)
445e3325e7SVictor Chong 
452f2abcf4SHaojian Zhuang /*
462f2abcf4SHaojian Zhuang  * Table of regions for different BL stages to map using the MMU.
472f2abcf4SHaojian Zhuang  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
482f2abcf4SHaojian Zhuang  * hikey960_init_mmu_elx() will give the available subset of that,
492f2abcf4SHaojian Zhuang  */
50e8a87acdSRoberto Vargas #ifdef IMAGE_BL1
512f2abcf4SHaojian Zhuang static const mmap_region_t hikey960_mmap[] = {
522f2abcf4SHaojian Zhuang 	MAP_UFS_DATA,
532f2abcf4SHaojian Zhuang 	MAP_BL1_RW,
542f2abcf4SHaojian Zhuang 	MAP_UFS_DESC,
552f2abcf4SHaojian Zhuang 	MAP_DEVICE,
562f2abcf4SHaojian Zhuang 	{0}
572f2abcf4SHaojian Zhuang };
582f2abcf4SHaojian Zhuang #endif
592f2abcf4SHaojian Zhuang 
60e8a87acdSRoberto Vargas #ifdef IMAGE_BL2
612f2abcf4SHaojian Zhuang static const mmap_region_t hikey960_mmap[] = {
622f2abcf4SHaojian Zhuang 	MAP_DDR,
632f2abcf4SHaojian Zhuang 	MAP_DEVICE,
645e3325e7SVictor Chong 	MAP_TSP_MEM,
652f2abcf4SHaojian Zhuang 	{0}
662f2abcf4SHaojian Zhuang };
672f2abcf4SHaojian Zhuang #endif
682f2abcf4SHaojian Zhuang 
69e8a87acdSRoberto Vargas #ifdef IMAGE_BL31
702f2abcf4SHaojian Zhuang static const mmap_region_t hikey960_mmap[] = {
712f2abcf4SHaojian Zhuang 	MAP_DEVICE,
725e3325e7SVictor Chong 	{0}
735e3325e7SVictor Chong };
745e3325e7SVictor Chong #endif
755e3325e7SVictor Chong 
76e8a87acdSRoberto Vargas #ifdef IMAGE_BL32
775e3325e7SVictor Chong static const mmap_region_t hikey960_mmap[] = {
785e3325e7SVictor Chong 	MAP_DEVICE,
795e3325e7SVictor Chong 	MAP_DDR,
802f2abcf4SHaojian Zhuang 	{0}
812f2abcf4SHaojian Zhuang };
822f2abcf4SHaojian Zhuang #endif
832f2abcf4SHaojian Zhuang 
842f2abcf4SHaojian Zhuang /*
852f2abcf4SHaojian Zhuang  * Macro generating the code for the function setting up the pagetables as per
862f2abcf4SHaojian Zhuang  * the platform memory map & initialize the mmu, for the given exception level
872f2abcf4SHaojian Zhuang  */
882f2abcf4SHaojian Zhuang #define HIKEY960_CONFIGURE_MMU_EL(_el)					\
892f2abcf4SHaojian Zhuang 	void hikey960_init_mmu_el##_el(unsigned long total_base,	\
902f2abcf4SHaojian Zhuang 				unsigned long total_size,		\
912f2abcf4SHaojian Zhuang 				unsigned long ro_start,			\
922f2abcf4SHaojian Zhuang 				unsigned long ro_limit,			\
932f2abcf4SHaojian Zhuang 				unsigned long coh_start,		\
942f2abcf4SHaojian Zhuang 				unsigned long coh_limit)		\
952f2abcf4SHaojian Zhuang 	{								\
962f2abcf4SHaojian Zhuang 	       mmap_add_region(total_base, total_base,			\
972f2abcf4SHaojian Zhuang 			       total_size,				\
982f2abcf4SHaojian Zhuang 			       MT_MEMORY | MT_RW | MT_SECURE);		\
992f2abcf4SHaojian Zhuang 	       mmap_add_region(ro_start, ro_start,			\
1002f2abcf4SHaojian Zhuang 			       ro_limit - ro_start,			\
1012f2abcf4SHaojian Zhuang 			       MT_MEMORY | MT_RO | MT_SECURE);		\
1022f2abcf4SHaojian Zhuang 	       mmap_add_region(coh_start, coh_start,			\
1032f2abcf4SHaojian Zhuang 			       coh_limit - coh_start,			\
1042f2abcf4SHaojian Zhuang 			       MT_DEVICE | MT_RW | MT_SECURE);		\
1052f2abcf4SHaojian Zhuang 	       mmap_add(hikey960_mmap);					\
1062f2abcf4SHaojian Zhuang 	       init_xlat_tables();					\
1072f2abcf4SHaojian Zhuang 									\
1082f2abcf4SHaojian Zhuang 	       enable_mmu_el##_el(0);					\
1092f2abcf4SHaojian Zhuang 	}
1102f2abcf4SHaojian Zhuang 
1112f2abcf4SHaojian Zhuang /* Define EL1 and EL3 variants of the function initialising the MMU */
1122f2abcf4SHaojian Zhuang HIKEY960_CONFIGURE_MMU_EL(1)
1132f2abcf4SHaojian Zhuang HIKEY960_CONFIGURE_MMU_EL(3)
1142f2abcf4SHaojian Zhuang 
plat_get_ns_image_entrypoint(void)1152f2abcf4SHaojian Zhuang unsigned long plat_get_ns_image_entrypoint(void)
1162f2abcf4SHaojian Zhuang {
1172f2abcf4SHaojian Zhuang 	return NS_BL1U_BASE;
1182f2abcf4SHaojian Zhuang }
1192f2abcf4SHaojian Zhuang 
plat_get_syscnt_freq2(void)1202f2abcf4SHaojian Zhuang unsigned int plat_get_syscnt_freq2(void)
1212f2abcf4SHaojian Zhuang {
1222f2abcf4SHaojian Zhuang 	return 1920000;
1232f2abcf4SHaojian Zhuang }
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