1174a1cfeSYidi Lin /*
2*810d5681SRex-BC Chen * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
3174a1cfeSYidi Lin *
4174a1cfeSYidi Lin * SPDX-License-Identifier: BSD-3-Clause
5174a1cfeSYidi Lin */
6174a1cfeSYidi Lin
7174a1cfeSYidi Lin #include <lib/xlat_tables/xlat_tables_v2.h>
8174a1cfeSYidi Lin
9174a1cfeSYidi Lin #include <platform_def.h>
10174a1cfeSYidi Lin
11174a1cfeSYidi Lin /* Table of regions to map using the MMU. */
12174a1cfeSYidi Lin const mmap_region_t plat_mmap[] = {
13174a1cfeSYidi Lin /* for TF text, RO, RW */
14174a1cfeSYidi Lin MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
15174a1cfeSYidi Lin MT_DEVICE | MT_RW | MT_SECURE),
16174a1cfeSYidi Lin MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
17174a1cfeSYidi Lin MT_DEVICE | MT_RW | MT_SECURE),
18d336e093SEdward-JW Yang MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
19d336e093SEdward-JW Yang MT_DEVICE | MT_RW | MT_SECURE),
207eb42237SRex-BC Chen MAP_REGION_FLAT(DP_SEC_BASE, DP_SEC_SIZE,
217eb42237SRex-BC Chen MT_DEVICE | MT_RW | MT_SECURE),
22*810d5681SRex-BC Chen MAP_REGION_FLAT(EDP_SEC_BASE, EDP_SEC_SIZE,
237eb42237SRex-BC Chen MT_DEVICE | MT_RW | MT_SECURE),
24339e4924SFlora Fu MAP_REGION_FLAT(APUSYS_SCTRL_REVISER_BASE, APUSYS_SCTRL_REVISER_SIZE,
25339e4924SFlora Fu MT_DEVICE | MT_RW | MT_SECURE),
26339e4924SFlora Fu MAP_REGION_FLAT(APUSYS_APU_S_S_4_BASE, APUSYS_APU_S_S_4_SIZE,
27339e4924SFlora Fu MT_DEVICE | MT_RW | MT_SECURE),
28339e4924SFlora Fu MAP_REGION_FLAT(APUSYS_APU_PLL_BASE, APUSYS_APU_PLL_SIZE,
29339e4924SFlora Fu MT_DEVICE | MT_RW | MT_SECURE),
30339e4924SFlora Fu MAP_REGION_FLAT(APUSYS_APU_ACC_BASE, APUSYS_APU_ACC_SIZE,
31339e4924SFlora Fu MT_DEVICE | MT_RW | MT_SECURE),
32174a1cfeSYidi Lin { 0 }
33174a1cfeSYidi Lin };
34174a1cfeSYidi Lin
35174a1cfeSYidi Lin /*******************************************************************************
36174a1cfeSYidi Lin * Macro generating the code for the function setting up the pagetables as per
37174a1cfeSYidi Lin * the platform memory map & initialize the mmu, for the given exception level
38174a1cfeSYidi Lin ******************************************************************************/
plat_configure_mmu_el3(uintptr_t total_base,uintptr_t total_size,uintptr_t ro_start,uintptr_t ro_limit)39174a1cfeSYidi Lin void plat_configure_mmu_el3(uintptr_t total_base,
40174a1cfeSYidi Lin uintptr_t total_size,
41174a1cfeSYidi Lin uintptr_t ro_start,
42174a1cfeSYidi Lin uintptr_t ro_limit)
43174a1cfeSYidi Lin {
44174a1cfeSYidi Lin mmap_add_region(total_base, total_base, total_size,
45174a1cfeSYidi Lin MT_RW_DATA | MT_SECURE);
46174a1cfeSYidi Lin mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
47174a1cfeSYidi Lin MT_CODE | MT_SECURE);
48174a1cfeSYidi Lin mmap_add(plat_mmap);
49174a1cfeSYidi Lin init_xlat_tables();
50174a1cfeSYidi Lin enable_mmu_el3(0);
51174a1cfeSYidi Lin }
52174a1cfeSYidi Lin
plat_get_syscnt_freq2(void)53174a1cfeSYidi Lin unsigned int plat_get_syscnt_freq2(void)
54174a1cfeSYidi Lin {
55174a1cfeSYidi Lin return SYS_COUNTER_FREQ_IN_TICKS;
56174a1cfeSYidi Lin }
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