| #
04f28f89 |
| 05-Sep-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mt8188" into integration
* changes:
feat(mt8188): add pinctrl support
feat(mt8188): add RTC support
feat(mt8188): add pmic and pwrap support
refator(mediatek): move
Merge changes from topic "mt8188" into integration
* changes:
feat(mt8188): add pinctrl support
feat(mt8188): add RTC support
feat(mt8188): add pmic and pwrap support
refator(mediatek): move pmic.[c|h] to common folder
refator(mediatek): move common definitions of pmic wrap to common folder
feat(mt8188): add IOMMU enable control in SiP service
feat(mt8188): add display port control in SiP service
fix(mediatek): use uppercase for definition
feat(mediatek): move dp drivers to common folder
feat(mediatek): move mtk_cirq.c drivers to cirq folder
feat(mt8188): initialize GIC
feat(mt8188): initialize systimer
feat(mt8188): initialize platform for MediaTek MT8188
refator(mediatek): remove unused files
refator(mediatek): move drivers folder in common to plat/mediatek
feat(mediatek): support coreboot BL31 loading
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| #
810d5681 |
| 12-Jul-2022 |
Rex-BC Chen <rex-bc.chen@mediatek.com> |
fix(mediatek): use uppercase for definition
Use uppercase for definition.
s/eDP_SEC_BASE/EDP_SEC_BASE/.
s/eDP_SEC_SIZE/EDP_SEC_SIZE/.
TEST=build pass for mt8195
BUG=b:233720142
Signed-off-by: Bo-C
fix(mediatek): use uppercase for definition
Use uppercase for definition.
s/eDP_SEC_BASE/EDP_SEC_BASE/.
s/eDP_SEC_SIZE/EDP_SEC_SIZE/.
TEST=build pass for mt8195
BUG=b:233720142
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I390055500a6347b67fefde36a7f103438ba2d5ff
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|
| #
2141a685 |
| 01-Dec-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I0c1f7d6c,I3bec0b58,If24cf213 into integration
* changes:
feat(plat/mediatek/apu): add mt8195 APU clock and pll SiP call
feat(plat/mediatek/apu): add mt8195 APU mcu boot and stop S
Merge changes I0c1f7d6c,I3bec0b58,If24cf213 into integration
* changes:
feat(plat/mediatek/apu): add mt8195 APU clock and pll SiP call
feat(plat/mediatek/apu): add mt8195 APU mcu boot and stop SiP call
feat(plat/mediatek/apu): add mt8195 APU iommap regions
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|
| #
339e4924 |
| 01-Nov-2021 |
Flora Fu <flora.fu@mediatek.com> |
feat(plat/mediatek/apu): add mt8195 APU iommap regions
Add APU iommap settings for reviser, apu_ao and
clock/pll register ranges.
Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: If24cf21
feat(plat/mediatek/apu): add mt8195 APU iommap regions
Add APU iommap settings for reviser, apu_ao and
clock/pll register ranges.
Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: If24cf21318813babfc2c11f38891521c7106b58c
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|
| #
7fa35d06 |
| 02-Jul-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ib8502f9b,I388fd231,I7bd37912,I3a186ed7 into integration
* changes:
feat(plat/mediatek/mt8195): add SPM suspend driver
feat(plat/mediatek/mt8195): support MCUSYS off when system su
Merge changes Ib8502f9b,I388fd231,I7bd37912,I3a186ed7 into integration
* changes:
feat(plat/mediatek/mt8195): add SPM suspend driver
feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
feat(plat/mediatek/mt8195): add support for PTP3
fix(plat/mediatek/mt8195): extend MMU region size
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| #
d336e093 |
| 28-Jun-2021 |
Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.
feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: I388fd2318f471083158992464ecdf2181fc7d87a
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| #
9ff8b8ca |
| 18-Jun-2021 |
Tinghan Shen <tinghan.shen@mediatek.com> |
fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn
fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.
This patch extends the MMU region 0 size to cover all mt8195 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.
Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
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| #
fb88c71d |
| 01-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/mdeiatek/mt8195): add display port control in SiP service" into integration
|
| #
7eb42237 |
| 12-Apr-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(plat/mdeiatek/mt8195): add display port control in SiP service
MTK display port mute/unmute control registers need to be
set in secure world.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.c
feat(plat/mdeiatek/mt8195): add display port control in SiP service
MTK display port mute/unmute control registers need to be
set in secure world.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Iec73650e937bd20e25c18fa28d55ae29e68b10d3
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| #
a92b0256 |
| 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek:
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek: mt8195: Add reboot function for PSCI
mediatek: mt8195: Add gpio driver
mediatek: mt8195: Add SiP service
mediatek: mt8195: Add CPU hotplug and MCDI support
mediatek: mt8195: Add MCDI drivers
mediatek: mt8195: Add SPMC driver
mediatek: mt8195: Initialize delay_timer
mediatek: mt8195: initialize systimer
mediatek: mt8192: move timer driver to common folder
mediatek: mt8195: add sys_cirq support
mediatek: mt8195: initialize GIC
Initialize platform for MediaTek MT8195
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| #
174a1cfe |
| 19-Mar-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
Initialize platform for MediaTek MT8195
- Add basic platform setup
- Add MT8195 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address
Change-Id: I7978e2f32e589
Initialize platform for MediaTek MT8195
- Add basic platform setup
- Add MT8195 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address
Change-Id: I7978e2f32e58900e5cf93f741ee8eaf8b8e3b842
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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|