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Searched refs:MIDR_PN_SHIFT (Results 1 – 15 of 15) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx93/aarch64/
H A Dplat_helpers.S28 ubfx x0, x0, MIDR_PN_SHIFT, #12
29 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/include/lib/cpus/aarch32/
H A Dcpu_macros.S135 ubfx r0, r0, #MIDR_PN_SHIFT, #12
136 ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/plat/rockchip/common/aarch64/
H A Dplat_helpers.S47 ubfx x0, x0, MIDR_PN_SHIFT, #12
48 cmp w0, #((CORTEX_A72_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/plat/imx/common/
H A Dimx8_helpers.S33 ubfx x0, x0, MIDR_PN_SHIFT, #12
34 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/plat/nuvoton/common/
H A Dnuvoton_helpers.S38 ubfx x0, x0, MIDR_PN_SHIFT, #12
39 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcpuamu.c26 (MIDR_PN_MASK << MIDR_PN_SHIFT); in midr_match()
/rk3399_ARM-atf/include/lib/cpus/
H A Dcpu_ops.h13 (MIDR_PN_MASK << MIDR_PN_SHIFT)
/rk3399_ARM-atf/plat/renesas/common/include/
H A Drcar_def.h276 #define MIDR_CA57 (0x0D07U << MIDR_PN_SHIFT)
277 #define MIDR_CA53 (0x0D03U << MIDR_PN_SHIFT)
/rk3399_ARM-atf/plat/renesas/common/aarch64/
H A Dplat_helpers.S360 ubfx x1, x0, MIDR_PN_SHIFT, #12
361 cmp w1, #((CORTEX_A57_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/plat/nvidia/tegra/common/aarch64/
H A Dtegra_helpers.S65 mov x1, #(MIDR_PN_MASK << MIDR_PN_SHIFT)
67 lsr x0, x0, #MIDR_PN_SHIFT
/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcpu_macros.S179 ubfx x0, x0, MIDR_PN_SHIFT, #12
180 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/include/arch/aarch64/
H A Darch.h25 #define MIDR_PN_SHIFT U(0x4) macro
28 #define EXTRACT_PARTNUM(x) ((x >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
/rk3399_ARM-atf/plat/renesas/rzg/
H A Dbl2_plat_setup.c711 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()
/rk3399_ARM-atf/include/arch/aarch32/
H A Darch.h24 #define MIDR_PN_SHIFT U(4) macro
/rk3399_ARM-atf/plat/renesas/rcar/
H A Dbl2_plat_setup.c1080 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()