1*2368d7b1SJacky Bai/* 2*2368d7b1SJacky Bai * Copyright 2022-2023 NXP 3*2368d7b1SJacky Bai * 4*2368d7b1SJacky Bai * SPDX-License-Identifier: BSD-3-Clause 5*2368d7b1SJacky Bai */ 6*2368d7b1SJacky Bai 7*2368d7b1SJacky Bai#include <asm_macros.S> 8*2368d7b1SJacky Bai#include <cortex_a55.h> 9*2368d7b1SJacky Bai 10*2368d7b1SJacky Bai#include <platform_def.h> 11*2368d7b1SJacky Bai 12*2368d7b1SJacky Bai .globl plat_is_my_cpu_primary 13*2368d7b1SJacky Bai .globl plat_my_core_pos 14*2368d7b1SJacky Bai .globl plat_calc_core_pos 15*2368d7b1SJacky Bai .globl platform_mem_init 16*2368d7b1SJacky Bai 17*2368d7b1SJacky Bai /* ------------------------------------------------------ 18*2368d7b1SJacky Bai * Helper macro that reads the part number of the current 19*2368d7b1SJacky Bai * CPU and jumps to the given label if it matches the CPU 20*2368d7b1SJacky Bai * MIDR provided. 21*2368d7b1SJacky Bai * 22*2368d7b1SJacky Bai * Clobbers x0. 23*2368d7b1SJacky Bai * ------------------------------------------------------ 24*2368d7b1SJacky Bai */ 25*2368d7b1SJacky Bai .macro jump_if_cpu_midr _cpu_midr, _label 26*2368d7b1SJacky Bai 27*2368d7b1SJacky Bai mrs x0, midr_el1 28*2368d7b1SJacky Bai ubfx x0, x0, MIDR_PN_SHIFT, #12 29*2368d7b1SJacky Bai cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK) 30*2368d7b1SJacky Bai b.eq \_label 31*2368d7b1SJacky Bai 32*2368d7b1SJacky Bai .endm 33*2368d7b1SJacky Bai 34*2368d7b1SJacky Bai /* ---------------------------------------------- 35*2368d7b1SJacky Bai * unsigned int plat_is_my_cpu_primary(void); 36*2368d7b1SJacky Bai * This function checks if this is the primary CPU 37*2368d7b1SJacky Bai * ---------------------------------------------- 38*2368d7b1SJacky Bai */ 39*2368d7b1SJacky Baifunc plat_is_my_cpu_primary 40*2368d7b1SJacky Bai mrs x0, mpidr_el1 41*2368d7b1SJacky Bai mov_imm x1, MPIDR_AFFINITY_MASK 42*2368d7b1SJacky Bai and x0, x0, x1 43*2368d7b1SJacky Bai cmp x0, #PLAT_PRIMARY_CPU 44*2368d7b1SJacky Bai cset x0, eq 45*2368d7b1SJacky Bai ret 46*2368d7b1SJacky Baiendfunc plat_is_my_cpu_primary 47*2368d7b1SJacky Bai 48*2368d7b1SJacky Bai /* ---------------------------------------------- 49*2368d7b1SJacky Bai * unsigned int plat_my_core_pos(void) 50*2368d7b1SJacky Bai * This function uses the plat_calc_core_pos() 51*2368d7b1SJacky Bai * to get the index of the calling CPU. 52*2368d7b1SJacky Bai * ---------------------------------------------- 53*2368d7b1SJacky Bai */ 54*2368d7b1SJacky Baifunc plat_my_core_pos 55*2368d7b1SJacky Bai mrs x0, mpidr_el1 56*2368d7b1SJacky Bai mov x1, #MPIDR_AFFLVL_MASK 57*2368d7b1SJacky Bai and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT 58*2368d7b1SJacky Bai ret 59*2368d7b1SJacky Baiendfunc plat_my_core_pos 60*2368d7b1SJacky Bai 61*2368d7b1SJacky Bai /* 62*2368d7b1SJacky Bai * unsigned int plat_calc_core_pos(uint64_t mpidr) 63*2368d7b1SJacky Bai * helper function to calculate the core position. 64*2368d7b1SJacky Bai * With this function. 65*2368d7b1SJacky Bai */ 66*2368d7b1SJacky Baifunc plat_calc_core_pos 67*2368d7b1SJacky Bai mov x1, #MPIDR_AFFLVL_MASK 68*2368d7b1SJacky Bai and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT 69*2368d7b1SJacky Bai ret 70*2368d7b1SJacky Baiendfunc plat_calc_core_pos 71*2368d7b1SJacky Bai 72*2368d7b1SJacky Baifunc platform_mem_init 73*2368d7b1SJacky Bai ret 74*2368d7b1SJacky Baiendfunc platform_mem_init 75