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Searched refs:plla (Results 1 – 21 of 21) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dwm8650.dtsi85 plla: plla { label
123 clocks = <&plla>;
H A Dwm8505.dtsi88 plla: plla { label
119 clocks = <&plla>;
H A Dwm8850.dtsi88 plla: plla { label
140 clocks = <&plla>;
H A Dox820.dtsi64 plla: plla { label
75 clocks = <&plla>;
H A Dwm8750.dtsi91 plla: plla { label
129 clocks = <&plla>;
H A Dr8a7779.dtsi514 clock-output-names = "plla", "z", "zs", "s",
H A Dr8a7778.dtsi493 clock-output-names = "plla", "pllb", "b",
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dvt8500.txt59 plla: plla {
/OK3568_Linux_fs/u-boot/drivers/clk/at91/
H A DMakefile6 obj-y += clk-slow.o clk-main.o clk-plla.o clk-master.o
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dat91sam9g20.dtsi43 plla: pllack@0 { label
H A Dsama5d2.dtsi86 plla: pllack@0 { label
100 clocks = <&plla>;
520 clocks = <&main>, <&plla>, <&utmi>, <&mck>;
H A Dat91sam9261.dtsi604 plla: pllack@0 { label
631 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
649 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
H A Dat91sam9260.dtsi141 plla: pllack@0 { label
168 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
186 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
H A Dat91sam9rl.dtsi843 plla: pllack@0 { label
867 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
878 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
H A Dat91sam9263.dtsi121 plla: pllack@0 { label
149 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
167 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
H A Dat91sam9n12.dtsi134 plla: pllack@0 { label
155 clocks = <&plla>;
H A Dat91sam9x5.dtsi143 plla: pllack@0 { label
164 clocks = <&plla>;
H A Dat91sam9g45.dtsi141 plla: pllack@0 { label
162 clocks = <&plla>;
H A Dsama5d3.dtsi977 plla: pllack@0 { label
992 clocks = <&plla>;
H A Dsama5d4.dtsi426 plla: pllack@0 { label
441 clocks = <&plla>;
/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-tegra210.c780 static void tegra210_plla_set_defaults(struct tegra_clk_pll *plla) in tegra210_plla_set_defaults() argument
783 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
785 plla->params->defaults_set = true; in tegra210_plla_set_defaults()
794 plla->params->defaults_set = false; in tegra210_plla_set_defaults()
801 _pll_misc_chk_default(clk_base, plla->params, 0, val, in tegra210_plla_set_defaults()
805 _pll_misc_chk_default(clk_base, plla->params, 2, val, in tegra210_plla_set_defaults()
809 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
812 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
820 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
822 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
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