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Searched refs:pll3 (Results 1 – 19 of 19) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun5i-gr8.dtsi124 pll3: clk@01c20010 { label
126 compatible = "allwinner,sun4i-a10-pll3-clk";
129 clock-output-names = "pll3";
133 compatible = "allwinner,sun4i-a10-pll3-2x-clk";
137 clocks = <&pll3>;
138 clock-output-names = "pll3-2x";
167 compatible = "allwinner,sun4i-a10-pll3-clk";
174 compatible = "allwinner,sun4i-a10-pll3-2x-clk";
439 clocks = <&pll3>, <&pll7>, <&pll5 1>;
448 clocks = <&pll3>, <&pll7>, <&pll5 1>;
[all …]
H A Dsun4i-a10.dtsi224 pll3: clk@01c20010 { label
226 compatible = "allwinner,sun4i-a10-pll3-clk";
229 clock-output-names = "pll3";
237 clocks = <&pll3>;
238 clock-output-names = "pll3-2x";
267 compatible = "allwinner,sun4i-a10-pll3-clk";
586 clocks = <&pll3>, <&pll7>, <&pll5 1>;
595 clocks = <&pll3>, <&pll7>, <&pll5 1>;
604 clocks = <&pll3>, <&pll7>, <&pll5 1>;
613 clocks = <&pll3>, <&pll7>, <&pll5 1>;
[all …]
H A Dsun5i-a13.dtsi179 clocks = <&pll3>, <&pll7>, <&pll5 1>;
188 clocks = <&pll3>, <&pll7>, <&pll5 1>;
197 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
205 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
H A Dsun5i.dtsi124 pll3: clk@01c20010 { label
126 compatible = "allwinner,sun4i-a10-pll3-clk";
129 clock-output-names = "pll3";
133 compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock";
137 clocks = <&pll3>;
138 clock-output-names = "pll3-2x";
167 compatible = "allwinner,sun4i-a10-pll3-clk";
H A Dsun7i-a20.dtsi226 pll3: clk@01c20010 { label
228 compatible = "allwinner,sun4i-a10-pll3-clk";
231 clock-output-names = "pll3";
237 clocks = <&pll3>;
240 clock-output-names = "pll3-2x";
270 compatible = "allwinner,sun4i-a10-pll3-clk";
637 clocks = <&pll3>, <&pll7>, <&pll5 1>;
646 clocks = <&pll3>, <&pll7>, <&pll5 1>;
655 clocks = <&pll3>, <&pll7>, <&pll5 1>;
664 clocks = <&pll3>, <&pll7>, <&pll5 1>;
[all …]
H A Dsun5i-a10s.dtsi68 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
77 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
86 clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
H A Dstm32mp157a-dk1-u-boot.dtsi155 pll3: st,pll@2 { label
H A Dsun9i-a80.dtsi185 pll3: clk@06000008 { label
190 clock-output-names = "pll3";
384 clocks = <&osc32k>, <&osc24M>, <&pll4>, <&pll3>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dprima2-clock.txt19 pll3 4
/OK3568_Linux_fs/kernel/drivers/clk/sunxi/
H A DMakefile18 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-pll3.o
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h195 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member
H A Dintel_dpll_mgr.c1877 temp |= pll->state.hw_state.pll3; in bxt_ddi_pll_enable()
2002 hw_state->pll3 = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 3)); in bxt_ddi_pll_get_hw_state()
2003 hw_state->pll3 &= PORT_PLL_M2_FRAC_ENABLE; in bxt_ddi_pll_get_hw_state()
2167 dpll_hw_state->pll3 = PORT_PLL_M2_FRAC_ENABLE; in bxt_ddi_set_dpll_hw_state()
2215 if (pll_state->pll3 & PORT_PLL_M2_FRAC_ENABLE) in bxt_ddi_pll_get_freq()
2275 hw_state->pll3, in bxt_dump_hw_state()
H A Dintel_display.c14003 PIPE_CONF_CHECK_X(dpll_hw_state.pll3); in intel_pipe_config_compare()
/OK3568_Linux_fs/kernel/drivers/clk/sirf/
H A Dclk-prima2.c60 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
H A Dclk-atlas6.c61 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
/OK3568_Linux_fs/kernel/drivers/gpu/drm/tegra/
H A Dsor.c368 unsigned int pll3; member
2292 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2294 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2512 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2521 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2775 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_dp_enable()
2777 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_dp_enable()
3294 .pll3 = 0x1a,
3466 .pll3 = 0x1a,
3527 .pll3 = 0x166,
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Dgcc-msm8960.c28 static struct clk_pll pll3 = { variable
3142 [PLL3] = &pll3.clkr,
3370 [PLL3] = &pll3.clkr,
H A Dgcc-ipq806x.c55 static struct clk_pll pll3 = { variable
2758 [PLL3] = &pll3.clkr,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsh73a0.dtsi652 "pll3", "dsi0phy", "dsi1phy",