Home
last modified time | relevance | path

Searched refs:enable_val (Results 1 – 25 of 27) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c46 u32 enable_val; member
63 .enable_val = EXYNOS4_PHY_ENABLE,
72 .enable_val = EXYNOS4_PHY_ENABLE,
81 .enable_val = EXYNOS4_PHY_ENABLE,
90 .enable_val = EXYNOS4_PHY_ENABLE,
108 .enable_val = EXYNOS4_PHY_ENABLE,
117 .enable_val = EXYNOS4_PHY_ENABLE,
126 .enable_val = EXYNOS4_PHY_ENABLE,
135 .enable_val = EXYNOS4_PHY_ENABLE,
144 .enable_val = EXYNOS4_PHY_ENABLE,
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Djcore-pit.c39 u32 enable_val; member
75 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
141 u32 irqprio, enable_val; in jcore_pit_init() local
214 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
239 pit->enable_val = enable_val; in jcore_pit_init()
/OK3568_Linux_fs/kernel/drivers/leds/
H A Dleds-lm36274.c53 int enable_val = 0; in lm36274_init() local
57 enable_val |= (1 << chip->led_sources[i]); in lm36274_init()
59 if (!enable_val) { in lm36274_init()
64 enable_val |= LM36274_BL_EN; in lm36274_init()
66 return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); in lm36274_init()
/OK3568_Linux_fs/kernel/drivers/regulator/
H A Dbd9576-regulator.c106 .enable_val = BD957X_REGULATOR_DIS_VAL,
125 .enable_val = BD957X_REGULATOR_DIS_VAL,
143 .enable_val = BD957X_REGULATOR_DIS_VAL,
162 .enable_val = BD957X_REGULATOR_DIS_VAL,
181 .enable_val = BD957X_REGULATOR_DIS_VAL,
198 .enable_val = BD957X_REGULATOR_DIS_VAL,
H A Drk808-regulator.c91 .enable_val = (_enval), \
115 .enable_val = (_enval), \
152 .enable_val = (_enval), \
779 val &= rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
952 .enable_val = ENABLE_MASK(RK805_ID_DCDC1),
971 .enable_val = ENABLE_MASK(RK805_ID_DCDC2),
986 .enable_val = ENABLE_MASK(RK805_ID_DCDC3),
1005 .enable_val = ENABLE_MASK(RK805_ID_DCDC4),
1132 .enable_val = BIT(4) | BIT(0),
1151 .enable_val = BIT(5) | BIT(1),
[all …]
H A Dstpmic1_regulator.c210 .enable_val = 1, \
230 .enable_val = 1, \
252 .enable_val = 1, \
272 .enable_val = 1, \
293 .enable_val = 1, \
310 .enable_val = BOOST_ENABLED, \
327 .enable_val = USBSW_OTG_SWITCH_ENABLED, \
347 .enable_val = SWIN_SWOUT_ENABLED, \
H A Dhelpers.c39 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
40 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
43 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
44 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
66 val = rdev->desc->enable_val; in regulator_enable_regmap()
90 val = rdev->desc->enable_val; in regulator_disable_regmap()
H A Dcpcap-regulator.c122 .enable_val = (mode_val), \
178 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
198 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
206 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
H A Dqcom-labibb-regulator.c59 .enable_val = LABIBB_CONTROL_ENABLE,
71 .enable_val = LABIBB_CONTROL_ENABLE,
H A Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
H A Dstw481x-vmmc.c50 .enable_val = STW_CONF1_PDN_VMMC,
H A Dtps6105x-regulator.c51 .enable_val = TPS6105X_REG0_MODE_VOLTAGE <<
H A Ds5m8767.c927 int enable_reg, enable_val; in s5m8767_pmic_probe() local
944 &enable_val); in s5m8767_pmic_probe()
951 regulators[id].enable_val = enable_val; in s5m8767_pmic_probe()
H A Dpbias-regulator.c210 desc->enable_val = info->enable; in pbias_regulator_probe()
H A Duniphier-regulator.c143 .enable_val = USB3VBUS_REG_EN | USB3VBUS_REG,
H A Dlp87565-regulator.c31 .enable_val = _ev, \
H A Dsc2731-regulator.c142 .enable_val = 0, \
H A Drk806-regulator.c774 return (val & rdev->desc->enable_val) != 0; in rk806_regulator_is_enabled_regmap()
797 rdev->desc->enable_val); in rk806_regulator_enable_regmap()
962 .enable_val = ENABLE_MASK(ctrl_bit),\
H A Dwl2868c-regulator.c109 .enable_val = (_enval), \
H A Dpfuze100-regulator.c352 .enable_val = 0x8, \
845 desc->enable_val = 0x8; in pfuze100_regulator_probe()
H A Dpalmas-regulator.c476 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; in palmas_set_mode_smps()
1259 desc->enable_val = SMPS_CTRL_MODE_ON; in palmas_smps_registration()
1364 desc->enable_val = SMPS_CTRL_MODE_ON; in tps65917_smps_registration()
H A Dtps65090-regulator.c194 .enable_val = _en_bits, \
/OK3568_Linux_fs/kernel/drivers/media/cec/platform/seco/
H A Dseco-cec.c154 u16 enable_val = 0; in secocec_adap_log_addr() local
158 status = smb_rd16(SECOCEC_ENABLE_REG_1, &enable_val); in secocec_adap_log_addr()
163 enable_val & ~SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
176 enable_val | SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
/OK3568_Linux_fs/kernel/include/linux/regulator/
H A Ddriver.h362 unsigned int enable_val; member
/OK3568_Linux_fs/kernel/drivers/power/supply/
H A Ducs1002_power.c530 .enable_val = F_PWR_EN_SET,

12