1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun // Copyright (c) 2020, The Linux Foundation. All rights reserved.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include <linux/module.h>
5*4882a593Smuzhiyun #include <linux/of_irq.h>
6*4882a593Smuzhiyun #include <linux/of.h>
7*4882a593Smuzhiyun #include <linux/of_device.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/regmap.h>
10*4882a593Smuzhiyun #include <linux/regulator/driver.h>
11*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define REG_PERPH_TYPE 0x04
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define QCOM_LAB_TYPE 0x24
16*4882a593Smuzhiyun #define QCOM_IBB_TYPE 0x20
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define PMI8998_LAB_REG_BASE 0xde00
19*4882a593Smuzhiyun #define PMI8998_IBB_REG_BASE 0xdc00
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define REG_LABIBB_STATUS1 0x08
22*4882a593Smuzhiyun #define REG_LABIBB_ENABLE_CTL 0x46
23*4882a593Smuzhiyun #define LABIBB_STATUS1_VREG_OK_BIT BIT(7)
24*4882a593Smuzhiyun #define LABIBB_CONTROL_ENABLE BIT(7)
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define LAB_ENABLE_CTL_MASK BIT(7)
27*4882a593Smuzhiyun #define IBB_ENABLE_CTL_MASK (BIT(7) | BIT(6))
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define LABIBB_OFF_ON_DELAY 1000
30*4882a593Smuzhiyun #define LAB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 2)
31*4882a593Smuzhiyun #define IBB_ENABLE_TIME (LABIBB_OFF_ON_DELAY * 10)
32*4882a593Smuzhiyun #define LABIBB_POLL_ENABLED_TIME 1000
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct labibb_regulator {
35*4882a593Smuzhiyun struct regulator_desc desc;
36*4882a593Smuzhiyun struct device *dev;
37*4882a593Smuzhiyun struct regmap *regmap;
38*4882a593Smuzhiyun struct regulator_dev *rdev;
39*4882a593Smuzhiyun u16 base;
40*4882a593Smuzhiyun u8 type;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct labibb_regulator_data {
44*4882a593Smuzhiyun const char *name;
45*4882a593Smuzhiyun u8 type;
46*4882a593Smuzhiyun u16 base;
47*4882a593Smuzhiyun const struct regulator_desc *desc;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static const struct regulator_ops qcom_labibb_ops = {
51*4882a593Smuzhiyun .enable = regulator_enable_regmap,
52*4882a593Smuzhiyun .disable = regulator_disable_regmap,
53*4882a593Smuzhiyun .is_enabled = regulator_is_enabled_regmap,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct regulator_desc pmi8998_lab_desc = {
57*4882a593Smuzhiyun .enable_mask = LAB_ENABLE_CTL_MASK,
58*4882a593Smuzhiyun .enable_reg = (PMI8998_LAB_REG_BASE + REG_LABIBB_ENABLE_CTL),
59*4882a593Smuzhiyun .enable_val = LABIBB_CONTROL_ENABLE,
60*4882a593Smuzhiyun .enable_time = LAB_ENABLE_TIME,
61*4882a593Smuzhiyun .poll_enabled_time = LABIBB_POLL_ENABLED_TIME,
62*4882a593Smuzhiyun .off_on_delay = LABIBB_OFF_ON_DELAY,
63*4882a593Smuzhiyun .owner = THIS_MODULE,
64*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
65*4882a593Smuzhiyun .ops = &qcom_labibb_ops,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static const struct regulator_desc pmi8998_ibb_desc = {
69*4882a593Smuzhiyun .enable_mask = IBB_ENABLE_CTL_MASK,
70*4882a593Smuzhiyun .enable_reg = (PMI8998_IBB_REG_BASE + REG_LABIBB_ENABLE_CTL),
71*4882a593Smuzhiyun .enable_val = LABIBB_CONTROL_ENABLE,
72*4882a593Smuzhiyun .enable_time = IBB_ENABLE_TIME,
73*4882a593Smuzhiyun .poll_enabled_time = LABIBB_POLL_ENABLED_TIME,
74*4882a593Smuzhiyun .off_on_delay = LABIBB_OFF_ON_DELAY,
75*4882a593Smuzhiyun .owner = THIS_MODULE,
76*4882a593Smuzhiyun .type = REGULATOR_VOLTAGE,
77*4882a593Smuzhiyun .ops = &qcom_labibb_ops,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static const struct labibb_regulator_data pmi8998_labibb_data[] = {
81*4882a593Smuzhiyun {"lab", QCOM_LAB_TYPE, PMI8998_LAB_REG_BASE, &pmi8998_lab_desc},
82*4882a593Smuzhiyun {"ibb", QCOM_IBB_TYPE, PMI8998_IBB_REG_BASE, &pmi8998_ibb_desc},
83*4882a593Smuzhiyun { },
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static const struct of_device_id qcom_labibb_match[] = {
87*4882a593Smuzhiyun { .compatible = "qcom,pmi8998-lab-ibb", .data = &pmi8998_labibb_data},
88*4882a593Smuzhiyun { },
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_labibb_match);
91*4882a593Smuzhiyun
qcom_labibb_regulator_probe(struct platform_device * pdev)92*4882a593Smuzhiyun static int qcom_labibb_regulator_probe(struct platform_device *pdev)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun struct labibb_regulator *vreg;
95*4882a593Smuzhiyun struct device *dev = &pdev->dev;
96*4882a593Smuzhiyun struct regulator_config cfg = {};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun const struct of_device_id *match;
99*4882a593Smuzhiyun const struct labibb_regulator_data *reg_data;
100*4882a593Smuzhiyun struct regmap *reg_regmap;
101*4882a593Smuzhiyun unsigned int type;
102*4882a593Smuzhiyun int ret;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun reg_regmap = dev_get_regmap(pdev->dev.parent, NULL);
105*4882a593Smuzhiyun if (!reg_regmap) {
106*4882a593Smuzhiyun dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
107*4882a593Smuzhiyun return -ENODEV;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun match = of_match_device(qcom_labibb_match, &pdev->dev);
111*4882a593Smuzhiyun if (!match)
112*4882a593Smuzhiyun return -ENODEV;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun for (reg_data = match->data; reg_data->name; reg_data++) {
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* Validate if the type of regulator is indeed
117*4882a593Smuzhiyun * what's mentioned in DT.
118*4882a593Smuzhiyun */
119*4882a593Smuzhiyun ret = regmap_read(reg_regmap, reg_data->base + REG_PERPH_TYPE,
120*4882a593Smuzhiyun &type);
121*4882a593Smuzhiyun if (ret < 0) {
122*4882a593Smuzhiyun dev_err(dev,
123*4882a593Smuzhiyun "Peripheral type read failed ret=%d\n",
124*4882a593Smuzhiyun ret);
125*4882a593Smuzhiyun return -EINVAL;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (WARN_ON((type != QCOM_LAB_TYPE) && (type != QCOM_IBB_TYPE)) ||
129*4882a593Smuzhiyun WARN_ON(type != reg_data->type))
130*4882a593Smuzhiyun return -EINVAL;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg),
133*4882a593Smuzhiyun GFP_KERNEL);
134*4882a593Smuzhiyun if (!vreg)
135*4882a593Smuzhiyun return -ENOMEM;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun vreg->regmap = reg_regmap;
138*4882a593Smuzhiyun vreg->dev = dev;
139*4882a593Smuzhiyun vreg->base = reg_data->base;
140*4882a593Smuzhiyun vreg->type = reg_data->type;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun memcpy(&vreg->desc, reg_data->desc, sizeof(vreg->desc));
143*4882a593Smuzhiyun vreg->desc.of_match = reg_data->name;
144*4882a593Smuzhiyun vreg->desc.name = reg_data->name;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun cfg.dev = vreg->dev;
147*4882a593Smuzhiyun cfg.driver_data = vreg;
148*4882a593Smuzhiyun cfg.regmap = vreg->regmap;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun vreg->rdev = devm_regulator_register(vreg->dev, &vreg->desc,
151*4882a593Smuzhiyun &cfg);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (IS_ERR(vreg->rdev)) {
154*4882a593Smuzhiyun dev_err(dev, "qcom_labibb: error registering %s : %d\n",
155*4882a593Smuzhiyun reg_data->name, ret);
156*4882a593Smuzhiyun return PTR_ERR(vreg->rdev);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return 0;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static struct platform_driver qcom_labibb_regulator_driver = {
164*4882a593Smuzhiyun .driver = {
165*4882a593Smuzhiyun .name = "qcom-lab-ibb-regulator",
166*4882a593Smuzhiyun .of_match_table = qcom_labibb_match,
167*4882a593Smuzhiyun },
168*4882a593Smuzhiyun .probe = qcom_labibb_regulator_probe,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun module_platform_driver(qcom_labibb_regulator_driver);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm labibb driver");
173*4882a593Smuzhiyun MODULE_AUTHOR("Nisha Kumari <nishakumari@codeaurora.org>");
174*4882a593Smuzhiyun MODULE_AUTHOR("Sumit Semwal <sumit.semwal@linaro.org>");
175*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
176