xref: /OK3568_Linux_fs/kernel/drivers/power/supply/ucs1002_power.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Driver for UCS1002 Programmable USB Port Power Controller
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2019 Zodiac Inflight Innovations
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/bits.h>
8*4882a593Smuzhiyun #include <linux/freezer.h>
9*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/kthread.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/of_irq.h>
18*4882a593Smuzhiyun #include <linux/power_supply.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/regulator/driver.h>
21*4882a593Smuzhiyun #include <linux/regulator/of_regulator.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* UCS1002 Registers */
24*4882a593Smuzhiyun #define UCS1002_REG_CURRENT_MEASUREMENT	0x00
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun  * The Total Accumulated Charge registers store the total accumulated
28*4882a593Smuzhiyun  * charge delivered from the VS source to a portable device. The total
29*4882a593Smuzhiyun  * value is calculated using four registers, from 01h to 04h. The bit
30*4882a593Smuzhiyun  * weighting of the registers is given in mA/hrs.
31*4882a593Smuzhiyun  */
32*4882a593Smuzhiyun #define UCS1002_REG_TOTAL_ACC_CHARGE	0x01
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* Other Status Register */
35*4882a593Smuzhiyun #define UCS1002_REG_OTHER_STATUS	0x0f
36*4882a593Smuzhiyun #  define F_ADET_PIN			BIT(4)
37*4882a593Smuzhiyun #  define F_CHG_ACT			BIT(3)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* Interrupt Status */
40*4882a593Smuzhiyun #define UCS1002_REG_INTERRUPT_STATUS	0x10
41*4882a593Smuzhiyun #  define F_ERR				BIT(7)
42*4882a593Smuzhiyun #  define F_DISCHARGE_ERR		BIT(6)
43*4882a593Smuzhiyun #  define F_RESET			BIT(5)
44*4882a593Smuzhiyun #  define F_MIN_KEEP_OUT		BIT(4)
45*4882a593Smuzhiyun #  define F_TSD				BIT(3)
46*4882a593Smuzhiyun #  define F_OVER_VOLT			BIT(2)
47*4882a593Smuzhiyun #  define F_BACK_VOLT			BIT(1)
48*4882a593Smuzhiyun #  define F_OVER_ILIM			BIT(0)
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Pin Status Register */
51*4882a593Smuzhiyun #define UCS1002_REG_PIN_STATUS		0x14
52*4882a593Smuzhiyun #  define UCS1002_PWR_STATE_MASK	0x03
53*4882a593Smuzhiyun #  define F_PWR_EN_PIN			BIT(6)
54*4882a593Smuzhiyun #  define F_M2_PIN			BIT(5)
55*4882a593Smuzhiyun #  define F_M1_PIN			BIT(4)
56*4882a593Smuzhiyun #  define F_EM_EN_PIN			BIT(3)
57*4882a593Smuzhiyun #  define F_SEL_PIN			BIT(2)
58*4882a593Smuzhiyun #  define F_ACTIVE_MODE_MASK		GENMASK(5, 3)
59*4882a593Smuzhiyun #  define F_ACTIVE_MODE_PASSTHROUGH	F_M2_PIN
60*4882a593Smuzhiyun #  define F_ACTIVE_MODE_DEDICATED	F_EM_EN_PIN
61*4882a593Smuzhiyun #  define F_ACTIVE_MODE_BC12_DCP	(F_M2_PIN | F_EM_EN_PIN)
62*4882a593Smuzhiyun #  define F_ACTIVE_MODE_BC12_SDP	F_M1_PIN
63*4882a593Smuzhiyun #  define F_ACTIVE_MODE_BC12_CDP	(F_M1_PIN | F_M2_PIN | F_EM_EN_PIN)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* General Configuration Register */
66*4882a593Smuzhiyun #define UCS1002_REG_GENERAL_CFG		0x15
67*4882a593Smuzhiyun #  define F_RATION_EN			BIT(3)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* Emulation Configuration Register */
70*4882a593Smuzhiyun #define UCS1002_REG_EMU_CFG		0x16
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Switch Configuration Register */
73*4882a593Smuzhiyun #define UCS1002_REG_SWITCH_CFG		0x17
74*4882a593Smuzhiyun #  define F_PIN_IGNORE			BIT(7)
75*4882a593Smuzhiyun #  define F_EM_EN_SET			BIT(5)
76*4882a593Smuzhiyun #  define F_M2_SET			BIT(4)
77*4882a593Smuzhiyun #  define F_M1_SET			BIT(3)
78*4882a593Smuzhiyun #  define F_S0_SET			BIT(2)
79*4882a593Smuzhiyun #  define F_PWR_EN_SET			BIT(1)
80*4882a593Smuzhiyun #  define F_LATCH_SET			BIT(0)
81*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_MASK	GENMASK(5, 3)
82*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_PASSTHROUGH	F_M2_SET
83*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_DEDICATED	F_EM_EN_SET
84*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_BC12_DCP	(F_M2_SET | F_EM_EN_SET)
85*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_BC12_SDP	F_M1_SET
86*4882a593Smuzhiyun #  define V_SET_ACTIVE_MODE_BC12_CDP	(F_M1_SET | F_M2_SET | F_EM_EN_SET)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* Current Limit Register */
89*4882a593Smuzhiyun #define UCS1002_REG_ILIMIT		0x19
90*4882a593Smuzhiyun #  define UCS1002_ILIM_SW_MASK		GENMASK(3, 0)
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /* Product ID */
93*4882a593Smuzhiyun #define UCS1002_REG_PRODUCT_ID		0xfd
94*4882a593Smuzhiyun #  define UCS1002_PRODUCT_ID		0x4e
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /* Manufacture name */
97*4882a593Smuzhiyun #define UCS1002_MANUFACTURER		"SMSC"
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun struct ucs1002_info {
100*4882a593Smuzhiyun 	struct power_supply *charger;
101*4882a593Smuzhiyun 	struct i2c_client *client;
102*4882a593Smuzhiyun 	struct regmap *regmap;
103*4882a593Smuzhiyun 	struct regulator_desc *regulator_descriptor;
104*4882a593Smuzhiyun 	struct regulator_dev *rdev;
105*4882a593Smuzhiyun 	bool present;
106*4882a593Smuzhiyun 	bool output_disable;
107*4882a593Smuzhiyun 	struct delayed_work health_poll;
108*4882a593Smuzhiyun 	int health;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun static enum power_supply_property ucs1002_props[] = {
113*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ONLINE,
114*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
115*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
116*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_MAX,
117*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT, /* the presence of PED */
118*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
119*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_USB_TYPE,
120*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun 
ucs1002_get_online(struct ucs1002_info * info,union power_supply_propval * val)123*4882a593Smuzhiyun static int ucs1002_get_online(struct ucs1002_info *info,
124*4882a593Smuzhiyun 			      union power_supply_propval *val)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	unsigned int reg;
127*4882a593Smuzhiyun 	int ret;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_OTHER_STATUS, &reg);
130*4882a593Smuzhiyun 	if (ret)
131*4882a593Smuzhiyun 		return ret;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	val->intval = !!(reg & F_CHG_ACT);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
ucs1002_get_charge(struct ucs1002_info * info,union power_supply_propval * val)138*4882a593Smuzhiyun static int ucs1002_get_charge(struct ucs1002_info *info,
139*4882a593Smuzhiyun 			      union power_supply_propval *val)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	/*
142*4882a593Smuzhiyun 	 * To fit within 32 bits some values are rounded (uA/h)
143*4882a593Smuzhiyun 	 *
144*4882a593Smuzhiyun 	 * For Total Accumulated Charge Middle Low Byte register, addr
145*4882a593Smuzhiyun 	 * 03h, byte 2
146*4882a593Smuzhiyun 	 *
147*4882a593Smuzhiyun 	 *   B0: 0.01084 mA/h rounded to 11 uA/h
148*4882a593Smuzhiyun 	 *   B1: 0.02169 mA/h rounded to 22 uA/h
149*4882a593Smuzhiyun 	 *   B2: 0.04340 mA/h rounded to 43 uA/h
150*4882a593Smuzhiyun 	 *   B3: 0.08676 mA/h rounded to 87 uA/h
151*4882a593Smuzhiyun 	 *   B4: 0.17350 mA/h rounded to 173 uÁ/h
152*4882a593Smuzhiyun 	 *
153*4882a593Smuzhiyun 	 * For Total Accumulated Charge Low Byte register, addr 04h,
154*4882a593Smuzhiyun 	 * byte 3
155*4882a593Smuzhiyun 	 *
156*4882a593Smuzhiyun 	 *   B6: 0.00271 mA/h rounded to 3 uA/h
157*4882a593Smuzhiyun 	 *   B7: 0.005422 mA/h rounded to 5 uA/h
158*4882a593Smuzhiyun 	 */
159*4882a593Smuzhiyun 	static const int bit_weights_uAh[BITS_PER_TYPE(u32)] = {
160*4882a593Smuzhiyun 		/*
161*4882a593Smuzhiyun 		 * Bit corresponding to low byte (offset 0x04)
162*4882a593Smuzhiyun 		 * B0 B1 B2 B3 B4 B5 B6 B7
163*4882a593Smuzhiyun 		 */
164*4882a593Smuzhiyun 		0, 0, 0, 0, 0, 0, 3, 5,
165*4882a593Smuzhiyun 		/*
166*4882a593Smuzhiyun 		 * Bit corresponding to middle low byte (offset 0x03)
167*4882a593Smuzhiyun 		 * B0 B1 B2 B3 B4 B5 B6 B7
168*4882a593Smuzhiyun 		 */
169*4882a593Smuzhiyun 		11, 22, 43, 87, 173, 347, 694, 1388,
170*4882a593Smuzhiyun 		/*
171*4882a593Smuzhiyun 		 * Bit corresponding to middle high byte (offset 0x02)
172*4882a593Smuzhiyun 		 * B0 B1 B2 B3 B4 B5 B6 B7
173*4882a593Smuzhiyun 		 */
174*4882a593Smuzhiyun 		2776, 5552, 11105, 22210, 44420, 88840, 177700, 355400,
175*4882a593Smuzhiyun 		/*
176*4882a593Smuzhiyun 		 * Bit corresponding to high byte (offset 0x01)
177*4882a593Smuzhiyun 		 * B0 B1 B2 B3 B4 B5 B6 B7
178*4882a593Smuzhiyun 		 */
179*4882a593Smuzhiyun 		710700, 1421000, 2843000, 5685000, 11371000, 22742000,
180*4882a593Smuzhiyun 		45484000, 90968000,
181*4882a593Smuzhiyun 	};
182*4882a593Smuzhiyun 	unsigned long total_acc_charger;
183*4882a593Smuzhiyun 	unsigned int reg;
184*4882a593Smuzhiyun 	int i, ret;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	ret = regmap_bulk_read(info->regmap, UCS1002_REG_TOTAL_ACC_CHARGE,
187*4882a593Smuzhiyun 			       &reg, sizeof(u32));
188*4882a593Smuzhiyun 	if (ret)
189*4882a593Smuzhiyun 		return ret;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	total_acc_charger = be32_to_cpu(reg); /* BE as per offsets above */
192*4882a593Smuzhiyun 	val->intval = 0;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	for_each_set_bit(i, &total_acc_charger, ARRAY_SIZE(bit_weights_uAh))
195*4882a593Smuzhiyun 		val->intval += bit_weights_uAh[i];
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	return 0;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
ucs1002_get_current(struct ucs1002_info * info,union power_supply_propval * val)200*4882a593Smuzhiyun static int ucs1002_get_current(struct ucs1002_info *info,
201*4882a593Smuzhiyun 			       union power_supply_propval *val)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	/*
204*4882a593Smuzhiyun 	 * The Current Measurement register stores the measured
205*4882a593Smuzhiyun 	 * current value delivered to the portable device. The range
206*4882a593Smuzhiyun 	 * is from 9.76 mA to 2.5 A.
207*4882a593Smuzhiyun 	 */
208*4882a593Smuzhiyun 	static const int bit_weights_uA[BITS_PER_TYPE(u8)] = {
209*4882a593Smuzhiyun 		9760, 19500, 39000, 78100, 156200, 312300, 624600, 1249300,
210*4882a593Smuzhiyun 	};
211*4882a593Smuzhiyun 	unsigned long current_measurement;
212*4882a593Smuzhiyun 	unsigned int reg;
213*4882a593Smuzhiyun 	int i, ret;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_CURRENT_MEASUREMENT, &reg);
216*4882a593Smuzhiyun 	if (ret)
217*4882a593Smuzhiyun 		return ret;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	current_measurement = reg;
220*4882a593Smuzhiyun 	val->intval = 0;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	for_each_set_bit(i, &current_measurement, ARRAY_SIZE(bit_weights_uA))
223*4882a593Smuzhiyun 		val->intval += bit_weights_uA[i];
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun /*
229*4882a593Smuzhiyun  * The Current Limit register stores the maximum current used by the
230*4882a593Smuzhiyun  * port switch. The range is from 500mA to 2.5 A.
231*4882a593Smuzhiyun  */
232*4882a593Smuzhiyun static const u32 ucs1002_current_limit_uA[] = {
233*4882a593Smuzhiyun 	500000, 900000, 1000000, 1200000, 1500000, 1800000, 2000000, 2500000,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun 
ucs1002_get_max_current(struct ucs1002_info * info,union power_supply_propval * val)236*4882a593Smuzhiyun static int ucs1002_get_max_current(struct ucs1002_info *info,
237*4882a593Smuzhiyun 				   union power_supply_propval *val)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	unsigned int reg;
240*4882a593Smuzhiyun 	int ret;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	if (info->output_disable) {
243*4882a593Smuzhiyun 		val->intval = 0;
244*4882a593Smuzhiyun 		return 0;
245*4882a593Smuzhiyun 	}
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_ILIMIT, &reg);
248*4882a593Smuzhiyun 	if (ret)
249*4882a593Smuzhiyun 		return ret;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	val->intval = ucs1002_current_limit_uA[reg & UCS1002_ILIM_SW_MASK];
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
ucs1002_set_max_current(struct ucs1002_info * info,u32 val)256*4882a593Smuzhiyun static int ucs1002_set_max_current(struct ucs1002_info *info, u32 val)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	unsigned int reg;
259*4882a593Smuzhiyun 	int ret, idx;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	if (val == 0) {
262*4882a593Smuzhiyun 		info->output_disable = true;
263*4882a593Smuzhiyun 		regulator_disable_regmap(info->rdev);
264*4882a593Smuzhiyun 		return 0;
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	for (idx = 0; idx < ARRAY_SIZE(ucs1002_current_limit_uA); idx++) {
268*4882a593Smuzhiyun 		if (val == ucs1002_current_limit_uA[idx])
269*4882a593Smuzhiyun 			break;
270*4882a593Smuzhiyun 	}
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	if (idx == ARRAY_SIZE(ucs1002_current_limit_uA))
273*4882a593Smuzhiyun 		return -EINVAL;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	ret = regmap_write(info->regmap, UCS1002_REG_ILIMIT, idx);
276*4882a593Smuzhiyun 	if (ret)
277*4882a593Smuzhiyun 		return ret;
278*4882a593Smuzhiyun 	/*
279*4882a593Smuzhiyun 	 * Any current limit setting exceeding the one set via ILIM
280*4882a593Smuzhiyun 	 * pin will be rejected, so we read out freshly changed limit
281*4882a593Smuzhiyun 	 * to make sure that it took effect.
282*4882a593Smuzhiyun 	 */
283*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_ILIMIT, &reg);
284*4882a593Smuzhiyun 	if (ret)
285*4882a593Smuzhiyun 		return ret;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (reg != idx)
288*4882a593Smuzhiyun 		return -EINVAL;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	info->output_disable = false;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	if (info->rdev && info->rdev->use_count &&
293*4882a593Smuzhiyun 	    !regulator_is_enabled_regmap(info->rdev))
294*4882a593Smuzhiyun 		regulator_enable_regmap(info->rdev);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun static enum power_supply_usb_type ucs1002_usb_types[] = {
300*4882a593Smuzhiyun 	POWER_SUPPLY_USB_TYPE_PD,
301*4882a593Smuzhiyun 	POWER_SUPPLY_USB_TYPE_SDP,
302*4882a593Smuzhiyun 	POWER_SUPPLY_USB_TYPE_DCP,
303*4882a593Smuzhiyun 	POWER_SUPPLY_USB_TYPE_CDP,
304*4882a593Smuzhiyun 	POWER_SUPPLY_USB_TYPE_UNKNOWN,
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun 
ucs1002_set_usb_type(struct ucs1002_info * info,int val)307*4882a593Smuzhiyun static int ucs1002_set_usb_type(struct ucs1002_info *info, int val)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun 	unsigned int mode;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	if (val < 0 || val >= ARRAY_SIZE(ucs1002_usb_types))
312*4882a593Smuzhiyun 		return -EINVAL;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	switch (ucs1002_usb_types[val]) {
315*4882a593Smuzhiyun 	case POWER_SUPPLY_USB_TYPE_PD:
316*4882a593Smuzhiyun 		mode = V_SET_ACTIVE_MODE_DEDICATED;
317*4882a593Smuzhiyun 		break;
318*4882a593Smuzhiyun 	case POWER_SUPPLY_USB_TYPE_SDP:
319*4882a593Smuzhiyun 		mode = V_SET_ACTIVE_MODE_BC12_SDP;
320*4882a593Smuzhiyun 		break;
321*4882a593Smuzhiyun 	case POWER_SUPPLY_USB_TYPE_DCP:
322*4882a593Smuzhiyun 		mode = V_SET_ACTIVE_MODE_BC12_DCP;
323*4882a593Smuzhiyun 		break;
324*4882a593Smuzhiyun 	case POWER_SUPPLY_USB_TYPE_CDP:
325*4882a593Smuzhiyun 		mode = V_SET_ACTIVE_MODE_BC12_CDP;
326*4882a593Smuzhiyun 		break;
327*4882a593Smuzhiyun 	default:
328*4882a593Smuzhiyun 		return -EINVAL;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	return regmap_update_bits(info->regmap, UCS1002_REG_SWITCH_CFG,
332*4882a593Smuzhiyun 				  V_SET_ACTIVE_MODE_MASK, mode);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
ucs1002_get_usb_type(struct ucs1002_info * info,union power_supply_propval * val)335*4882a593Smuzhiyun static int ucs1002_get_usb_type(struct ucs1002_info *info,
336*4882a593Smuzhiyun 				union power_supply_propval *val)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun 	enum power_supply_usb_type type;
339*4882a593Smuzhiyun 	unsigned int reg;
340*4882a593Smuzhiyun 	int ret;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_PIN_STATUS, &reg);
343*4882a593Smuzhiyun 	if (ret)
344*4882a593Smuzhiyun 		return ret;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	switch (reg & F_ACTIVE_MODE_MASK) {
347*4882a593Smuzhiyun 	default:
348*4882a593Smuzhiyun 		type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
349*4882a593Smuzhiyun 		break;
350*4882a593Smuzhiyun 	case F_ACTIVE_MODE_DEDICATED:
351*4882a593Smuzhiyun 		type = POWER_SUPPLY_USB_TYPE_PD;
352*4882a593Smuzhiyun 		break;
353*4882a593Smuzhiyun 	case F_ACTIVE_MODE_BC12_SDP:
354*4882a593Smuzhiyun 		type = POWER_SUPPLY_USB_TYPE_SDP;
355*4882a593Smuzhiyun 		break;
356*4882a593Smuzhiyun 	case F_ACTIVE_MODE_BC12_DCP:
357*4882a593Smuzhiyun 		type = POWER_SUPPLY_USB_TYPE_DCP;
358*4882a593Smuzhiyun 		break;
359*4882a593Smuzhiyun 	case F_ACTIVE_MODE_BC12_CDP:
360*4882a593Smuzhiyun 		type = POWER_SUPPLY_USB_TYPE_CDP;
361*4882a593Smuzhiyun 		break;
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	val->intval = type;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	return 0;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun 
ucs1002_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)369*4882a593Smuzhiyun static int ucs1002_get_property(struct power_supply *psy,
370*4882a593Smuzhiyun 				enum power_supply_property psp,
371*4882a593Smuzhiyun 				union power_supply_propval *val)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun 	struct ucs1002_info *info = power_supply_get_drvdata(psy);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	switch (psp) {
376*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_ONLINE:
377*4882a593Smuzhiyun 		return ucs1002_get_online(info, val);
378*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_NOW:
379*4882a593Smuzhiyun 		return ucs1002_get_charge(info, val);
380*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_NOW:
381*4882a593Smuzhiyun 		return ucs1002_get_current(info, val);
382*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_MAX:
383*4882a593Smuzhiyun 		return ucs1002_get_max_current(info, val);
384*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_USB_TYPE:
385*4882a593Smuzhiyun 		return ucs1002_get_usb_type(info, val);
386*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_HEALTH:
387*4882a593Smuzhiyun 		return val->intval = info->health;
388*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_PRESENT:
389*4882a593Smuzhiyun 		val->intval = info->present;
390*4882a593Smuzhiyun 		return 0;
391*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_MANUFACTURER:
392*4882a593Smuzhiyun 		val->strval = UCS1002_MANUFACTURER;
393*4882a593Smuzhiyun 		return 0;
394*4882a593Smuzhiyun 	default:
395*4882a593Smuzhiyun 		return -EINVAL;
396*4882a593Smuzhiyun 	}
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun 
ucs1002_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)399*4882a593Smuzhiyun static int ucs1002_set_property(struct power_supply *psy,
400*4882a593Smuzhiyun 				enum power_supply_property psp,
401*4882a593Smuzhiyun 				const union power_supply_propval *val)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	struct ucs1002_info *info = power_supply_get_drvdata(psy);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	switch (psp) {
406*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_MAX:
407*4882a593Smuzhiyun 		return ucs1002_set_max_current(info, val->intval);
408*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_USB_TYPE:
409*4882a593Smuzhiyun 		return ucs1002_set_usb_type(info, val->intval);
410*4882a593Smuzhiyun 	default:
411*4882a593Smuzhiyun 		return -EINVAL;
412*4882a593Smuzhiyun 	}
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
ucs1002_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)415*4882a593Smuzhiyun static int ucs1002_property_is_writeable(struct power_supply *psy,
416*4882a593Smuzhiyun 					 enum power_supply_property psp)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun 	switch (psp) {
419*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_MAX:
420*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_USB_TYPE:
421*4882a593Smuzhiyun 		return true;
422*4882a593Smuzhiyun 	default:
423*4882a593Smuzhiyun 		return false;
424*4882a593Smuzhiyun 	}
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun static const struct power_supply_desc ucs1002_charger_desc = {
428*4882a593Smuzhiyun 	.name			= "ucs1002",
429*4882a593Smuzhiyun 	.type			= POWER_SUPPLY_TYPE_USB,
430*4882a593Smuzhiyun 	.usb_types		= ucs1002_usb_types,
431*4882a593Smuzhiyun 	.num_usb_types		= ARRAY_SIZE(ucs1002_usb_types),
432*4882a593Smuzhiyun 	.get_property		= ucs1002_get_property,
433*4882a593Smuzhiyun 	.set_property		= ucs1002_set_property,
434*4882a593Smuzhiyun 	.property_is_writeable	= ucs1002_property_is_writeable,
435*4882a593Smuzhiyun 	.properties		= ucs1002_props,
436*4882a593Smuzhiyun 	.num_properties		= ARRAY_SIZE(ucs1002_props),
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun 
ucs1002_health_poll(struct work_struct * work)439*4882a593Smuzhiyun static void ucs1002_health_poll(struct work_struct *work)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun 	struct ucs1002_info *info = container_of(work, struct ucs1002_info,
442*4882a593Smuzhiyun 						 health_poll.work);
443*4882a593Smuzhiyun 	int ret;
444*4882a593Smuzhiyun 	u32 reg;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_INTERRUPT_STATUS, &reg);
447*4882a593Smuzhiyun 	if (ret)
448*4882a593Smuzhiyun 		return;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	/* bad health and no status change, just schedule us again in a while */
451*4882a593Smuzhiyun 	if ((reg & F_ERR) && info->health != POWER_SUPPLY_HEALTH_GOOD) {
452*4882a593Smuzhiyun 		schedule_delayed_work(&info->health_poll,
453*4882a593Smuzhiyun 				      msecs_to_jiffies(2000));
454*4882a593Smuzhiyun 		return;
455*4882a593Smuzhiyun 	}
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (reg & F_TSD)
458*4882a593Smuzhiyun 		info->health = POWER_SUPPLY_HEALTH_OVERHEAT;
459*4882a593Smuzhiyun 	else if (reg & (F_OVER_VOLT | F_BACK_VOLT))
460*4882a593Smuzhiyun 		info->health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
461*4882a593Smuzhiyun 	else if (reg & F_OVER_ILIM)
462*4882a593Smuzhiyun 		info->health = POWER_SUPPLY_HEALTH_OVERCURRENT;
463*4882a593Smuzhiyun 	else if (reg & (F_DISCHARGE_ERR | F_MIN_KEEP_OUT))
464*4882a593Smuzhiyun 		info->health = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
465*4882a593Smuzhiyun 	else
466*4882a593Smuzhiyun 		info->health = POWER_SUPPLY_HEALTH_GOOD;
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	sysfs_notify(&info->charger->dev.kobj, NULL, "health");
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun 
ucs1002_charger_irq(int irq,void * data)471*4882a593Smuzhiyun static irqreturn_t ucs1002_charger_irq(int irq, void *data)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	int ret, regval;
474*4882a593Smuzhiyun 	bool present;
475*4882a593Smuzhiyun 	struct ucs1002_info *info = data;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	present = info->present;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_OTHER_STATUS, &regval);
480*4882a593Smuzhiyun 	if (ret)
481*4882a593Smuzhiyun 		return IRQ_HANDLED;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	/* update attached status */
484*4882a593Smuzhiyun 	info->present = regval & F_ADET_PIN;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	/* notify the change */
487*4882a593Smuzhiyun 	if (present != info->present)
488*4882a593Smuzhiyun 		power_supply_changed(info->charger);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	return IRQ_HANDLED;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
ucs1002_alert_irq(int irq,void * data)493*4882a593Smuzhiyun static irqreturn_t ucs1002_alert_irq(int irq, void *data)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	struct ucs1002_info *info = data;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	mod_delayed_work(system_wq, &info->health_poll, 0);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	return IRQ_HANDLED;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun 
ucs1002_regulator_enable(struct regulator_dev * rdev)502*4882a593Smuzhiyun static int ucs1002_regulator_enable(struct regulator_dev *rdev)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	struct ucs1002_info *info = rdev_get_drvdata(rdev);
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	/*
507*4882a593Smuzhiyun 	 * If the output is disabled due to 0 maximum current, just pretend the
508*4882a593Smuzhiyun 	 * enable did work. The regulator will be enabled as soon as we get a
509*4882a593Smuzhiyun 	 * a non-zero maximum current budget.
510*4882a593Smuzhiyun 	 */
511*4882a593Smuzhiyun 	if (info->output_disable)
512*4882a593Smuzhiyun 		return 0;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	return regulator_enable_regmap(rdev);
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun static const struct regulator_ops ucs1002_regulator_ops = {
518*4882a593Smuzhiyun 	.is_enabled	= regulator_is_enabled_regmap,
519*4882a593Smuzhiyun 	.enable		= ucs1002_regulator_enable,
520*4882a593Smuzhiyun 	.disable	= regulator_disable_regmap,
521*4882a593Smuzhiyun };
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun static const struct regulator_desc ucs1002_regulator_descriptor = {
524*4882a593Smuzhiyun 	.name		= "ucs1002-vbus",
525*4882a593Smuzhiyun 	.ops		= &ucs1002_regulator_ops,
526*4882a593Smuzhiyun 	.type		= REGULATOR_VOLTAGE,
527*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
528*4882a593Smuzhiyun 	.enable_reg	= UCS1002_REG_SWITCH_CFG,
529*4882a593Smuzhiyun 	.enable_mask	= F_PWR_EN_SET,
530*4882a593Smuzhiyun 	.enable_val	= F_PWR_EN_SET,
531*4882a593Smuzhiyun 	.fixed_uV	= 5000000,
532*4882a593Smuzhiyun 	.n_voltages	= 1,
533*4882a593Smuzhiyun };
534*4882a593Smuzhiyun 
ucs1002_probe(struct i2c_client * client,const struct i2c_device_id * dev_id)535*4882a593Smuzhiyun static int ucs1002_probe(struct i2c_client *client,
536*4882a593Smuzhiyun 			 const struct i2c_device_id *dev_id)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	struct device *dev = &client->dev;
539*4882a593Smuzhiyun 	struct power_supply_config charger_config = {};
540*4882a593Smuzhiyun 	const struct regmap_config regmap_config = {
541*4882a593Smuzhiyun 		.reg_bits = 8,
542*4882a593Smuzhiyun 		.val_bits = 8,
543*4882a593Smuzhiyun 	};
544*4882a593Smuzhiyun 	struct regulator_config regulator_config = {};
545*4882a593Smuzhiyun 	int irq_a_det, irq_alert, ret;
546*4882a593Smuzhiyun 	struct ucs1002_info *info;
547*4882a593Smuzhiyun 	unsigned int regval;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
550*4882a593Smuzhiyun 	if (!info)
551*4882a593Smuzhiyun 		return -ENOMEM;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	info->regmap = devm_regmap_init_i2c(client, &regmap_config);
554*4882a593Smuzhiyun 	ret = PTR_ERR_OR_ZERO(info->regmap);
555*4882a593Smuzhiyun 	if (ret) {
556*4882a593Smuzhiyun 		dev_err(dev, "Regmap initialization failed: %d\n", ret);
557*4882a593Smuzhiyun 		return ret;
558*4882a593Smuzhiyun 	}
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	info->client = client;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	irq_a_det = of_irq_get_byname(dev->of_node, "a_det");
563*4882a593Smuzhiyun 	irq_alert = of_irq_get_byname(dev->of_node, "alert");
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	charger_config.of_node = dev->of_node;
566*4882a593Smuzhiyun 	charger_config.drv_data = info;
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_PRODUCT_ID, &regval);
569*4882a593Smuzhiyun 	if (ret) {
570*4882a593Smuzhiyun 		dev_err(dev, "Failed to read product ID: %d\n", ret);
571*4882a593Smuzhiyun 		return ret;
572*4882a593Smuzhiyun 	}
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	if (regval != UCS1002_PRODUCT_ID) {
575*4882a593Smuzhiyun 		dev_err(dev,
576*4882a593Smuzhiyun 			"Product ID does not match (0x%02x != 0x%02x)\n",
577*4882a593Smuzhiyun 			regval, UCS1002_PRODUCT_ID);
578*4882a593Smuzhiyun 		return -ENODEV;
579*4882a593Smuzhiyun 	}
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	/* Enable charge rationing by default */
582*4882a593Smuzhiyun 	ret = regmap_update_bits(info->regmap, UCS1002_REG_GENERAL_CFG,
583*4882a593Smuzhiyun 				 F_RATION_EN, F_RATION_EN);
584*4882a593Smuzhiyun 	if (ret) {
585*4882a593Smuzhiyun 		dev_err(dev, "Failed to read general config: %d\n", ret);
586*4882a593Smuzhiyun 		return ret;
587*4882a593Smuzhiyun 	}
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	/*
590*4882a593Smuzhiyun 	 * Ignore the M1, M2, PWR_EN, and EM_EN pin states. Set active
591*4882a593Smuzhiyun 	 * mode selection to BC1.2 CDP.
592*4882a593Smuzhiyun 	 */
593*4882a593Smuzhiyun 	ret = regmap_update_bits(info->regmap, UCS1002_REG_SWITCH_CFG,
594*4882a593Smuzhiyun 				 V_SET_ACTIVE_MODE_MASK | F_PIN_IGNORE,
595*4882a593Smuzhiyun 				 V_SET_ACTIVE_MODE_BC12_CDP | F_PIN_IGNORE);
596*4882a593Smuzhiyun 	if (ret) {
597*4882a593Smuzhiyun 		dev_err(dev, "Failed to configure default mode: %d\n", ret);
598*4882a593Smuzhiyun 		return ret;
599*4882a593Smuzhiyun 	}
600*4882a593Smuzhiyun 	/*
601*4882a593Smuzhiyun 	 * Be safe and set initial current limit to 500mA
602*4882a593Smuzhiyun 	 */
603*4882a593Smuzhiyun 	ret = ucs1002_set_max_current(info, 500000);
604*4882a593Smuzhiyun 	if (ret) {
605*4882a593Smuzhiyun 		dev_err(dev, "Failed to set max current default: %d\n", ret);
606*4882a593Smuzhiyun 		return ret;
607*4882a593Smuzhiyun 	}
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	info->charger = devm_power_supply_register(dev, &ucs1002_charger_desc,
610*4882a593Smuzhiyun 						   &charger_config);
611*4882a593Smuzhiyun 	ret = PTR_ERR_OR_ZERO(info->charger);
612*4882a593Smuzhiyun 	if (ret) {
613*4882a593Smuzhiyun 		dev_err(dev, "Failed to register power supply: %d\n", ret);
614*4882a593Smuzhiyun 		return ret;
615*4882a593Smuzhiyun 	}
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	ret = regmap_read(info->regmap, UCS1002_REG_PIN_STATUS, &regval);
618*4882a593Smuzhiyun 	if (ret) {
619*4882a593Smuzhiyun 		dev_err(dev, "Failed to read pin status: %d\n", ret);
620*4882a593Smuzhiyun 		return ret;
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	info->regulator_descriptor =
624*4882a593Smuzhiyun 		devm_kmemdup(dev, &ucs1002_regulator_descriptor,
625*4882a593Smuzhiyun 			     sizeof(ucs1002_regulator_descriptor),
626*4882a593Smuzhiyun 			     GFP_KERNEL);
627*4882a593Smuzhiyun 	if (!info->regulator_descriptor)
628*4882a593Smuzhiyun 		return -ENOMEM;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	info->regulator_descriptor->enable_is_inverted = !(regval & F_SEL_PIN);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	regulator_config.dev = dev;
633*4882a593Smuzhiyun 	regulator_config.of_node = dev->of_node;
634*4882a593Smuzhiyun 	regulator_config.regmap = info->regmap;
635*4882a593Smuzhiyun 	regulator_config.driver_data = info;
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	info->rdev = devm_regulator_register(dev, info->regulator_descriptor,
638*4882a593Smuzhiyun 				       &regulator_config);
639*4882a593Smuzhiyun 	ret = PTR_ERR_OR_ZERO(info->rdev);
640*4882a593Smuzhiyun 	if (ret) {
641*4882a593Smuzhiyun 		dev_err(dev, "Failed to register VBUS regulator: %d\n", ret);
642*4882a593Smuzhiyun 		return ret;
643*4882a593Smuzhiyun 	}
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	info->health = POWER_SUPPLY_HEALTH_GOOD;
646*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&info->health_poll, ucs1002_health_poll);
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	if (irq_a_det > 0) {
649*4882a593Smuzhiyun 		ret = devm_request_threaded_irq(dev, irq_a_det, NULL,
650*4882a593Smuzhiyun 						ucs1002_charger_irq,
651*4882a593Smuzhiyun 						IRQF_ONESHOT,
652*4882a593Smuzhiyun 						"ucs1002-a_det", info);
653*4882a593Smuzhiyun 		if (ret) {
654*4882a593Smuzhiyun 			dev_err(dev, "Failed to request A_DET threaded irq: %d\n",
655*4882a593Smuzhiyun 				ret);
656*4882a593Smuzhiyun 			return ret;
657*4882a593Smuzhiyun 		}
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	if (irq_alert > 0) {
661*4882a593Smuzhiyun 		ret = devm_request_irq(dev, irq_alert, ucs1002_alert_irq,
662*4882a593Smuzhiyun 				       0,"ucs1002-alert", info);
663*4882a593Smuzhiyun 		if (ret) {
664*4882a593Smuzhiyun 			dev_err(dev, "Failed to request ALERT threaded irq: %d\n",
665*4882a593Smuzhiyun 				ret);
666*4882a593Smuzhiyun 			return ret;
667*4882a593Smuzhiyun 		}
668*4882a593Smuzhiyun 	}
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	return 0;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun static const struct of_device_id ucs1002_of_match[] = {
674*4882a593Smuzhiyun 	{ .compatible = "microchip,ucs1002", },
675*4882a593Smuzhiyun 	{ /* sentinel */ },
676*4882a593Smuzhiyun };
677*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ucs1002_of_match);
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun static struct i2c_driver ucs1002_driver = {
680*4882a593Smuzhiyun 	.driver = {
681*4882a593Smuzhiyun 		   .name = "ucs1002",
682*4882a593Smuzhiyun 		   .of_match_table = ucs1002_of_match,
683*4882a593Smuzhiyun 	},
684*4882a593Smuzhiyun 	.probe = ucs1002_probe,
685*4882a593Smuzhiyun };
686*4882a593Smuzhiyun module_i2c_driver(ucs1002_driver);
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun MODULE_DESCRIPTION("Microchip UCS1002 Programmable USB Port Power Controller");
689*4882a593Smuzhiyun MODULE_AUTHOR("Enric Balletbo Serra <enric.balletbo@collabora.com>");
690*4882a593Smuzhiyun MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
691*4882a593Smuzhiyun MODULE_LICENSE("GPL");
692