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Searched refs:CONFIG_SYS_DDR_SDRAM_BASE (Results 1 – 25 of 122) sorted by relevance

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/OK3568_Linux_fs/u-boot/board/socrates/
H A Dtlb.c95 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
99 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
/OK3568_Linux_fs/u-boot/board/freescale/c29xpcie/
H A Dtlb.c68 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE,
69 CONFIG_SYS_DDR_SDRAM_BASE,
72 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
73 CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
/OK3568_Linux_fs/u-boot/board/freescale/p1023rdb/
H A Dtlb.c87 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE,
88 CONFIG_SYS_DDR_SDRAM_BASE,
92 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
93 CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
/OK3568_Linux_fs/u-boot/board/freescale/p1022ds/
H A Dtlb.c77 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
81 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
82 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
/OK3568_Linux_fs/u-boot/board/freescale/mpc8313erdb/
H A Dsdram.c51 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
61 #if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) in fixed_sdram()
65 ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | in fixed_sdram()
66 (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/t102xqds/
H A Dtlb.c104 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
107 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
108 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
/OK3568_Linux_fs/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dtlb.c84 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
90 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
91 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
/OK3568_Linux_fs/u-boot/board/freescale/t102xrdb/
H A Dtlb.c104 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
107 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
108 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
/OK3568_Linux_fs/u-boot/board/freescale/t104xrdb/
H A Dtlb.c122 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
125 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
126 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
/OK3568_Linux_fs/u-boot/include/configs/
H A Dls1012a_common.h27 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
29 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
31 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
H A Dls2080a_common.h53 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
55 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
176 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
H A Dls1046a_common.h43 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
45 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
196 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
H A Dls1043a_common.h45 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
47 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
236 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
H A Dnsim.h17 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
18 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
H A Dtb100.h17 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
18 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
H A Dhsdk.h24 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
H A Daxs10x.h24 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
H A Dqemu-ppce500.h60 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 macro
61 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
/OK3568_Linux_fs/u-boot/board/sbc8349/
H A Dsbc8349.c83 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
90 #if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) in fixed_sdram()
94 ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | in fixed_sdram()
95 (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/
H A Dddr.c72 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
82 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
89 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE + ddr_size / 2, in fixed_sdram()
97 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/ve8313/
H A Dve8313.c42 (CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000)); in fixed_sdram()
52 #if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) in fixed_sdram()
56 ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | in fixed_sdram()
57 (((CONFIG_SYS_DDR_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) & in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8349itx/
H A Dmpc8349itx.c38 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
40 #if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) in fixed_sdram()
44 ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | in fixed_sdram()
45 (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8349emds/
H A Dmpc8349emds.c95 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; in fixed_sdram()
116 #if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) in fixed_sdram()
120 ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | in fixed_sdram()
121 (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/sbc8641d/
H A Dlaw.c32 SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
33 SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
/OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/
H A Dtlb.c51 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,

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