1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2008 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * (C) Copyright 2000 5*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun #include <asm/fsl_law.h> 12*4882a593Smuzhiyun #include <asm/mmu.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* 15*4882a593Smuzhiyun * LAW (Local Access Window) configuration: 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 0x0000_0000 DDR 256M 18*4882a593Smuzhiyun * 0x1000_0000 DDR2 256M 19*4882a593Smuzhiyun * 0x8000_0000 PCIE1 MEM 512M 20*4882a593Smuzhiyun * 0xa000_0000 PCIE2 MEM 512M 21*4882a593Smuzhiyun * 0xc000_0000 RapidIO 512M 22*4882a593Smuzhiyun * 0xe200_0000 PCIE1 IO 16M 23*4882a593Smuzhiyun * 0xe300_0000 PCIE2 IO 16M 24*4882a593Smuzhiyun * 0xf800_0000 CCSRBAR 2M 25*4882a593Smuzhiyun * 0xfe00_0000 FLASH (boot bank) 32M 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct law_entry law_table[] = { 31*4882a593Smuzhiyun #if !defined(CONFIG_SPD_EEPROM) 32*4882a593Smuzhiyun SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), 33*4882a593Smuzhiyun SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, 34*4882a593Smuzhiyun LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), 35*4882a593Smuzhiyun #endif 36*4882a593Smuzhiyun SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), 37*4882a593Smuzhiyun SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun int num_law_entries = ARRAY_SIZE(law_table); 41