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Searched refs:CLK_TOP_MSDC30_2_SEL (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8135-clk.h82 #define CLK_TOP_MSDC30_2_SEL 71 macro
H A Dmt8173-clk.h108 #define CLK_TOP_MSDC30_2_SEL 98 macro
H A Dmt2712-clk.h145 #define CLK_TOP_MSDC30_2_SEL 114 macro
H A Dmt2701-clk.h101 #define CLK_TOP_MSDC30_2_SEL 90 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8135.c365 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0148, 8, 3, 15),
H A Dclk-mt2701.c517 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents,
H A Dclk-mt8173.c562 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_2_parents, 0x0080, 0, 3, 7),
H A Dclk-mt2712.c772 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",