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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmicrel-ksz90x1.txt4 to clock delays. You can specify clock delay values in the PHY OF
8 Note that these settings are applied after any phy-specific fixup from
15 value is 0, the maximum value is 3000, and it can be specified in 200ps
17 skew values actually increase in 120ps steps, starting from -840ps. The
23 The following table shows the actual skew delay you will get for each of the
27 Device Tree Value Delay Pad Skew Register Value
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
[all …]
H A Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
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H A Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Ardelean <alexandru.ardelean@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
[all …]
H A Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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H A Dmediatek-dwmac.txt9 - compatible: Should be "mediatek,mt2712-gmac" for MT2712 SoC
10 - reg: Address and length of the register set for the device
11 - interrupts: Should contain the MAC interrupts
12 - interrupt-names: Should contain a list of interrupt names corresponding to
15 - clocks: Must contain a phandle for each entry in clock-names.
16 - clock-names: The name of the clock listed in the clocks property. These are
18 - mac-address: See ethernet.txt in the same directory
19 - phy-mode: See ethernet.txt in the same directory
20 - mediatek,pericfg: A phandle to the syscon node that control ethernet
21 interface and timing delay.
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H A Dti,dp83822.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Dan Murphy <dmurphy@ti.com>
14 The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It
16 data over standard, twisted-pair cables or to connect to an external,
17 fiber-optic transceiver. Additionally, the DP83822 provides flexibility to
24 - $ref: "ethernet-phy.yaml#"
30 ti,link-loss-low:
39 ti,fiber-mode:
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H A Dapm-xgene-enet.txt1 APM X-Gene SoC Ethernet nodes
3 Ethernet nodes are defined to describe on-chip ethernet interfaces in
4 APM X-Gene SoC.
7 - compatible: Should state binding information from the following list,
8 - "apm,xgene-enet": RGMII based 1G interface
9 - "apm,xgene1-sgenet": SGMII based 1G interface
10 - "apm,xgene1-xgenet": XFI based 10G interface
11 - reg: Address and length of the register set for the device. It contains the
12 information of registers in the same order as described by reg-names
13 - reg-names: Should contain the register set names
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H A Dallwinner,sun8i-a83t-emac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-emac
19 - const: allwinner,sun8i-v3s-emac
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H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/net/
H A Dmicrel-ksz90x1.txt4 clock delays. You can specify clock delay values by adding
5 micrel-specific properties to an Ethernet OF device node.
7 Note that these settings are applied after any phy-specific fixup from
14 value is 0, the maximum value is 1800, and it is incremented by 120ps
19 - rxc-skew-ps : Skew control of RXC pad
20 - rxdv-skew-ps : Skew control of RX CTL pad
21 - txc-skew-ps : Skew control of TXC pad
22 - txen-skew-ps : Skew control of TX CTL pad
23 - rxd0-skew-ps : Skew control of RX data 0 pad
24 - rxd1-skew-ps : Skew control of RX data 1 pad
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/OK3568_Linux_fs/kernel/drivers/net/phy/
H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
29 #include <linux/delay.h>
160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
164 if (type && type->interrupt_level_mask) in kszphy_config_intr()
165 mask = type->interrupt_level_mask; in kszphy_config_intr()
177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in kszphy_config_intr()
213 return -EINVAL; in kszphy_setup_led()
233 * unique (non-broadcast) address on a shared bus.
274 struct kszphy_priv *priv = phydev->priv; in kszphy_config_reset()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
83 int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0; in mt2712_set_interface()
84 int rmii_rxc = plat->rmii_rxc ? RMII_CLK_SRC_RXC : 0; in mt2712_set_interface()
91 * configured, equals to (plat->variant->num_clks - 1) in default for all the case, in mt2712_set_interface()
94 plat->num_clks_to_config = plat->variant->num_clks - 1; in mt2712_set_interface()
97 switch (plat->phy_mode) { in mt2712_set_interface()
102 if (plat->rmii_clk_from_mac) in mt2712_set_interface()
103 plat->num_clks_to_config++; in mt2712_set_interface()
113 dev_err(plat->dev, "phy interface not supported\n"); in mt2712_set_interface()
114 return -EINVAL; in mt2712_set_interface()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h6-orangepi-one-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "sun50i-h6-orangepi.dtsi"
9 compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
15 reg_gmac_3v3: gmac-3v3 {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc-gmac-3v3";
18 regulator-min-microvolt = <3300000>;
19 regulator-max-microvolt = <3300000>;
20 startup-delay-us = <100000>;
21 enable-active-high;
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/OK3568_Linux_fs/kernel/drivers/net/dsa/mv88e6xxx/
H A Dhwtstamp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))
24 if (!chip->info->ops->avb_ops->port_ptp_read) in mv88e6xxx_port_ptp_read()
25 return -EOPNOTSUPP; in mv88e6xxx_port_ptp_read()
27 return chip->info->ops->avb_ops->port_ptp_read(chip, port, addr, in mv88e6xxx_port_ptp_read()
34 if (!chip->info->ops->avb_ops->port_ptp_write) in mv88e6xxx_port_ptp_write()
35 return -EOPNOTSUPP; in mv88e6xxx_port_ptp_write()
37 return chip->info->ops->avb_ops->port_ptp_write(chip, port, addr, in mv88e6xxx_port_ptp_write()
44 if (!chip->info->ops->avb_ops->ptp_write) in mv88e6xxx_ptp_write()
45 return -EOPNOTSUPP; in mv88e6xxx_ptp_write()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dhihope-rzg2-ex.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 pinctrl-0 = <&avb_pins>;
20 pinctrl-names = "default";
21 phy-handle = <&phy0>;
22 tx-internal-delay-ps = <2000>;
23 rx-internal-delay-ps = <1800>;
26 phy0: ethernet-phy@0 {
28 interrupt-parent = <&gpio2>;
30 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
35 pinctrl-0 = <&can0_pins>;
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/mvl88w8977/mlinux/
H A Dmlan_ioctl.h5 * Copyright (C) 2008-2017, Marvell International Ltd.
12 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
13 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
15 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
203 /* Multi-Radio Configuration Group */
333 #define SCAN_RSSI(RSSI) (0x100 - ((t_u8)(RSSI)))
348 * @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
372 /** tx status event structure */
378 /** 0--success, 1--fail, 2--watchdogtimeout */
397 * - Zero based scan entry to start retrieval in command request
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/mvl88w8977/mlan/
H A Dmlan_ioctl.h5 * Copyright (C) 2008-2017, Marvell International Ltd.
12 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
13 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
15 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
203 /* Multi-Radio Configuration Group */
333 #define SCAN_RSSI(RSSI) (0x100 - ((t_u8)(RSSI)))
348 * @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
372 /** tx status event structure */
378 /** 0--success, 1--fail, 2--watchdogtimeout */
397 * - Zero based scan entry to start retrieval in command request
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/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Definitions for the LP-PHY */
22 #define B43_LPPHY_PA_RAMP_TX_TO B43_PHY_CCK(0x10) /* PA Ramp TX Timeout */
24 #define B43_LPPHY_PA_RAMP_TX_TIME_IN B43_PHY_CCK(0x12) /* PA ramp TX Time in */
42 #define B43_LPPHY_TX_DCOFFSET1 B43_PHY_CCK(0x2E) /* TX DCOffset1 */
43 #define B43_LPPHY_TX_DCOFFSET2 B43_PHY_CCK(0x2F) /* TX DCOffset2 */
98 #define B43_LPPHY_TX_ERROR B43_PHY_OFDM(0x07) /* TX Error */
132 #define B43_LPPHY_DETECTOR_DELAY_ADJUST B43_PHY_OFDM(0x2A) /* Detector Delay Adjust */
133 #define B43_LPPHY_REDUCED_DETECTOR_DELAY B43_PHY_OFDM(0x2B) /* Reduced Detector Delay */
135 #define B43_LPPHY_CORRELATOR_DIS_DELAY B43_PHY_OFDM(0x2D) /* correlator Dis Delay */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/
H A Datp.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 ushort rx_status; /* Unknown bit assignments :-<. */
39 TxSTAT = 8, RxSTAT = 9, /* Tx and Rx status. */
61 #define CMR1h_TxENABLE 0x01 /* Tx unit enable. */
99 inbyte(port + PAR_STATUS); /* Settling time delay */ in read_nibble()
116 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
117 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
130 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode2()
166 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg()
186 outb(outval, port + PAR_DATA); /* Double write for PS/2. */ in write_reg_high()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/nxp/mlan/
H A Dmlan_ioctl.h6 * Copyright 2008-2022 NXP
13 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
14 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
16 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
227 /* Multi-Radio Configuration Group */
424 #define SCAN_RSSI(RSSI) (0x100 - ((t_u8)(RSSI)))
441 * @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
472 /** 0--success, 1--fail, 2--watchdogtimeout */
481 * - Zero based scan entry to start retrieval in command request
482 * - Number of scans entries returned in command response
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/nxp/mlinux/
H A Dmlan_ioctl.h6 * Copyright 2008-2022 NXP
13 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
14 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
16 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
227 /* Multi-Radio Configuration Group */
424 #define SCAN_RSSI(RSSI) (0x100 - ((t_u8)(RSSI)))
441 * @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
472 /** 0--success, 1--fail, 2--watchdogtimeout */
481 * - Zero based scan entry to start retrieval in command request
482 * - Number of scans entries returned in command response
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/quantenna/qtnfmac/pcie/
H A Dpearl_pcie.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/delay.h>
47 struct qtnf_shm_ipc_region bda_shm_reg1 __aligned(4096); /* host TX */
100 static inline void qtnf_init_hdp_irqs(struct qtnf_pcie_pearl_state *ps) in qtnf_init_hdp_irqs() argument
104 spin_lock_irqsave(&ps->irq_lock, flags); in qtnf_init_hdp_irqs()
105 ps->pcie_irq_mask = (PCIE_HDP_INT_RX_BITS | PCIE_HDP_INT_TX_BITS); in qtnf_init_hdp_irqs()
106 spin_unlock_irqrestore(&ps->irq_lock, flags); in qtnf_init_hdp_irqs()
109 static inline void qtnf_enable_hdp_irqs(struct qtnf_pcie_pearl_state *ps) in qtnf_enable_hdp_irqs() argument
113 spin_lock_irqsave(&ps->irq_lock, flags); in qtnf_enable_hdp_irqs()
114 writel(ps->pcie_irq_mask, PCIE_HDP_INT_EN(ps->pcie_reg_base)); in qtnf_enable_hdp_irqs()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/marvell/libertas/
H A Dcmdresp.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/delay.h>
18 * lbs_mac_event_disconnected - handles disconnect event. It
19 * reports disconnect to upper layer, clean tx/rx packets,
33 if (priv->connect_status != LBS_CONNECTED) in lbs_mac_event_disconnected()
37 * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. in lbs_mac_event_disconnected()
42 if (priv->wdev->iftype == NL80211_IFTYPE_STATION) in lbs_mac_event_disconnected()
46 netif_stop_queue(priv->dev); in lbs_mac_event_disconnected()
47 netif_carrier_off(priv->dev); in lbs_mac_event_disconnected()
49 /* Free Tx and Rx packets */ in lbs_mac_event_disconnected()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
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