xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/nxp/mlan/mlan_ioctl.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /** @file mlan_ioctl.h
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  *  @brief This file declares the IOCTL data structures and APIs.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  Copyright 2008-2022 NXP
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *  This software file (the File) is distributed by NXP
9*4882a593Smuzhiyun  *  under the terms of the GNU General Public License Version 2, June 1991
10*4882a593Smuzhiyun  *  (the License).  You may use, redistribute and/or modify the File in
11*4882a593Smuzhiyun  *  accordance with the terms and conditions of the License, a copy of which
12*4882a593Smuzhiyun  *  is available by writing to the Free Software Foundation, Inc.,
13*4882a593Smuzhiyun  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
14*4882a593Smuzhiyun  *  worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  *  THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
17*4882a593Smuzhiyun  *  IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
18*4882a593Smuzhiyun  *  ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
19*4882a593Smuzhiyun  *  this warranty disclaimer.
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /******************************************************
24*4882a593Smuzhiyun Change log:
25*4882a593Smuzhiyun     11/07/2008: initial version
26*4882a593Smuzhiyun ******************************************************/
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifndef _MLAN_IOCTL_H_
29*4882a593Smuzhiyun #define _MLAN_IOCTL_H_
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /** Enumeration for IOCTL request ID */
32*4882a593Smuzhiyun enum _mlan_ioctl_req_id {
33*4882a593Smuzhiyun 	/* Scan Group */
34*4882a593Smuzhiyun 	MLAN_IOCTL_SCAN = 0x00010000,
35*4882a593Smuzhiyun 	MLAN_OID_SCAN_NORMAL = 0x00010001,
36*4882a593Smuzhiyun 	MLAN_OID_SCAN_SPECIFIC_SSID = 0x00010002,
37*4882a593Smuzhiyun 	MLAN_OID_SCAN_USER_CONFIG = 0x00010003,
38*4882a593Smuzhiyun 	MLAN_OID_SCAN_CONFIG = 0x00010004,
39*4882a593Smuzhiyun 	MLAN_OID_SCAN_GET_CURRENT_BSS = 0x00010005,
40*4882a593Smuzhiyun 	MLAN_OID_SCAN_CANCEL = 0x00010006,
41*4882a593Smuzhiyun 	MLAN_OID_SCAN_TABLE_FLUSH = 0x0001000A,
42*4882a593Smuzhiyun 	MLAN_OID_SCAN_BGSCAN_CONFIG = 0x0001000B,
43*4882a593Smuzhiyun 	/* BSS Configuration Group */
44*4882a593Smuzhiyun 	MLAN_IOCTL_BSS = 0x00020000,
45*4882a593Smuzhiyun 	MLAN_OID_BSS_START = 0x00020001,
46*4882a593Smuzhiyun 	MLAN_OID_BSS_STOP = 0x00020002,
47*4882a593Smuzhiyun 	MLAN_OID_BSS_MODE = 0x00020003,
48*4882a593Smuzhiyun 	MLAN_OID_BSS_CHANNEL = 0x00020004,
49*4882a593Smuzhiyun 	MLAN_OID_BSS_CHANNEL_LIST = 0x00020005,
50*4882a593Smuzhiyun 	MLAN_OID_BSS_MAC_ADDR = 0x00020006,
51*4882a593Smuzhiyun 	MLAN_OID_BSS_MULTICAST_LIST = 0x00020007,
52*4882a593Smuzhiyun 	MLAN_OID_BSS_FIND_BSS = 0x00020008,
53*4882a593Smuzhiyun 	MLAN_OID_IBSS_BCN_INTERVAL = 0x00020009,
54*4882a593Smuzhiyun 	MLAN_OID_IBSS_ATIM_WINDOW = 0x0002000A,
55*4882a593Smuzhiyun 	MLAN_OID_IBSS_CHANNEL = 0x0002000B,
56*4882a593Smuzhiyun #ifdef UAP_SUPPORT
57*4882a593Smuzhiyun 	MLAN_OID_UAP_BSS_CONFIG = 0x0002000C,
58*4882a593Smuzhiyun 	MLAN_OID_UAP_DEAUTH_STA = 0x0002000D,
59*4882a593Smuzhiyun 	MLAN_OID_UAP_BSS_RESET = 0x0002000E,
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun #if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
62*4882a593Smuzhiyun 	MLAN_OID_BSS_ROLE = 0x0002000F,
63*4882a593Smuzhiyun #endif
64*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
65*4882a593Smuzhiyun 	MLAN_OID_WIFI_DIRECT_MODE = 0x00020010,
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun #ifdef STA_SUPPORT
68*4882a593Smuzhiyun 	MLAN_OID_BSS_LISTEN_INTERVAL = 0x00020011,
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun 	MLAN_OID_BSS_REMOVE = 0x00020014,
71*4882a593Smuzhiyun #ifdef UAP_SUPPORT
72*4882a593Smuzhiyun 	MLAN_OID_UAP_CFG_WMM_PARAM = 0x00020015,
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun 	MLAN_OID_BSS_11D_CHECK_CHANNEL = 0x00020016,
75*4882a593Smuzhiyun #ifdef UAP_SUPPORT
76*4882a593Smuzhiyun 	MLAN_OID_UAP_ACS_SCAN = 0x00020017,
77*4882a593Smuzhiyun 	MLAN_OID_UAP_SCAN_CHANNELS = 0x00020018,
78*4882a593Smuzhiyun 	MLAN_OID_UAP_CHANNEL = 0x00020019,
79*4882a593Smuzhiyun 	MLAN_OID_UAP_OPER_CTRL = 0x0002001A,
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun #ifdef STA_SUPPORT
82*4882a593Smuzhiyun 	MLAN_OID_BSS_CHAN_INFO = 0x0002001B,
83*4882a593Smuzhiyun #endif
84*4882a593Smuzhiyun #ifdef UAP_SUPPORT
85*4882a593Smuzhiyun 	MLAN_OID_UAP_ADD_STATION = 0x0002001C,
86*4882a593Smuzhiyun #endif
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	MLAN_OID_BSS_FIND_BSSID = 0x0002001D,
89*4882a593Smuzhiyun #ifdef UAP_SUPPORT
90*4882a593Smuzhiyun 	MLAN_OID_ACTION_CHAN_SWITCH = 0x0002001E,
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* Radio Configuration Group */
94*4882a593Smuzhiyun 	MLAN_IOCTL_RADIO_CFG = 0x00030000,
95*4882a593Smuzhiyun 	MLAN_OID_RADIO_CTRL = 0x00030001,
96*4882a593Smuzhiyun 	MLAN_OID_BAND_CFG = 0x00030002,
97*4882a593Smuzhiyun 	MLAN_OID_ANT_CFG = 0x00030003,
98*4882a593Smuzhiyun 	MLAN_OID_REMAIN_CHAN_CFG = 0x00030004,
99*4882a593Smuzhiyun 	MLAN_OID_MIMO_SWITCH = 0x00030005,
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	/* SNMP MIB Group */
102*4882a593Smuzhiyun 	MLAN_IOCTL_SNMP_MIB = 0x00040000,
103*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_RTS_THRESHOLD = 0x00040001,
104*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_FRAG_THRESHOLD = 0x00040002,
105*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_RETRY_COUNT = 0x00040003,
106*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_DOT11D = 0x00040004,
107*4882a593Smuzhiyun #if defined(UAP_SUPPORT)
108*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_DOT11H = 0x00040005,
109*4882a593Smuzhiyun #endif
110*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_DTIM_PERIOD = 0x00040006,
111*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_SIGNALEXT_ENABLE = 0x00040007,
112*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_CTRL_DEAUTH = 0x00040008,
113*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_DOT11H_FAKERADAR = 0x00040009,
114*4882a593Smuzhiyun 	MLAN_OID_SNMP_MIB_CHAN_TRACK = 0x0004000A,
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* Status Information Group */
117*4882a593Smuzhiyun 	MLAN_IOCTL_GET_INFO = 0x00050000,
118*4882a593Smuzhiyun 	MLAN_OID_GET_STATS = 0x00050001,
119*4882a593Smuzhiyun 	MLAN_OID_GET_SIGNAL = 0x00050002,
120*4882a593Smuzhiyun 	MLAN_OID_GET_FW_INFO = 0x00050003,
121*4882a593Smuzhiyun 	MLAN_OID_GET_VER_EXT = 0x00050004,
122*4882a593Smuzhiyun 	MLAN_OID_GET_BSS_INFO = 0x00050005,
123*4882a593Smuzhiyun 	MLAN_OID_GET_DEBUG_INFO = 0x00050006,
124*4882a593Smuzhiyun #ifdef UAP_SUPPORT
125*4882a593Smuzhiyun 	MLAN_OID_UAP_STA_LIST = 0x00050007,
126*4882a593Smuzhiyun #endif
127*4882a593Smuzhiyun 	MLAN_OID_GET_SIGNAL_EXT = 0x00050008,
128*4882a593Smuzhiyun 	MLAN_OID_LINK_STATS = 0x00050009,
129*4882a593Smuzhiyun 	MLAN_OID_GET_UAP_STATS_LOG = 0x0005000A,
130*4882a593Smuzhiyun 	/* Security Configuration Group */
131*4882a593Smuzhiyun 	MLAN_IOCTL_SEC_CFG = 0x00060000,
132*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_AUTH_MODE = 0x00060001,
133*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_ENCRYPT_MODE = 0x00060002,
134*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_WPA_ENABLED = 0x00060003,
135*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_ENCRYPT_KEY = 0x00060004,
136*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_PASSPHRASE = 0x00060005,
137*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_EWPA_ENABLED = 0x00060006,
138*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_ESUPP_MODE = 0x00060007,
139*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_WAPI_ENABLED = 0x00060009,
140*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_PORT_CTRL_ENABLED = 0x0006000A,
141*4882a593Smuzhiyun #ifdef UAP_SUPPORT
142*4882a593Smuzhiyun 	MLAN_OID_SEC_CFG_REPORT_MIC_ERR = 0x0006000B,
143*4882a593Smuzhiyun #endif
144*4882a593Smuzhiyun 	MLAN_OID_SEC_QUERY_KEY = 0x0006000C,
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/* Rate Group */
147*4882a593Smuzhiyun 	MLAN_IOCTL_RATE = 0x00070000,
148*4882a593Smuzhiyun 	MLAN_OID_RATE_CFG = 0x00070001,
149*4882a593Smuzhiyun 	MLAN_OID_GET_DATA_RATE = 0x00070002,
150*4882a593Smuzhiyun 	MLAN_OID_SUPPORTED_RATES = 0x00070003,
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	/* Power Configuration Group */
153*4882a593Smuzhiyun 	MLAN_IOCTL_POWER_CFG = 0x00080000,
154*4882a593Smuzhiyun 	MLAN_OID_POWER_CFG = 0x00080001,
155*4882a593Smuzhiyun 	MLAN_OID_POWER_CFG_EXT = 0x00080002,
156*4882a593Smuzhiyun 	MLAN_OID_POWER_LOW_POWER_MODE = 0x00080003,
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* Power Management Configuration Group */
159*4882a593Smuzhiyun 	MLAN_IOCTL_PM_CFG = 0x00090000,
160*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_IEEE_PS = 0x00090001,
161*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_HS_CFG = 0x00090002,
162*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_INACTIVITY_TO = 0x00090003,
163*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_DEEP_SLEEP = 0x00090004,
164*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_SLEEP_PD = 0x00090005,
165*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_PS_CFG = 0x00090006,
166*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_SLEEP_PARAMS = 0x00090008,
167*4882a593Smuzhiyun #ifdef UAP_SUPPORT
168*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_PS_MODE = 0x00090009,
169*4882a593Smuzhiyun #endif /* UAP_SUPPORT */
170*4882a593Smuzhiyun 	MLAN_OID_PM_INFO = 0x0009000A,
171*4882a593Smuzhiyun 	MLAN_OID_PM_HS_WAKEUP_REASON = 0x0009000B,
172*4882a593Smuzhiyun 	MLAN_OID_PM_MGMT_FILTER = 0x0009000C,
173*4882a593Smuzhiyun 	MLAN_OID_PM_CFG_BCN_TIMEOUT = 0x0009000D,
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/* WMM Configuration Group */
176*4882a593Smuzhiyun 	MLAN_IOCTL_WMM_CFG = 0x000A0000,
177*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_ENABLE = 0x000A0001,
178*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_QOS = 0x000A0002,
179*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_ADDTS = 0x000A0003,
180*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_DELTS = 0x000A0004,
181*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_QUEUE_CONFIG = 0x000A0005,
182*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_QUEUE_STATS = 0x000A0006,
183*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_QUEUE_STATUS = 0x000A0007,
184*4882a593Smuzhiyun 	MLAN_OID_WMM_CFG_TS_STATUS = 0x000A0008,
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	/* WPS Configuration Group */
187*4882a593Smuzhiyun 	MLAN_IOCTL_WPS_CFG = 0x000B0000,
188*4882a593Smuzhiyun 	MLAN_OID_WPS_CFG_SESSION = 0x000B0001,
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	/* 802.11n Configuration Group */
191*4882a593Smuzhiyun 	MLAN_IOCTL_11N_CFG = 0x000C0000,
192*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_TX = 0x000C0001,
193*4882a593Smuzhiyun 	MLAN_OID_11N_HTCAP_CFG = 0x000C0002,
194*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_ADDBA_REJECT = 0x000C0003,
195*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_AGGR_PRIO_TBL = 0x000C0004,
196*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_ADDBA_PARAM = 0x000C0005,
197*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE = 0x000C0006,
198*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_AMSDU_AGGR_CTRL = 0x000C0007,
199*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_SUPPORTED_MCS_SET = 0x000C0008,
200*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_TX_BF_CAP = 0x000C0009,
201*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_TX_BF_CFG = 0x000C000A,
202*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_STREAM_CFG = 0x000C000B,
203*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_DELBA = 0x000C000C,
204*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_REJECT_ADDBA_REQ = 0x000C000D,
205*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_COEX_RX_WINSIZE = 0x000C000E,
206*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_TX_AGGR_CTRL = 0x000C000F,
207*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_IBSS_AMPDU_PARAM = 0x000C0010,
208*4882a593Smuzhiyun 	MLAN_OID_11N_CFG_MIN_BA_THRESHOLD = 0x000C0011,
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	/* 802.11d Configuration Group */
211*4882a593Smuzhiyun 	MLAN_IOCTL_11D_CFG = 0x000D0000,
212*4882a593Smuzhiyun #ifdef STA_SUPPORT
213*4882a593Smuzhiyun 	MLAN_OID_11D_CFG_ENABLE = 0x000D0001,
214*4882a593Smuzhiyun 	MLAN_OID_11D_CLR_CHAN_TABLE = 0x000D0002,
215*4882a593Smuzhiyun #endif /* STA_SUPPORT */
216*4882a593Smuzhiyun #ifdef UAP_SUPPORT
217*4882a593Smuzhiyun 	MLAN_OID_11D_DOMAIN_INFO = 0x000D0003,
218*4882a593Smuzhiyun #endif
219*4882a593Smuzhiyun 	MLAN_OID_11D_DOMAIN_INFO_EXT = 0x000D0004,
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	/* Register Memory Access Group */
222*4882a593Smuzhiyun 	MLAN_IOCTL_REG_MEM = 0x000E0000,
223*4882a593Smuzhiyun 	MLAN_OID_REG_RW = 0x000E0001,
224*4882a593Smuzhiyun 	MLAN_OID_EEPROM_RD = 0x000E0002,
225*4882a593Smuzhiyun 	MLAN_OID_MEM_RW = 0x000E0003,
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	/* Multi-Radio Configuration Group */
228*4882a593Smuzhiyun 	MLAN_IOCTL_MFR_CFG = 0x00100000,
229*4882a593Smuzhiyun 	/* 802.11h Configuration Group */
230*4882a593Smuzhiyun 	MLAN_IOCTL_11H_CFG = 0x00110000,
231*4882a593Smuzhiyun 	MLAN_OID_11H_CHANNEL_CHECK = 0x00110001,
232*4882a593Smuzhiyun 	MLAN_OID_11H_LOCAL_POWER_CONSTRAINT = 0x00110002,
233*4882a593Smuzhiyun 	MLAN_OID_11H_DFS_TESTING = 0x00110003,
234*4882a593Smuzhiyun 	MLAN_OID_11H_CHAN_REPORT_REQUEST = 0x00110004,
235*4882a593Smuzhiyun 	MLAN_OID_11H_CHAN_SWITCH_COUNT = 0x00110005,
236*4882a593Smuzhiyun 	MLAN_OID_11H_CHAN_NOP_INFO = 0x00110006,
237*4882a593Smuzhiyun 	MLAN_OID_11H_CHAN_DFS_STATE = 0x00110007,
238*4882a593Smuzhiyun 	MLAN_OID_11H_DFS_W53_CFG = 0x00110008,
239*4882a593Smuzhiyun 	MLAN_OID_11H_DFS_MODE = 0x00110009,
240*4882a593Smuzhiyun 	MLAN_OID_11H_NOP_CHAN_LIST = 0x0011000A,
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/* 802.11n Configuration Group RANDYTODO for value assign */
243*4882a593Smuzhiyun 	MLAN_IOCTL_11AC_CFG = 0x00120000,
244*4882a593Smuzhiyun 	MLAN_OID_11AC_VHT_CFG = 0x00120001,
245*4882a593Smuzhiyun 	MLAN_OID_11AC_CFG_SUPPORTED_MCS_SET = 0x00120002,
246*4882a593Smuzhiyun 	MLAN_OID_11AC_OPERMODE_CFG = 0x00120003,
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	/* 802.11ax Configuration Group  */
249*4882a593Smuzhiyun 	MLAN_IOCTL_11AX_CFG = 0x00170000,
250*4882a593Smuzhiyun 	MLAN_OID_11AX_HE_CFG = 0x00170001,
251*4882a593Smuzhiyun 	MLAN_OID_11AX_CMD_CFG = 0x00170002,
252*4882a593Smuzhiyun 	MLAN_OID_11AX_TWT_CFG = 0x00170003,
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	/* Miscellaneous Configuration Group */
255*4882a593Smuzhiyun 	MLAN_IOCTL_MISC_CFG = 0x00200000,
256*4882a593Smuzhiyun 	MLAN_OID_MISC_GEN_IE = 0x00200001,
257*4882a593Smuzhiyun 	MLAN_OID_MISC_REGION = 0x00200002,
258*4882a593Smuzhiyun 	MLAN_OID_MISC_WARM_RESET = 0x00200003,
259*4882a593Smuzhiyun #ifdef SDIO
260*4882a593Smuzhiyun 	MLAN_OID_MISC_SDIO_MPA_CTRL = 0x00200006,
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun 	MLAN_OID_MISC_HOST_CMD = 0x00200007,
263*4882a593Smuzhiyun 	MLAN_OID_MISC_SYS_CLOCK = 0x00200009,
264*4882a593Smuzhiyun 	MLAN_OID_MISC_SOFT_RESET = 0x0020000A,
265*4882a593Smuzhiyun 	MLAN_OID_MISC_WWS = 0x0020000B,
266*4882a593Smuzhiyun 	MLAN_OID_MISC_ASSOC_RSP = 0x0020000C,
267*4882a593Smuzhiyun 	MLAN_OID_MISC_INIT_SHUTDOWN = 0x0020000D,
268*4882a593Smuzhiyun 	MLAN_OID_MISC_CUSTOM_IE = 0x0020000F,
269*4882a593Smuzhiyun 	MLAN_OID_MISC_TDLS_CONFIG = 0x00200010,
270*4882a593Smuzhiyun 	MLAN_OID_MISC_NET_MONITOR = 0x00200011,
271*4882a593Smuzhiyun 	MLAN_OID_MISC_TX_DATAPAUSE = 0x00200012,
272*4882a593Smuzhiyun 	MLAN_OID_MISC_IP_ADDR = 0x00200013,
273*4882a593Smuzhiyun 	MLAN_OID_MISC_MAC_CONTROL = 0x00200014,
274*4882a593Smuzhiyun 	MLAN_OID_MISC_MEF_CFG = 0x00200015,
275*4882a593Smuzhiyun 	MLAN_OID_MISC_CFP_CODE = 0x00200016,
276*4882a593Smuzhiyun 	MLAN_OID_MISC_COUNTRY_CODE = 0x00200017,
277*4882a593Smuzhiyun 	MLAN_OID_MISC_THERMAL = 0x00200018,
278*4882a593Smuzhiyun 	MLAN_OID_MISC_RX_MGMT_IND = 0x00200019,
279*4882a593Smuzhiyun 	MLAN_OID_MISC_SUBSCRIBE_EVENT = 0x0020001A,
280*4882a593Smuzhiyun #ifdef DEBUG_LEVEL1
281*4882a593Smuzhiyun 	MLAN_OID_MISC_DRVDBG = 0x0020001B,
282*4882a593Smuzhiyun #endif
283*4882a593Smuzhiyun 	MLAN_OID_MISC_HOTSPOT_CFG = 0x0020001C,
284*4882a593Smuzhiyun 	MLAN_OID_MISC_OTP_USER_DATA = 0x0020001D,
285*4882a593Smuzhiyun 	MLAN_OID_MISC_AUTO_ASSOC = 0x0020001E,
286*4882a593Smuzhiyun #ifdef USB
287*4882a593Smuzhiyun 	MLAN_OID_MISC_USB_AGGR_CTRL = 0x0020001F,
288*4882a593Smuzhiyun #endif
289*4882a593Smuzhiyun 	MLAN_OID_MISC_TXCONTROL = 0x00200020,
290*4882a593Smuzhiyun #ifdef STA_SUPPORT
291*4882a593Smuzhiyun 	MLAN_OID_MISC_EXT_CAP_CFG = 0x00200021,
292*4882a593Smuzhiyun #endif
293*4882a593Smuzhiyun #if defined(STA_SUPPORT)
294*4882a593Smuzhiyun 	MLAN_OID_MISC_PMFCFG = 0x00200022,
295*4882a593Smuzhiyun #endif
296*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
297*4882a593Smuzhiyun 	MLAN_OID_MISC_WIFI_DIRECT_CONFIG = 0x00200025,
298*4882a593Smuzhiyun #endif
299*4882a593Smuzhiyun 	MLAN_OID_MISC_TDLS_OPER = 0x00200026,
300*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_TDLS_IES = 0x00200027,
301*4882a593Smuzhiyun 	MLAN_OID_MISC_LOW_PWR_MODE = 0x00200029,
302*4882a593Smuzhiyun 	MLAN_OID_MISC_MEF_FLT_CFG = 0x0020002A,
303*4882a593Smuzhiyun 	MLAN_OID_MISC_DFS_REAPTER_MODE = 0x0020002B,
304*4882a593Smuzhiyun #ifdef RX_PACKET_COALESCE
305*4882a593Smuzhiyun 	MLAN_OID_MISC_RX_PACKET_COALESCE = 0x0020002C,
306*4882a593Smuzhiyun #endif
307*4882a593Smuzhiyun 	MLAN_OID_MISC_TDLS_CS_CHANNEL = 0x0020002D,
308*4882a593Smuzhiyun 	MLAN_OID_MISC_COALESCE_CFG = 0x0020002E,
309*4882a593Smuzhiyun 	MLAN_OID_MISC_TDLS_IDLE_TIME = 0x0020002F,
310*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_SENSOR_TEMP = 0x00200030,
311*4882a593Smuzhiyun 	MLAN_OID_MISC_IPV6_RA_OFFLOAD = 0x00200036,
312*4882a593Smuzhiyun 	MLAN_OID_MISC_GTK_REKEY_OFFLOAD = 0x00200037,
313*4882a593Smuzhiyun 	MLAN_OID_MISC_OPER_CLASS = 0x00200038,
314*4882a593Smuzhiyun 	MLAN_OID_MISC_PMIC_CFG = 0x00200039,
315*4882a593Smuzhiyun 	MLAN_OID_MISC_IND_RST_CFG = 0x00200040,
316*4882a593Smuzhiyun 	MLAN_OID_MISC_ROAM_OFFLOAD = 0x00200042,
317*4882a593Smuzhiyun 	MLAN_OID_MISC_ROAM_OFFLOAD_APLIST = 0x00200043,
318*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_TSF = 0x00200045,
319*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_CHAN_REGION_CFG = 0x00200046,
320*4882a593Smuzhiyun 	MLAN_OID_MISC_CLOUD_KEEP_ALIVE = 0x00200048,
321*4882a593Smuzhiyun 	MLAN_OID_MISC_OPER_CLASS_CHECK = 0x00200049,
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	MLAN_OID_MISC_CWMODE_CTRL = 0x00200051,
324*4882a593Smuzhiyun 	MLAN_OID_MISC_AGGR_CTRL = 0x00200052,
325*4882a593Smuzhiyun 	MLAN_OID_MISC_DYN_BW = 0x00200053,
326*4882a593Smuzhiyun 	MLAN_OID_MISC_FW_DUMP_EVENT = 0x00200054,
327*4882a593Smuzhiyun 	MLAN_OID_MISC_PER_PKT_CFG = 0x00200055,
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	MLAN_OID_MISC_ROBUSTCOEX = 0x00200056,
330*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_TX_RX_HISTOGRAM = 0x00200057,
331*4882a593Smuzhiyun 	MLAN_OID_MISC_CFP_INFO = 0x00200060,
332*4882a593Smuzhiyun 	MLAN_OID_MISC_BOOT_SLEEP = 0x00200061,
333*4882a593Smuzhiyun #if defined(PCIE)
334*4882a593Smuzhiyun 	MLAN_OID_MISC_SSU = 0x00200062,
335*4882a593Smuzhiyun #endif
336*4882a593Smuzhiyun 	MLAN_OID_MISC_CSI = 0x00200064,
337*4882a593Smuzhiyun 	MLAN_OID_MISC_DMCS_CONFIG = 0x00200065,
338*4882a593Smuzhiyun 	MLAN_OID_MISC_RX_ABORT_CFG = 0x00200066,
339*4882a593Smuzhiyun 	MLAN_OID_MISC_RX_ABORT_CFG_EXT = 0x00200067,
340*4882a593Smuzhiyun 	MLAN_OID_MISC_TX_AMPDU_PROT_MODE = 0x00200068,
341*4882a593Smuzhiyun 	MLAN_OID_MISC_RATE_ADAPT_CFG = 0x00200069,
342*4882a593Smuzhiyun 	MLAN_OID_MISC_CCK_DESENSE_CFG = 0x00200070,
343*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_CHAN_TRPC_CFG = 0x00200072,
344*4882a593Smuzhiyun 	MLAN_OID_MISC_BAND_STEERING = 0x00200073,
345*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_REGIONPWR_CFG = 0x00200074,
346*4882a593Smuzhiyun 	MLAN_OID_MISC_RF_TEST_GENERIC = 0x00200075,
347*4882a593Smuzhiyun 	MLAN_OID_MISC_RF_TEST_TX_CONT = 0x00200076,
348*4882a593Smuzhiyun 	MLAN_OID_MISC_RF_TEST_TX_FRAME = 0x00200077,
349*4882a593Smuzhiyun 	MLAN_OID_MISC_ARB_CONFIG = 0x00200078,
350*4882a593Smuzhiyun 	MLAN_OID_MISC_BEACON_STUCK = 0x00200079,
351*4882a593Smuzhiyun 	MLAN_OID_MISC_CFP_TABLE = 0x0020007A,
352*4882a593Smuzhiyun 	MLAN_OID_MISC_RANGE_EXT = 0x0020007B,
353*4882a593Smuzhiyun 	MLAN_OID_MISC_DOT11MC_UNASSOC_FTM_CFG = 0x0020007C,
354*4882a593Smuzhiyun 	MLAN_OID_MISC_TP_STATE = 0x0020007D,
355*4882a593Smuzhiyun 	MLAN_OID_MISC_HAL_PHY_CFG = 0x0020007E,
356*4882a593Smuzhiyun 	MLAN_OID_MISC_RF_TEST_HE_POWER = 0X0020007F,
357*4882a593Smuzhiyun #ifdef UAP_SUPPORT
358*4882a593Smuzhiyun 	MLAN_OID_MISC_WACP_MODE = 0x00200081,
359*4882a593Smuzhiyun #endif
360*4882a593Smuzhiyun 	MLAN_OID_MISC_GPIO_TSF_LATCH = 0x00200082,
361*4882a593Smuzhiyun 	MLAN_OID_MISC_GET_TSF_INFO = 0x00200083,
362*4882a593Smuzhiyun 	MLAN_OID_MISC_ASSOC_REQ = 0x00200084,
363*4882a593Smuzhiyun 	MLAN_OID_MISC_IPS_CFG = 0x00200085,
364*4882a593Smuzhiyun 	MLAN_OID_MISC_MC_AGGR_CFG = 0x00200086,
365*4882a593Smuzhiyun 	MLAN_OID_MISC_CH_LOAD = 0x00200087,
366*4882a593Smuzhiyun 	MLAN_OID_MISC_STATS = 0x00200088,
367*4882a593Smuzhiyun 	MLAN_OID_MISC_CH_LOAD_RESULTS = 0x00200089,
368*4882a593Smuzhiyun };
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun /** Sub command size */
371*4882a593Smuzhiyun #define MLAN_SUB_COMMAND_SIZE 4
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun /** Enumeration for the action of IOCTL request */
374*4882a593Smuzhiyun enum _mlan_act_ioctl {
375*4882a593Smuzhiyun 	MLAN_ACT_SET = 1,
376*4882a593Smuzhiyun 	MLAN_ACT_GET,
377*4882a593Smuzhiyun 	MLAN_ACT_CANCEL,
378*4882a593Smuzhiyun 	MLAN_ACT_CLEAR,
379*4882a593Smuzhiyun 	MLAN_ACT_RESET,
380*4882a593Smuzhiyun 	MLAN_ACT_DEFAULT
381*4882a593Smuzhiyun };
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun /** Enumeration for generic enable/disable */
384*4882a593Smuzhiyun enum _mlan_act_generic { MLAN_ACT_DISABLE = 0, MLAN_ACT_ENABLE = 1 };
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun /** Enumeration for scan mode */
387*4882a593Smuzhiyun enum _mlan_scan_mode {
388*4882a593Smuzhiyun 	MLAN_SCAN_MODE_UNCHANGED = 0,
389*4882a593Smuzhiyun 	MLAN_SCAN_MODE_BSS,
390*4882a593Smuzhiyun 	MLAN_SCAN_MODE_IBSS,
391*4882a593Smuzhiyun 	MLAN_SCAN_MODE_ANY
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun /** Enumeration for scan type */
395*4882a593Smuzhiyun enum _mlan_scan_type {
396*4882a593Smuzhiyun 	MLAN_SCAN_TYPE_UNCHANGED = 0,
397*4882a593Smuzhiyun 	MLAN_SCAN_TYPE_ACTIVE,
398*4882a593Smuzhiyun 	MLAN_SCAN_TYPE_PASSIVE,
399*4882a593Smuzhiyun 	MLAN_SCAN_TYPE_PASSIVE_TO_ACTIVE
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun /** Enumeration for passive to active scan */
403*4882a593Smuzhiyun enum _mlan_pass_to_act_scan {
404*4882a593Smuzhiyun 	MLAN_PASS_TO_ACT_SCAN_UNCHANGED = 0,
405*4882a593Smuzhiyun 	MLAN_PASS_TO_ACT_SCAN_EN,
406*4882a593Smuzhiyun 	MLAN_PASS_TO_ACT_SCAN_DIS
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun /** Enumeration for passive to active scan */
410*4882a593Smuzhiyun enum _mlan_ext_scan {
411*4882a593Smuzhiyun 	MLAN_EXTENDED_SCAN_UNCHANGED = 0,
412*4882a593Smuzhiyun 	MLAN_LEGACY_SCAN,
413*4882a593Smuzhiyun 	MLAN_EXT_SCAN,
414*4882a593Smuzhiyun 	MLAN_EXT_SCAN_ENH
415*4882a593Smuzhiyun };
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun /** Max number of supported rates */
418*4882a593Smuzhiyun #define MLAN_SUPPORTED_RATES 32
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun /** Mrvl Proprietary Tlv base */
421*4882a593Smuzhiyun #define PROPRIETARY_TLV_BASE_ID 0x100
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun /** RSSI scan */
424*4882a593Smuzhiyun #define SCAN_RSSI(RSSI) (0x100 - ((t_u8)(RSSI)))
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun /** Max passive scan time for each channel in milliseconds */
427*4882a593Smuzhiyun #define MRVDRV_MAX_PASSIVE_SCAN_CHAN_TIME 2000
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun /** Max active scan time for each channel in milliseconds  */
430*4882a593Smuzhiyun #define MRVDRV_MAX_ACTIVE_SCAN_CHAN_TIME 500
431*4882a593Smuzhiyun /** Max gap time between 2 scan in milliseconds  */
432*4882a593Smuzhiyun #define MRVDRV_MAX_SCAN_CHAN_GAP_TIME 500
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun /** Maximum number of probes to send on each channel */
435*4882a593Smuzhiyun #define MAX_PROBES 5
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun /** Default number of probes to send on each channel */
438*4882a593Smuzhiyun #define DEFAULT_PROBES 4
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun /**
441*4882a593Smuzhiyun  *  @brief Sub-structure passed in wlan_ioctl_get_scan_table_entry for each BSS
442*4882a593Smuzhiyun  *
443*4882a593Smuzhiyun  *  Fixed field information returned for the scan response in the IOCTL
444*4882a593Smuzhiyun  *    response.
445*4882a593Smuzhiyun  */
446*4882a593Smuzhiyun typedef struct _wlan_get_scan_table_fixed {
447*4882a593Smuzhiyun 	/** BSSID of this network */
448*4882a593Smuzhiyun 	t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
449*4882a593Smuzhiyun 	/** Channel this beacon/probe response was detected */
450*4882a593Smuzhiyun 	t_u8 channel;
451*4882a593Smuzhiyun 	/** RSSI for the received packet */
452*4882a593Smuzhiyun 	t_u8 rssi;
453*4882a593Smuzhiyun 	/** channel load */
454*4882a593Smuzhiyun 	t_u8 chan_load;
455*4882a593Smuzhiyun 	/** TSF value in microseconds from the firmware at packet reception */
456*4882a593Smuzhiyun 	t_u64 network_tsf;
457*4882a593Smuzhiyun } wlan_get_scan_table_fixed;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun /** mlan_802_11_ssid data structure */
460*4882a593Smuzhiyun typedef struct _mlan_802_11_ssid {
461*4882a593Smuzhiyun 	/** SSID Length */
462*4882a593Smuzhiyun 	t_u32 ssid_len;
463*4882a593Smuzhiyun 	/** SSID information field */
464*4882a593Smuzhiyun 	t_u8 ssid[MLAN_MAX_SSID_LENGTH];
465*4882a593Smuzhiyun } mlan_802_11_ssid, *pmlan_802_11_ssid;
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun typedef MLAN_PACK_START struct _tx_status_event {
468*4882a593Smuzhiyun 	/** packet type */
469*4882a593Smuzhiyun 	t_u8 packet_type;
470*4882a593Smuzhiyun 	/** tx_token_id */
471*4882a593Smuzhiyun 	t_u8 tx_token_id;
472*4882a593Smuzhiyun 	/** 0--success, 1--fail, 2--watchdogtimeout */
473*4882a593Smuzhiyun 	t_u8 status;
474*4882a593Smuzhiyun } MLAN_PACK_END tx_status_event;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun /**
477*4882a593Smuzhiyun  *  Sructure to retrieve the scan table
478*4882a593Smuzhiyun  */
479*4882a593Smuzhiyun typedef struct {
480*4882a593Smuzhiyun 	/**
481*4882a593Smuzhiyun 	 *  - Zero based scan entry to start retrieval in command request
482*4882a593Smuzhiyun 	 *  - Number of scans entries returned in command response
483*4882a593Smuzhiyun 	 */
484*4882a593Smuzhiyun 	t_u32 scan_number;
485*4882a593Smuzhiyun 	/**
486*4882a593Smuzhiyun 	 * Buffer marker for multiple wlan_ioctl_get_scan_table_entry
487*4882a593Smuzhiyun 	 * structures. Each struct is padded to the nearest 32 bit boundary.
488*4882a593Smuzhiyun 	 */
489*4882a593Smuzhiyun 	t_u8 scan_table_entry_buf[1];
490*4882a593Smuzhiyun } wlan_ioctl_get_scan_table_info;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun /**
493*4882a593Smuzhiyun  *  Structure passed in the wlan_ioctl_get_scan_table_info for each
494*4882a593Smuzhiyun  *    BSS returned in the WLAN_GET_SCAN_RESP IOCTL
495*4882a593Smuzhiyun  */
496*4882a593Smuzhiyun typedef struct _wlan_ioctl_get_scan_table_entry {
497*4882a593Smuzhiyun 	/**
498*4882a593Smuzhiyun 	 *  Fixed field length included in the response.
499*4882a593Smuzhiyun 	 *
500*4882a593Smuzhiyun 	 *  Length value is included so future fixed fields can be added to the
501*4882a593Smuzhiyun 	 *   response without breaking backwards compatibility.  Use the length
502*4882a593Smuzhiyun 	 *   to find the offset for the bssInfoLength field, not a sizeof()
503*4882a593Smuzhiyun 	 * calc.
504*4882a593Smuzhiyun 	 */
505*4882a593Smuzhiyun 	t_u32 fixed_field_length;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	/**
508*4882a593Smuzhiyun 	 *  Length of the BSS Information (probe resp or beacon) that
509*4882a593Smuzhiyun 	 *    follows after the fixed_field_length
510*4882a593Smuzhiyun 	 */
511*4882a593Smuzhiyun 	t_u32 bss_info_length;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	/**
514*4882a593Smuzhiyun 	 *  Always present, fixed length data fields for the BSS
515*4882a593Smuzhiyun 	 */
516*4882a593Smuzhiyun 	wlan_get_scan_table_fixed fixed_fields;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	/*
519*4882a593Smuzhiyun 	 * Probe response or beacon scanned for the BSS.
520*4882a593Smuzhiyun 	 *
521*4882a593Smuzhiyun 	 * Field layout:
522*4882a593Smuzhiyun 	 *  - TSF              8 octets
523*4882a593Smuzhiyun 	 *  - Beacon Interval  2 octets
524*4882a593Smuzhiyun 	 *  - Capability Info  2 octets
525*4882a593Smuzhiyun 	 *
526*4882a593Smuzhiyun 	 *  - IEEE Infomation Elements; variable number & length per 802.11 spec
527*4882a593Smuzhiyun 	 */
528*4882a593Smuzhiyun 	/* t_u8  bss_info_buffer[]; */
529*4882a593Smuzhiyun } wlan_ioctl_get_scan_table_entry;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun /** Type definition of mlan_scan_time_params */
532*4882a593Smuzhiyun typedef struct _mlan_scan_time_params {
533*4882a593Smuzhiyun 	/** Scan channel time for specific scan in milliseconds */
534*4882a593Smuzhiyun 	t_u32 specific_scan_time;
535*4882a593Smuzhiyun 	/** Scan channel time for active scan in milliseconds */
536*4882a593Smuzhiyun 	t_u32 active_scan_time;
537*4882a593Smuzhiyun 	/** Scan channel time for passive scan in milliseconds */
538*4882a593Smuzhiyun 	t_u32 passive_scan_time;
539*4882a593Smuzhiyun } mlan_scan_time_params, *pmlan_scan_time_params;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun /** Type definition of mlan_user_scan */
542*4882a593Smuzhiyun typedef struct _mlan_user_scan {
543*4882a593Smuzhiyun 	/** Length of scan_cfg_buf */
544*4882a593Smuzhiyun 	t_u32 scan_cfg_len;
545*4882a593Smuzhiyun 	/** Buffer of scan config */
546*4882a593Smuzhiyun 	t_u8 scan_cfg_buf[1];
547*4882a593Smuzhiyun } mlan_user_scan, *pmlan_user_scan;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun /** Type definition of mlan_scan_req */
550*4882a593Smuzhiyun typedef struct _mlan_scan_req {
551*4882a593Smuzhiyun 	/** BSS mode for scanning */
552*4882a593Smuzhiyun 	t_u32 scan_mode;
553*4882a593Smuzhiyun 	/** Scan type */
554*4882a593Smuzhiyun 	t_u32 scan_type;
555*4882a593Smuzhiyun 	/** SSID */
556*4882a593Smuzhiyun 	mlan_802_11_ssid scan_ssid;
557*4882a593Smuzhiyun 	/** Scan time parameters */
558*4882a593Smuzhiyun 	mlan_scan_time_params scan_time;
559*4882a593Smuzhiyun 	/** Scan config parameters in user scan */
560*4882a593Smuzhiyun 	mlan_user_scan user_scan;
561*4882a593Smuzhiyun } mlan_scan_req, *pmlan_scan_req;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun /** Type defnition of mlan_scan_resp */
564*4882a593Smuzhiyun typedef struct _mlan_scan_resp {
565*4882a593Smuzhiyun 	/** Number of scan result */
566*4882a593Smuzhiyun 	t_u32 num_in_scan_table;
567*4882a593Smuzhiyun 	/** Scan table */
568*4882a593Smuzhiyun 	t_u8 *pscan_table;
569*4882a593Smuzhiyun 	/* Age in seconds */
570*4882a593Smuzhiyun 	t_u32 age_in_secs;
571*4882a593Smuzhiyun 	/** channel statstics */
572*4882a593Smuzhiyun 	t_u8 *pchan_stats;
573*4882a593Smuzhiyun 	/** Number of records in the chan_stats */
574*4882a593Smuzhiyun 	t_u32 num_in_chan_stats;
575*4882a593Smuzhiyun } mlan_scan_resp, *pmlan_scan_resp;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun #define EXT_SCAN_TYPE_ENH 2
578*4882a593Smuzhiyun /** Type definition of mlan_scan_cfg */
579*4882a593Smuzhiyun typedef struct _mlan_scan_cfg {
580*4882a593Smuzhiyun 	/** Scan type */
581*4882a593Smuzhiyun 	t_u32 scan_type;
582*4882a593Smuzhiyun 	/** BSS mode for scanning */
583*4882a593Smuzhiyun 	t_u32 scan_mode;
584*4882a593Smuzhiyun 	/** Scan probe */
585*4882a593Smuzhiyun 	t_u32 scan_probe;
586*4882a593Smuzhiyun 	/** Scan time parameters */
587*4882a593Smuzhiyun 	mlan_scan_time_params scan_time;
588*4882a593Smuzhiyun 	/** First passive scan then active scan */
589*4882a593Smuzhiyun 	t_u8 passive_to_active_scan;
590*4882a593Smuzhiyun 	/** Ext_scan:  0 disable, 1: enable, 2: enhance scan*/
591*4882a593Smuzhiyun 	t_u32 ext_scan;
592*4882a593Smuzhiyun 	/** scan channel gap */
593*4882a593Smuzhiyun 	t_u32 scan_chan_gap;
594*4882a593Smuzhiyun } mlan_scan_cfg, *pmlan_scan_cfg;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun /** Type defnition of mlan_ds_scan for MLAN_IOCTL_SCAN */
597*4882a593Smuzhiyun typedef struct _mlan_ds_scan {
598*4882a593Smuzhiyun 	/** Sub-command */
599*4882a593Smuzhiyun 	t_u32 sub_command;
600*4882a593Smuzhiyun 	/** Scan request/response */
601*4882a593Smuzhiyun 	union {
602*4882a593Smuzhiyun 		/** Scan request */
603*4882a593Smuzhiyun 		mlan_scan_req scan_req;
604*4882a593Smuzhiyun 		/** Scan response */
605*4882a593Smuzhiyun 		mlan_scan_resp scan_resp;
606*4882a593Smuzhiyun 		/** Scan config parameters in user scan */
607*4882a593Smuzhiyun 		mlan_user_scan user_scan;
608*4882a593Smuzhiyun 		/** Scan config parameters */
609*4882a593Smuzhiyun 		mlan_scan_cfg scan_cfg;
610*4882a593Smuzhiyun 	} param;
611*4882a593Smuzhiyun } mlan_ds_scan, *pmlan_ds_scan;
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
614*4882a593Smuzhiyun /** BSS Configuration Group */
615*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
616*4882a593Smuzhiyun /** Enumeration for BSS mode */
617*4882a593Smuzhiyun enum _mlan_bss_mode {
618*4882a593Smuzhiyun 	MLAN_BSS_MODE_INFRA = 1,
619*4882a593Smuzhiyun 	MLAN_BSS_MODE_IBSS,
620*4882a593Smuzhiyun 	MLAN_BSS_MODE_AUTO
621*4882a593Smuzhiyun };
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun /** Maximum key length */
624*4882a593Smuzhiyun #define MLAN_MAX_KEY_LENGTH 32
625*4882a593Smuzhiyun /** Maximum PMK R0 NAME key length */
626*4882a593Smuzhiyun #define MLAN_MAX_PMKR0_NAME_LENGTH 16
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun /** Maximum atim window in milliseconds */
629*4882a593Smuzhiyun #define MLAN_MAX_ATIM_WINDOW 50
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun /** Minimum beacon interval */
632*4882a593Smuzhiyun #define MLAN_MIN_BEACON_INTERVAL 20
633*4882a593Smuzhiyun /** Maximum beacon interval */
634*4882a593Smuzhiyun #define MLAN_MAX_BEACON_INTERVAL 1000
635*4882a593Smuzhiyun /** Default beacon interval */
636*4882a593Smuzhiyun #define MLAN_BEACON_INTERVAL 100
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun /** Receive all packets */
639*4882a593Smuzhiyun #define MLAN_PROMISC_MODE 1
640*4882a593Smuzhiyun /** Receive multicast packets in multicast list */
641*4882a593Smuzhiyun #define MLAN_MULTICAST_MODE 2
642*4882a593Smuzhiyun /** Receive all multicast packets */
643*4882a593Smuzhiyun #define MLAN_ALL_MULTI_MODE 4
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun /** Maximum size of multicast list */
646*4882a593Smuzhiyun #define MLAN_MAX_MULTICAST_LIST_SIZE 32
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun /** mlan_multicast_list data structure for MLAN_OID_BSS_MULTICAST_LIST */
649*4882a593Smuzhiyun typedef struct _mlan_multicast_list {
650*4882a593Smuzhiyun 	/** Multicast mode */
651*4882a593Smuzhiyun 	t_u32 mode;
652*4882a593Smuzhiyun 	/** Number of multicast addresses in the list */
653*4882a593Smuzhiyun 	t_u32 num_multicast_addr;
654*4882a593Smuzhiyun 	/** Multicast address list */
655*4882a593Smuzhiyun 	mlan_802_11_mac_addr mac_list[MLAN_MAX_MULTICAST_LIST_SIZE];
656*4882a593Smuzhiyun } mlan_multicast_list, *pmlan_multicast_list;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun /** Max channel */
659*4882a593Smuzhiyun #define MLAN_MAX_CHANNEL 177
660*4882a593Smuzhiyun /** Maximum number of channels in table */
661*4882a593Smuzhiyun #define MLAN_MAX_CHANNEL_NUM 128
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun /** Channel/frequence for MLAN_OID_BSS_CHANNEL */
664*4882a593Smuzhiyun typedef struct _chan_freq {
665*4882a593Smuzhiyun 	/** Channel Number */
666*4882a593Smuzhiyun 	t_u32 channel;
667*4882a593Smuzhiyun 	/** Frequency of this Channel */
668*4882a593Smuzhiyun 	t_u32 freq;
669*4882a593Smuzhiyun } chan_freq;
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun /** mlan_chan_list data structure for MLAN_OID_BSS_CHANNEL_LIST */
672*4882a593Smuzhiyun typedef struct _mlan_chan_list {
673*4882a593Smuzhiyun 	/** Number of channel */
674*4882a593Smuzhiyun 	t_u32 num_of_chan;
675*4882a593Smuzhiyun 	/** Channel-Frequency table */
676*4882a593Smuzhiyun 	chan_freq cf[MLAN_MAX_CHANNEL_NUM];
677*4882a593Smuzhiyun } mlan_chan_list;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun /* This channel is disabled.*/
680*4882a593Smuzhiyun #define CHAN_FLAGS_DISABLED MBIT(0)
681*4882a593Smuzhiyun /* do not initiate radiation, this includes sending probe requests or beaconing
682*4882a593Smuzhiyun  */
683*4882a593Smuzhiyun #define CHAN_FLAGS_NO_IR MBIT(1)
684*4882a593Smuzhiyun /* Radar detection is required on this channel */
685*4882a593Smuzhiyun #define CHAN_FLAGS_RADAR MBIT(3)
686*4882a593Smuzhiyun /* extension channel above this channel is not permitted */
687*4882a593Smuzhiyun #define CHAN_FLAGS_NO_HT40PLUS MBIT(4)
688*4882a593Smuzhiyun /* extension channel below this channel is not permitted */
689*4882a593Smuzhiyun #define CHAN_FLAGS_NO_HT40MINUS MBIT(5)
690*4882a593Smuzhiyun /* OFDM is not allowed on this channel */
691*4882a593Smuzhiyun #define CHAN_FLAGS_NO_OFDM MBIT(6)
692*4882a593Smuzhiyun /** 80Mhz can not used on this channel */
693*4882a593Smuzhiyun #define CHAN_FLAGS_NO_80MHZ MBIT(7)
694*4882a593Smuzhiyun /** 180Mhz can not used on this channel */
695*4882a593Smuzhiyun #define CHAN_FLAGS_NO_160MHZ MBIT(8)
696*4882a593Smuzhiyun /* Only indoor use is permitted on this channel */
697*4882a593Smuzhiyun #define CHAN_FLAGS_INDOOR_ONLY MBIT(9)
698*4882a593Smuzhiyun /* IR operation is allowed on this channel if it's
699*4882a593Smuzhiyun  * connected concurrently to a BSS on the same channel on
700*4882a593Smuzhiyun  * the 2 GHz band or to a channel in the same UNII band (on the 5 GHz
701*4882a593Smuzhiyun  * band), and IEEE80211_CHAN_RADAR is not set */
702*4882a593Smuzhiyun #define CHAN_FLAGS_IR_CONCURRENT MBIT(10)
703*4882a593Smuzhiyun /* 20 MHz operation is not allowed on this channel */
704*4882a593Smuzhiyun #define CHAN_FLAGS_20MHZ MBIT(11)
705*4882a593Smuzhiyun /* 10 MHz operation is not allowed on this channel */
706*4882a593Smuzhiyun #define CHAN_FLAGS_NO_10MHZ MBIT(12)
707*4882a593Smuzhiyun /** This channel's flag is valid */
708*4882a593Smuzhiyun #define CHAN_FLAGS_MAX MBIT(31)
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun /** Maximum response buffer length */
711*4882a593Smuzhiyun #define ASSOC_RSP_BUF_SIZE 500
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_assoc_rsp for MLAN_OID_MISC_ASSOC_RSP */
714*4882a593Smuzhiyun typedef struct _mlan_ds_misc_assoc_rsp {
715*4882a593Smuzhiyun 	/** Associate response buffer */
716*4882a593Smuzhiyun 	t_u8 assoc_resp_buf[ASSOC_RSP_BUF_SIZE];
717*4882a593Smuzhiyun 	/** Response buffer length */
718*4882a593Smuzhiyun 	t_u32 assoc_resp_len;
719*4882a593Smuzhiyun } mlan_ds_misc_assoc_rsp, *pmlan_ds_misc_assoc_rsp;
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_assoc_req for MLAN_OID_MISC_ASSOC_REQ */
722*4882a593Smuzhiyun typedef struct _mlan_ds_misc_assoc_req {
723*4882a593Smuzhiyun 	/** Associate req buffer */
724*4882a593Smuzhiyun 	t_u8 assoc_req_buf[ASSOC_RSP_BUF_SIZE];
725*4882a593Smuzhiyun 	/** Response buffer length */
726*4882a593Smuzhiyun 	t_u32 assoc_req_len;
727*4882a593Smuzhiyun } mlan_ds_misc_assoc_req, *pmlan_ds_misc_assoc_req;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun /** mlan_ds_assoc_info */
730*4882a593Smuzhiyun typedef struct _mlan_ds_assoc_info {
731*4882a593Smuzhiyun 	/** Associate req buffer */
732*4882a593Smuzhiyun 	t_u8 assoc_resp_buf[ASSOC_RSP_BUF_SIZE];
733*4882a593Smuzhiyun 	/** Response buffer length */
734*4882a593Smuzhiyun 	t_u32 assoc_resp_len;
735*4882a593Smuzhiyun 	/** Associate req buffer */
736*4882a593Smuzhiyun 	t_u8 assoc_req_buf[ASSOC_RSP_BUF_SIZE];
737*4882a593Smuzhiyun 	/** Response buffer length */
738*4882a593Smuzhiyun 	t_u32 assoc_req_len;
739*4882a593Smuzhiyun } mlan_ds_assoc_info, *pmlan_ds_assoc_info;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun /** mlan_ssid_bssid  data structure for
742*4882a593Smuzhiyun  *  MLAN_OID_BSS_START and MLAN_OID_BSS_FIND_BSS
743*4882a593Smuzhiyun  */
744*4882a593Smuzhiyun typedef struct _mlan_ssid_bssid {
745*4882a593Smuzhiyun 	/** SSID */
746*4882a593Smuzhiyun 	mlan_802_11_ssid ssid;
747*4882a593Smuzhiyun 	/** BSSID */
748*4882a593Smuzhiyun 	mlan_802_11_mac_addr bssid;
749*4882a593Smuzhiyun 	/** index in BSSID list, start from 1 */
750*4882a593Smuzhiyun 	t_u32 idx;
751*4882a593Smuzhiyun 	/** Receive signal strength in dBm */
752*4882a593Smuzhiyun 	t_s32 rssi;
753*4882a593Smuzhiyun 	/* previous bssid */
754*4882a593Smuzhiyun 	mlan_802_11_mac_addr prev_bssid;
755*4882a593Smuzhiyun 	/**channel*/
756*4882a593Smuzhiyun 	t_u16 channel;
757*4882a593Smuzhiyun 	/**mobility domain value*/
758*4882a593Smuzhiyun 	t_u16 ft_md;
759*4882a593Smuzhiyun 	/**ft capability*/
760*4882a593Smuzhiyun 	t_u8 ft_cap;
761*4882a593Smuzhiyun 	/**band*/
762*4882a593Smuzhiyun 	t_u16 bss_band;
763*4882a593Smuzhiyun 	/** channel flag */
764*4882a593Smuzhiyun 	t_u32 channel_flags;
765*4882a593Smuzhiyun 	/** host mlme flag*/
766*4882a593Smuzhiyun 	t_u8 host_mlme;
767*4882a593Smuzhiyun 	/** assoicate resp frame/ie from firmware */
768*4882a593Smuzhiyun 	mlan_ds_misc_assoc_rsp assoc_rsp;
769*4882a593Smuzhiyun } mlan_ssid_bssid, *pmlan_ssid_bssid;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun /** Data structure of WMM ECW */
772*4882a593Smuzhiyun typedef struct _wmm_ecw_t {
773*4882a593Smuzhiyun #ifdef BIG_ENDIAN_SUPPORT
774*4882a593Smuzhiyun 	/** Maximum Ecw */
775*4882a593Smuzhiyun 	t_u8 ecw_max : 4;
776*4882a593Smuzhiyun 	/** Minimum Ecw */
777*4882a593Smuzhiyun 	t_u8 ecw_min : 4;
778*4882a593Smuzhiyun #else
779*4882a593Smuzhiyun 	/** Minimum Ecw */
780*4882a593Smuzhiyun 	t_u8 ecw_min : 4;
781*4882a593Smuzhiyun 	/** Maximum Ecw */
782*4882a593Smuzhiyun 	t_u8 ecw_max : 4;
783*4882a593Smuzhiyun #endif /* BIG_ENDIAN_SUPPORT */
784*4882a593Smuzhiyun } wmm_ecw_t, *pwmm_ecw_t;
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun /** Data structure of WMM Aci/Aifsn */
787*4882a593Smuzhiyun typedef struct _wmm_aci_aifsn_t {
788*4882a593Smuzhiyun #ifdef BIG_ENDIAN_SUPPORT
789*4882a593Smuzhiyun 	/** Reserved */
790*4882a593Smuzhiyun 	t_u8 reserved : 1;
791*4882a593Smuzhiyun 	/** Aci */
792*4882a593Smuzhiyun 	t_u8 aci : 2;
793*4882a593Smuzhiyun 	/** Acm */
794*4882a593Smuzhiyun 	t_u8 acm : 1;
795*4882a593Smuzhiyun 	/** Aifsn */
796*4882a593Smuzhiyun 	t_u8 aifsn : 4;
797*4882a593Smuzhiyun #else
798*4882a593Smuzhiyun 	/** Aifsn */
799*4882a593Smuzhiyun 	t_u8 aifsn : 4;
800*4882a593Smuzhiyun 	/** Acm */
801*4882a593Smuzhiyun 	t_u8 acm : 1;
802*4882a593Smuzhiyun 	/** Aci */
803*4882a593Smuzhiyun 	t_u8 aci : 2;
804*4882a593Smuzhiyun 	/** Reserved */
805*4882a593Smuzhiyun 	t_u8 reserved : 1;
806*4882a593Smuzhiyun #endif /* BIG_ENDIAN_SUPPORT */
807*4882a593Smuzhiyun } wmm_aci_aifsn_t, *pwmm_aci_aifsn_t;
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun /** Data structure of WMM AC parameters  */
810*4882a593Smuzhiyun typedef struct _wmm_ac_parameters_t {
811*4882a593Smuzhiyun 	wmm_aci_aifsn_t aci_aifsn; /**< AciAifSn */
812*4882a593Smuzhiyun 	wmm_ecw_t ecw; /**< Ecw */
813*4882a593Smuzhiyun 	t_u16 tx_op_limit; /**< Tx op limit */
814*4882a593Smuzhiyun } wmm_ac_parameters_t, *pwmm_ac_parameters_t;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun /** mlan_deauth_param */
817*4882a593Smuzhiyun typedef struct _mlan_deauth_param {
818*4882a593Smuzhiyun 	/** STA mac addr */
819*4882a593Smuzhiyun 	t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
820*4882a593Smuzhiyun 	/** deauth reason */
821*4882a593Smuzhiyun 	t_u16 reason_code;
822*4882a593Smuzhiyun } mlan_deauth_param;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun #ifdef UAP_SUPPORT
825*4882a593Smuzhiyun /** UAP FLAG: Host based */
826*4882a593Smuzhiyun #define UAP_FLAG_HOST_BASED MBIT(0)
827*4882a593Smuzhiyun /** UAP FLAG: Host mlme */
828*4882a593Smuzhiyun #define UAP_FLAG_HOST_MLME MBIT(1)
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun /** Maximum packet forward control value */
831*4882a593Smuzhiyun #define MAX_PKT_FWD_CTRL 15
832*4882a593Smuzhiyun /** Maximum BEACON period */
833*4882a593Smuzhiyun #define MAX_BEACON_PERIOD 4000
834*4882a593Smuzhiyun /** Minimum BEACON period */
835*4882a593Smuzhiyun #define MIN_BEACON_PERIOD 50
836*4882a593Smuzhiyun /** Maximum DTIM period */
837*4882a593Smuzhiyun #define MAX_DTIM_PERIOD 100
838*4882a593Smuzhiyun /** Minimum DTIM period */
839*4882a593Smuzhiyun #define MIN_DTIM_PERIOD 1
840*4882a593Smuzhiyun /** Maximum TX Power Limit */
841*4882a593Smuzhiyun #define MAX_TX_POWER 20
842*4882a593Smuzhiyun /** Minimum TX Power Limit */
843*4882a593Smuzhiyun #define MIN_TX_POWER 0
844*4882a593Smuzhiyun /** MAX station count */
845*4882a593Smuzhiyun #define MAX_STA_COUNT 64
846*4882a593Smuzhiyun /** Maximum RTS threshold */
847*4882a593Smuzhiyun #define MAX_RTS_THRESHOLD 2347
848*4882a593Smuzhiyun /** Maximum fragmentation threshold */
849*4882a593Smuzhiyun #define MAX_FRAG_THRESHOLD 2346
850*4882a593Smuzhiyun /** Minimum fragmentation threshold */
851*4882a593Smuzhiyun #define MIN_FRAG_THRESHOLD 256
852*4882a593Smuzhiyun /** data rate 54 M */
853*4882a593Smuzhiyun #define DATA_RATE_54M 108
854*4882a593Smuzhiyun /** Maximum value of bcast_ssid_ctl */
855*4882a593Smuzhiyun #define MAX_BCAST_SSID_CTL 2
856*4882a593Smuzhiyun /** antenna A */
857*4882a593Smuzhiyun #define ANTENNA_MODE_A 0
858*4882a593Smuzhiyun /** antenna B */
859*4882a593Smuzhiyun #define ANTENNA_MODE_B 1
860*4882a593Smuzhiyun /** transmit antenna */
861*4882a593Smuzhiyun #define TX_ANTENNA 1
862*4882a593Smuzhiyun /** receive antenna */
863*4882a593Smuzhiyun #define RX_ANTENNA 0
864*4882a593Smuzhiyun /** Maximum stage out time */
865*4882a593Smuzhiyun #define MAX_STAGE_OUT_TIME 864000
866*4882a593Smuzhiyun /** Minimum stage out time */
867*4882a593Smuzhiyun #define MIN_STAGE_OUT_TIME 50
868*4882a593Smuzhiyun /** Maximum Retry Limit */
869*4882a593Smuzhiyun #define MAX_RETRY_LIMIT 14
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun /** Maximum group key timer in seconds */
872*4882a593Smuzhiyun #define MAX_GRP_TIMER 86400
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun /** Maximum value of 4 byte configuration */
875*4882a593Smuzhiyun #define MAX_VALID_DWORD 0x7FFFFFFF /*  (1 << 31) - 1 */
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun /** default UAP BAND 2.4G */
878*4882a593Smuzhiyun #define DEFAULT_UAP_BAND 0
879*4882a593Smuzhiyun /** default UAP channel 6 */
880*4882a593Smuzhiyun #define DEFAULT_UAP_CHANNEL 6
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun /** Maximum data rates */
883*4882a593Smuzhiyun #define MAX_DATA_RATES 14
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun /** auto data rate */
886*4882a593Smuzhiyun #define DATA_RATE_AUTO 0
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun /**filter mode: disable */
889*4882a593Smuzhiyun #define MAC_FILTER_MODE_DISABLE 0
890*4882a593Smuzhiyun /**filter mode: block mac address */
891*4882a593Smuzhiyun #define MAC_FILTER_MODE_ALLOW_MAC 1
892*4882a593Smuzhiyun /**filter mode: block mac address */
893*4882a593Smuzhiyun #define MAC_FILTER_MODE_BLOCK_MAC 2
894*4882a593Smuzhiyun /** Maximum mac filter num */
895*4882a593Smuzhiyun #define MAX_MAC_FILTER_NUM 64
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun /* Bitmap for protocol to use */
898*4882a593Smuzhiyun /** No security */
899*4882a593Smuzhiyun #define PROTOCOL_NO_SECURITY 0x01
900*4882a593Smuzhiyun /** Static WEP */
901*4882a593Smuzhiyun #define PROTOCOL_STATIC_WEP 0x02
902*4882a593Smuzhiyun /** WPA */
903*4882a593Smuzhiyun #define PROTOCOL_WPA 0x08
904*4882a593Smuzhiyun /** WPA2 */
905*4882a593Smuzhiyun #define PROTOCOL_WPA2 0x20
906*4882a593Smuzhiyun /** WP2 Mixed */
907*4882a593Smuzhiyun #define PROTOCOL_WPA2_MIXED 0x28
908*4882a593Smuzhiyun /** EAP */
909*4882a593Smuzhiyun #define PROTOCOL_EAP 0x40
910*4882a593Smuzhiyun /** WAPI */
911*4882a593Smuzhiyun #define PROTOCOL_WAPI 0x80
912*4882a593Smuzhiyun /** WPA3 SAE */
913*4882a593Smuzhiyun #define PROTOCOL_WPA3_SAE 0x100
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun /** Key_mgmt_psk */
916*4882a593Smuzhiyun #define KEY_MGMT_NONE 0x04
917*4882a593Smuzhiyun /** Key_mgmt_none */
918*4882a593Smuzhiyun #define KEY_MGMT_PSK 0x02
919*4882a593Smuzhiyun /** Key_mgmt_eap  */
920*4882a593Smuzhiyun #define KEY_MGMT_EAP 0x01
921*4882a593Smuzhiyun /** Key_mgmt_psk_sha256 */
922*4882a593Smuzhiyun #define KEY_MGMT_PSK_SHA256 0x100
923*4882a593Smuzhiyun /** Key_mgmt_sae */
924*4882a593Smuzhiyun #define KEY_MGMT_SAE 0x400
925*4882a593Smuzhiyun /** Key_mgmt_owe */
926*4882a593Smuzhiyun #define KEY_MGMT_OWE 0x200
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun /** TKIP */
929*4882a593Smuzhiyun #define CIPHER_TKIP 0x04
930*4882a593Smuzhiyun /** AES CCMP */
931*4882a593Smuzhiyun #define CIPHER_AES_CCMP 0x08
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun /** Valid cipher bitmap */
934*4882a593Smuzhiyun #define VALID_CIPHER_BITMAP 0x0c
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun /** Packet forwarding to be done by FW or host */
937*4882a593Smuzhiyun #define PKT_FWD_FW_BIT 0x01
938*4882a593Smuzhiyun /** Intra-BSS broadcast packet forwarding allow bit */
939*4882a593Smuzhiyun #define PKT_FWD_INTRA_BCAST 0x02
940*4882a593Smuzhiyun /** Intra-BSS unicast packet forwarding allow bit */
941*4882a593Smuzhiyun #define PKT_FWD_INTRA_UCAST 0x04
942*4882a593Smuzhiyun /** Inter-BSS unicast packet forwarding allow bit */
943*4882a593Smuzhiyun #define PKT_FWD_INTER_UCAST 0x08
944*4882a593Smuzhiyun /** Intra-BSS unicast packet */
945*4882a593Smuzhiyun #define PKT_INTRA_UCAST 0x01
946*4882a593Smuzhiyun /** Inter-BSS unicast packet */
947*4882a593Smuzhiyun #define PKT_INTER_UCAST 0x02
948*4882a593Smuzhiyun /** Enable Host PKT forwarding */
949*4882a593Smuzhiyun #define PKT_FWD_ENABLE_BIT 0x01
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun /** Channel List Entry */
952*4882a593Smuzhiyun typedef struct _channel_list {
953*4882a593Smuzhiyun 	/** Channel Number */
954*4882a593Smuzhiyun 	t_u8 chan_number;
955*4882a593Smuzhiyun 	/** Band Config */
956*4882a593Smuzhiyun 	Band_Config_t bandcfg;
957*4882a593Smuzhiyun } scan_chan_list;
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun /** mac_filter data structure */
960*4882a593Smuzhiyun typedef struct _mac_filter {
961*4882a593Smuzhiyun 	/** mac filter mode */
962*4882a593Smuzhiyun 	t_u16 filter_mode;
963*4882a593Smuzhiyun 	/** mac adress count */
964*4882a593Smuzhiyun 	t_u16 mac_count;
965*4882a593Smuzhiyun 	/** mac address list */
966*4882a593Smuzhiyun 	mlan_802_11_mac_addr mac_list[MAX_MAC_FILTER_NUM];
967*4882a593Smuzhiyun } mac_filter;
968*4882a593Smuzhiyun 
969*4882a593Smuzhiyun /** wpa parameter */
970*4882a593Smuzhiyun typedef struct _wpa_param {
971*4882a593Smuzhiyun 	/** Pairwise cipher WPA */
972*4882a593Smuzhiyun 	t_u8 pairwise_cipher_wpa;
973*4882a593Smuzhiyun 	/** Pairwise cipher WPA2 */
974*4882a593Smuzhiyun 	t_u8 pairwise_cipher_wpa2;
975*4882a593Smuzhiyun 	/** group cipher */
976*4882a593Smuzhiyun 	t_u8 group_cipher;
977*4882a593Smuzhiyun 	/** RSN replay protection */
978*4882a593Smuzhiyun 	t_u8 rsn_protection;
979*4882a593Smuzhiyun 	/** passphrase length */
980*4882a593Smuzhiyun 	t_u32 length;
981*4882a593Smuzhiyun 	/** passphrase */
982*4882a593Smuzhiyun 	t_u8 passphrase[64];
983*4882a593Smuzhiyun 	/**group key rekey time in seconds */
984*4882a593Smuzhiyun 	t_u32 gk_rekey_time;
985*4882a593Smuzhiyun } wpa_param;
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun /** wep key */
988*4882a593Smuzhiyun typedef struct _wep_key {
989*4882a593Smuzhiyun 	/** key index 0-3 */
990*4882a593Smuzhiyun 	t_u8 key_index;
991*4882a593Smuzhiyun 	/** is default */
992*4882a593Smuzhiyun 	t_u8 is_default;
993*4882a593Smuzhiyun 	/** length */
994*4882a593Smuzhiyun 	t_u16 length;
995*4882a593Smuzhiyun 	/** key data */
996*4882a593Smuzhiyun 	t_u8 key[26];
997*4882a593Smuzhiyun } wep_key;
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun /** wep param */
1000*4882a593Smuzhiyun typedef struct _wep_param {
1001*4882a593Smuzhiyun 	/** key 0 */
1002*4882a593Smuzhiyun 	wep_key key0;
1003*4882a593Smuzhiyun 	/** key 1 */
1004*4882a593Smuzhiyun 	wep_key key1;
1005*4882a593Smuzhiyun 	/** key 2 */
1006*4882a593Smuzhiyun 	wep_key key2;
1007*4882a593Smuzhiyun 	/** key 3 */
1008*4882a593Smuzhiyun 	wep_key key3;
1009*4882a593Smuzhiyun } wep_param;
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun /** Data structure of WMM QoS information */
1012*4882a593Smuzhiyun typedef struct _wmm_qos_info_t {
1013*4882a593Smuzhiyun #ifdef BIG_ENDIAN_SUPPORT
1014*4882a593Smuzhiyun 	/** QoS UAPSD */
1015*4882a593Smuzhiyun 	t_u8 qos_uapsd : 1;
1016*4882a593Smuzhiyun 	/** Reserved */
1017*4882a593Smuzhiyun 	t_u8 reserved : 3;
1018*4882a593Smuzhiyun 	/** Parameter set count */
1019*4882a593Smuzhiyun 	t_u8 para_set_count : 4;
1020*4882a593Smuzhiyun #else
1021*4882a593Smuzhiyun 	/** Parameter set count */
1022*4882a593Smuzhiyun 	t_u8 para_set_count : 4;
1023*4882a593Smuzhiyun 	/** Reserved */
1024*4882a593Smuzhiyun 	t_u8 reserved : 3;
1025*4882a593Smuzhiyun 	/** QoS UAPSD */
1026*4882a593Smuzhiyun 	t_u8 qos_uapsd : 1;
1027*4882a593Smuzhiyun #endif /* BIG_ENDIAN_SUPPORT */
1028*4882a593Smuzhiyun } wmm_qos_info_t, *pwmm_qos_info_t;
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun /** Data structure of WMM parameter IE  */
1031*4882a593Smuzhiyun typedef struct _wmm_parameter_t {
1032*4882a593Smuzhiyun 	/** OuiType:  00:50:f2:02 */
1033*4882a593Smuzhiyun 	t_u8 ouitype[4];
1034*4882a593Smuzhiyun 	/** Oui subtype: 01 */
1035*4882a593Smuzhiyun 	t_u8 ouisubtype;
1036*4882a593Smuzhiyun 	/** version: 01 */
1037*4882a593Smuzhiyun 	t_u8 version;
1038*4882a593Smuzhiyun 	/** QoS information */
1039*4882a593Smuzhiyun 	t_u8 qos_info;
1040*4882a593Smuzhiyun 	/** Reserved */
1041*4882a593Smuzhiyun 	t_u8 reserved;
1042*4882a593Smuzhiyun 	/** AC Parameters Record WMM_AC_BE, WMM_AC_BK, WMM_AC_VI, WMM_AC_VO */
1043*4882a593Smuzhiyun 	wmm_ac_parameters_t ac_params[MAX_AC_QUEUES];
1044*4882a593Smuzhiyun } wmm_parameter_t, *pwmm_parameter_t;
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun /** MAX BG channel */
1047*4882a593Smuzhiyun #define MAX_BG_CHANNEL 14
1048*4882a593Smuzhiyun /** mlan_bss_param
1049*4882a593Smuzhiyun  * Note: For each entry you must enter an invalid value
1050*4882a593Smuzhiyun  * in the MOAL function woal_set_sys_config_invalid_data().
1051*4882a593Smuzhiyun  * Otherwise for a valid data an unwanted TLV will be
1052*4882a593Smuzhiyun  * added to that command.
1053*4882a593Smuzhiyun  */
1054*4882a593Smuzhiyun typedef struct _mlan_uap_bss_param {
1055*4882a593Smuzhiyun 	/** AP mac addr */
1056*4882a593Smuzhiyun 	mlan_802_11_mac_addr mac_addr;
1057*4882a593Smuzhiyun 	/** SSID */
1058*4882a593Smuzhiyun 	mlan_802_11_ssid ssid;
1059*4882a593Smuzhiyun 	/** Broadcast ssid control */
1060*4882a593Smuzhiyun 	t_u8 bcast_ssid_ctl;
1061*4882a593Smuzhiyun 	/** Radio control: on/off */
1062*4882a593Smuzhiyun 	t_u8 radio_ctl;
1063*4882a593Smuzhiyun 	/** dtim period */
1064*4882a593Smuzhiyun 	t_u8 dtim_period;
1065*4882a593Smuzhiyun 	/** beacon period */
1066*4882a593Smuzhiyun 	t_u16 beacon_period;
1067*4882a593Smuzhiyun 	/** rates */
1068*4882a593Smuzhiyun 	t_u8 rates[MAX_DATA_RATES];
1069*4882a593Smuzhiyun 	/** Tx data rate */
1070*4882a593Smuzhiyun 	t_u16 tx_data_rate;
1071*4882a593Smuzhiyun 	/** Tx beacon rate */
1072*4882a593Smuzhiyun 	t_u16 tx_beacon_rate;
1073*4882a593Smuzhiyun 	/** multicast/broadcast data rate */
1074*4882a593Smuzhiyun 	t_u16 mcbc_data_rate;
1075*4882a593Smuzhiyun 	/** Tx power level in dBm */
1076*4882a593Smuzhiyun 	t_u8 tx_power_level;
1077*4882a593Smuzhiyun 	/** Tx antenna */
1078*4882a593Smuzhiyun 	t_u8 tx_antenna;
1079*4882a593Smuzhiyun 	/** Rx antenna */
1080*4882a593Smuzhiyun 	t_u8 rx_antenna;
1081*4882a593Smuzhiyun 	/** packet forward control */
1082*4882a593Smuzhiyun 	t_u8 pkt_forward_ctl;
1083*4882a593Smuzhiyun 	/** max station count */
1084*4882a593Smuzhiyun 	t_u16 max_sta_count;
1085*4882a593Smuzhiyun 	/** mac filter */
1086*4882a593Smuzhiyun 	mac_filter filter;
1087*4882a593Smuzhiyun 	/** station ageout timer in unit of 100ms  */
1088*4882a593Smuzhiyun 	t_u32 sta_ageout_timer;
1089*4882a593Smuzhiyun 	/** PS station ageout timer in unit of 100ms  */
1090*4882a593Smuzhiyun 	t_u32 ps_sta_ageout_timer;
1091*4882a593Smuzhiyun 	/** RTS threshold */
1092*4882a593Smuzhiyun 	t_u16 rts_threshold;
1093*4882a593Smuzhiyun 	/** fragmentation threshold */
1094*4882a593Smuzhiyun 	t_u16 frag_threshold;
1095*4882a593Smuzhiyun 	/**  retry_limit */
1096*4882a593Smuzhiyun 	t_u16 retry_limit;
1097*4882a593Smuzhiyun 	/**  pairwise update timeout in milliseconds */
1098*4882a593Smuzhiyun 	t_u32 pairwise_update_timeout;
1099*4882a593Smuzhiyun 	/** pairwise handshake retries */
1100*4882a593Smuzhiyun 	t_u32 pwk_retries;
1101*4882a593Smuzhiyun 	/**  groupwise update timeout in milliseconds */
1102*4882a593Smuzhiyun 	t_u32 groupwise_update_timeout;
1103*4882a593Smuzhiyun 	/** groupwise handshake retries */
1104*4882a593Smuzhiyun 	t_u32 gwk_retries;
1105*4882a593Smuzhiyun 	/** preamble type */
1106*4882a593Smuzhiyun 	t_u8 preamble_type;
1107*4882a593Smuzhiyun 	/** band cfg */
1108*4882a593Smuzhiyun 	Band_Config_t bandcfg;
1109*4882a593Smuzhiyun 	/** channel */
1110*4882a593Smuzhiyun 	t_u8 channel;
1111*4882a593Smuzhiyun 	/** auth mode */
1112*4882a593Smuzhiyun 	t_u16 auth_mode;
1113*4882a593Smuzhiyun 	/** PWE derivation */
1114*4882a593Smuzhiyun 	t_u8 pwe_derivation;
1115*4882a593Smuzhiyun 	/** transition disable */
1116*4882a593Smuzhiyun 	t_u8 transition_disable;
1117*4882a593Smuzhiyun 	/** encryption protocol */
1118*4882a593Smuzhiyun 	t_u16 protocol;
1119*4882a593Smuzhiyun 	/** key managment type */
1120*4882a593Smuzhiyun 	t_u16 key_mgmt;
1121*4882a593Smuzhiyun 	/** wep param */
1122*4882a593Smuzhiyun 	wep_param wep_cfg;
1123*4882a593Smuzhiyun 	/** wpa param */
1124*4882a593Smuzhiyun 	wpa_param wpa_cfg;
1125*4882a593Smuzhiyun 	/** Mgmt IE passthru mask */
1126*4882a593Smuzhiyun 	t_u32 mgmt_ie_passthru_mask;
1127*4882a593Smuzhiyun 	/*
1128*4882a593Smuzhiyun 	 * 11n HT Cap  HTCap_t  ht_cap
1129*4882a593Smuzhiyun 	 */
1130*4882a593Smuzhiyun 	/** HT Capabilities Info field */
1131*4882a593Smuzhiyun 	t_u16 ht_cap_info;
1132*4882a593Smuzhiyun 	/** A-MPDU Parameters field */
1133*4882a593Smuzhiyun 	t_u8 ampdu_param;
1134*4882a593Smuzhiyun 	/** Supported MCS Set field */
1135*4882a593Smuzhiyun 	t_u8 supported_mcs_set[16];
1136*4882a593Smuzhiyun 	/** HT Extended Capabilities field */
1137*4882a593Smuzhiyun 	t_u16 ht_ext_cap;
1138*4882a593Smuzhiyun 	/** Transmit Beamforming Capabilities field */
1139*4882a593Smuzhiyun 	t_u32 tx_bf_cap;
1140*4882a593Smuzhiyun 	/** Antenna Selection Capability field */
1141*4882a593Smuzhiyun 	t_u8 asel;
1142*4882a593Smuzhiyun 	/** Enable 2040 Coex */
1143*4882a593Smuzhiyun 	t_u8 enable_2040coex;
1144*4882a593Smuzhiyun 	/** key management operation */
1145*4882a593Smuzhiyun 	t_u16 key_mgmt_operation;
1146*4882a593Smuzhiyun 	/** BSS status */
1147*4882a593Smuzhiyun 	t_u16 bss_status;
1148*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
1149*4882a593Smuzhiyun 	/* pre shared key */
1150*4882a593Smuzhiyun 	t_u8 psk[MLAN_MAX_KEY_LENGTH];
1151*4882a593Smuzhiyun #endif /* WIFI_DIRECT_SUPPORT */
1152*4882a593Smuzhiyun 	/** Number of channels in scan_channel_list */
1153*4882a593Smuzhiyun 	t_u32 num_of_chan;
1154*4882a593Smuzhiyun 	/** scan channel list in ACS mode */
1155*4882a593Smuzhiyun 	scan_chan_list chan_list[MLAN_MAX_CHANNEL];
1156*4882a593Smuzhiyun 	/** Wmm parameters */
1157*4882a593Smuzhiyun 	wmm_parameter_t wmm_para;
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun 	/** uap host based config */
1160*4882a593Smuzhiyun 	t_u32 uap_host_based_config;
1161*4882a593Smuzhiyun } mlan_uap_bss_param, *pmlan_uap_bss_param;
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun /** mlan_uap_scan_channels */
1164*4882a593Smuzhiyun typedef struct _mlan_uap_scan_channels {
1165*4882a593Smuzhiyun 	/** flag for remove nop channel*/
1166*4882a593Smuzhiyun 	t_u8 remove_nop_channel;
1167*4882a593Smuzhiyun 	/** num of removed channel */
1168*4882a593Smuzhiyun 	t_u8 num_remvoed_channel;
1169*4882a593Smuzhiyun 	/** Number of channels in scan_channel_list */
1170*4882a593Smuzhiyun 	t_u32 num_of_chan;
1171*4882a593Smuzhiyun 	/** scan channel list in ACS mode */
1172*4882a593Smuzhiyun 	scan_chan_list chan_list[MLAN_MAX_CHANNEL];
1173*4882a593Smuzhiyun } mlan_uap_scan_channels;
1174*4882a593Smuzhiyun 
1175*4882a593Smuzhiyun #define MAX_NUM_PKTS 9
1176*4882a593Smuzhiyun #define DEF_NUM_PKTS 3
1177*4882a593Smuzhiyun /** mlan_chan_switch_param */
1178*4882a593Smuzhiyun typedef struct _mlan_action_chan_switch {
1179*4882a593Smuzhiyun 	/** mode*/
1180*4882a593Smuzhiyun 	t_u8 mode;
1181*4882a593Smuzhiyun 	/** switch mode*/
1182*4882a593Smuzhiyun 	t_u8 chan_switch_mode;
1183*4882a593Smuzhiyun 	/** oper class*/
1184*4882a593Smuzhiyun 	t_u8 new_oper_class;
1185*4882a593Smuzhiyun 	/** new channel */
1186*4882a593Smuzhiyun 	t_u8 new_channel_num;
1187*4882a593Smuzhiyun 	/** chan_switch_count */
1188*4882a593Smuzhiyun 	t_u8 chan_switch_count;
1189*4882a593Smuzhiyun } mlan_action_chan_switch;
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun /** mlan_uap_oper_ctrl */
1192*4882a593Smuzhiyun typedef struct _mlan_uap_oper_ctrl {
1193*4882a593Smuzhiyun 	/** control value
1194*4882a593Smuzhiyun 	 *  0: do nothing,
1195*4882a593Smuzhiyun 	 *  2: uap stops and restarts automaticaly
1196*4882a593Smuzhiyun 	 */
1197*4882a593Smuzhiyun 	t_u16 ctrl_value;
1198*4882a593Smuzhiyun 	/** channel opt
1199*4882a593Smuzhiyun 	 *  1: uap restart on default 2.4G/channel 6
1200*4882a593Smuzhiyun 	 *  2: uap restart on the band/channel configured by driver previously
1201*4882a593Smuzhiyun 	 *  3: uap restart on the band/channel specified by band_cfg and channel
1202*4882a593Smuzhiyun 	 */
1203*4882a593Smuzhiyun 	t_u16 chan_opt;
1204*4882a593Smuzhiyun 	/** band cfg   0
1205*4882a593Smuzhiyun 	 *  0: 20Mhz  2: 40 Mhz  3: 80Mhz
1206*4882a593Smuzhiyun 	 */
1207*4882a593Smuzhiyun 	t_u8 band_cfg;
1208*4882a593Smuzhiyun 	/** channel */
1209*4882a593Smuzhiyun 	t_u8 channel;
1210*4882a593Smuzhiyun } mlan_uap_oper_ctrl;
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun /** mlan_uap_acs_scan */
1213*4882a593Smuzhiyun typedef struct _mlan_uap_acs_scan {
1214*4882a593Smuzhiyun 	/** band */
1215*4882a593Smuzhiyun 	Band_Config_t bandcfg;
1216*4882a593Smuzhiyun 	/** channel */
1217*4882a593Smuzhiyun 	t_u8 chan;
1218*4882a593Smuzhiyun } mlan_uap_acs_scan;
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun /** station is authorized (802.1X) */
1221*4882a593Smuzhiyun #define STA_FLAG_AUTHORIZED MBIT(1)
1222*4882a593Smuzhiyun /** Station is capable of receiving frames with short barker preamble */
1223*4882a593Smuzhiyun #define STA_FLAG_SHORT_PREAMBLE MBIT(2)
1224*4882a593Smuzhiyun /** station is WME/QoS capable */
1225*4882a593Smuzhiyun #define STA_FLAG_WME MBIT(3)
1226*4882a593Smuzhiyun /** station uses management frame protection */
1227*4882a593Smuzhiyun #define STA_FLAG_MFP MBIT(4)
1228*4882a593Smuzhiyun /** station is authenticated */
1229*4882a593Smuzhiyun #define STA_FLAG_AUTHENTICATED MBIT(5)
1230*4882a593Smuzhiyun /** station is a TDLS peer */
1231*4882a593Smuzhiyun #define STA_FLAG_TDLS_PEER MBIT(6)
1232*4882a593Smuzhiyun /** station is associated */
1233*4882a593Smuzhiyun #define STA_FLAG_ASSOCIATED MBIT(7)
1234*4882a593Smuzhiyun /** mlan_ds_sta_info */
1235*4882a593Smuzhiyun typedef struct _mlan_ds_sta_info {
1236*4882a593Smuzhiyun 	/** aid */
1237*4882a593Smuzhiyun 	t_u16 aid;
1238*4882a593Smuzhiyun 	/** peer_mac */
1239*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
1240*4882a593Smuzhiyun 	/** Listen Interval */
1241*4882a593Smuzhiyun 	int listen_interval;
1242*4882a593Smuzhiyun 	/** Capability Info */
1243*4882a593Smuzhiyun 	t_u16 cap_info;
1244*4882a593Smuzhiyun 	/** station flag */
1245*4882a593Smuzhiyun 	t_u32 sta_flags;
1246*4882a593Smuzhiyun 	/** tlv len */
1247*4882a593Smuzhiyun 	t_u16 tlv_len;
1248*4882a593Smuzhiyun 	/** tlv start */
1249*4882a593Smuzhiyun 	t_u8 tlv[];
1250*4882a593Smuzhiyun } mlan_ds_sta_info;
1251*4882a593Smuzhiyun #endif
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
1254*4882a593Smuzhiyun /** mode: disable wifi direct */
1255*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_DISABLE 0
1256*4882a593Smuzhiyun /** mode: listen */
1257*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_LISTEN 1
1258*4882a593Smuzhiyun /** mode: GO */
1259*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_GO 2
1260*4882a593Smuzhiyun /** mode: client */
1261*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_CLIENT 3
1262*4882a593Smuzhiyun /** mode: find */
1263*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_FIND 4
1264*4882a593Smuzhiyun /** mode: stop find */
1265*4882a593Smuzhiyun #define WIFI_DIRECT_MODE_STOP_FIND 5
1266*4882a593Smuzhiyun #endif
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun /** Type definition of mlan_ds_bss for MLAN_IOCTL_BSS */
1269*4882a593Smuzhiyun typedef struct _mlan_ds_bss {
1270*4882a593Smuzhiyun 	/** Sub-command */
1271*4882a593Smuzhiyun 	t_u32 sub_command;
1272*4882a593Smuzhiyun 	/** BSS parameter */
1273*4882a593Smuzhiyun 	union {
1274*4882a593Smuzhiyun 		/** SSID-BSSID for MLAN_OID_BSS_START */
1275*4882a593Smuzhiyun 		mlan_ssid_bssid ssid_bssid;
1276*4882a593Smuzhiyun 		/** BSSID for MLAN_OID_BSS_STOP */
1277*4882a593Smuzhiyun 		mlan_802_11_mac_addr bssid;
1278*4882a593Smuzhiyun 		/** BSS mode for MLAN_OID_BSS_MODE */
1279*4882a593Smuzhiyun 		t_u32 bss_mode;
1280*4882a593Smuzhiyun 		/** BSS channel/frequency for MLAN_OID_BSS_CHANNEL */
1281*4882a593Smuzhiyun 		chan_freq bss_chan;
1282*4882a593Smuzhiyun 		/** BSS channel list for MLAN_OID_BSS_CHANNEL_LIST */
1283*4882a593Smuzhiyun 		mlan_chan_list chanlist;
1284*4882a593Smuzhiyun 		/** MAC address for MLAN_OID_BSS_MAC_ADDR */
1285*4882a593Smuzhiyun 		mlan_802_11_mac_addr mac_addr;
1286*4882a593Smuzhiyun 		/** Multicast list for MLAN_OID_BSS_MULTICAST_LIST */
1287*4882a593Smuzhiyun 		mlan_multicast_list multicast_list;
1288*4882a593Smuzhiyun 		/** Beacon interval for MLAN_OID_IBSS_BCN_INTERVAL */
1289*4882a593Smuzhiyun 		t_u32 bcn_interval;
1290*4882a593Smuzhiyun 		/** ATIM window for MLAN_OID_IBSS_ATIM_WINDOW */
1291*4882a593Smuzhiyun 		t_u32 atim_window;
1292*4882a593Smuzhiyun 		/** deauth param for MLAN_OID_BSS_STOP & MLAN_OID_UAP_DEAUTH_STA
1293*4882a593Smuzhiyun 		 */
1294*4882a593Smuzhiyun 		mlan_deauth_param deauth_param;
1295*4882a593Smuzhiyun #ifdef UAP_SUPPORT
1296*4882a593Smuzhiyun 		/** host based flag for MLAN_OID_BSS_START */
1297*4882a593Smuzhiyun 		t_u8 host_based;
1298*4882a593Smuzhiyun 		/** BSS param for AP mode for MLAN_OID_UAP_BSS_CONFIG */
1299*4882a593Smuzhiyun 		mlan_uap_bss_param bss_config;
1300*4882a593Smuzhiyun 		/** AP Wmm parameters for MLAN_OID_UAP_CFG_WMM_PARAM */
1301*4882a593Smuzhiyun 		wmm_parameter_t ap_wmm_para;
1302*4882a593Smuzhiyun 		/** ap scan channels for MLAN_OID_UAP_SCAN_CHANNELS*/
1303*4882a593Smuzhiyun 		mlan_uap_scan_channels ap_scan_channels;
1304*4882a593Smuzhiyun 		/** channel switch for MLAN_OID_UAP_CHAN_SWITCH */
1305*4882a593Smuzhiyun 		mlan_action_chan_switch chanswitch;
1306*4882a593Smuzhiyun 		/** ap channel for MLAN_OID_UAP_CHANNEL*/
1307*4882a593Smuzhiyun 		chan_band_info ap_channel;
1308*4882a593Smuzhiyun 		/** ap operation control for MLAN_OID_UAP_OPER_CTRL*/
1309*4882a593Smuzhiyun 		mlan_uap_oper_ctrl ap_oper_ctrl;
1310*4882a593Smuzhiyun 		/** AP acs scan 	    MLAN_OID_UAP_ACS_SCAN */
1311*4882a593Smuzhiyun 		mlan_uap_acs_scan ap_acs_scan;
1312*4882a593Smuzhiyun #endif
1313*4882a593Smuzhiyun #if defined(STA_SUPPORT) && defined(UAP_SUPPORT)
1314*4882a593Smuzhiyun 		/** BSS role for MLAN_OID_BSS_ROLE */
1315*4882a593Smuzhiyun 		t_u8 bss_role;
1316*4882a593Smuzhiyun #endif
1317*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
1318*4882a593Smuzhiyun 		/** wifi direct mode for MLAN_OID_WIFI_DIRECT_MODE */
1319*4882a593Smuzhiyun 		t_u16 wfd_mode;
1320*4882a593Smuzhiyun #endif
1321*4882a593Smuzhiyun #ifdef STA_SUPPORT
1322*4882a593Smuzhiyun 		/** Listen interval for MLAN_OID_BSS_LISTEN_INTERVAL */
1323*4882a593Smuzhiyun 		t_u16 listen_interval;
1324*4882a593Smuzhiyun 		/** STA channel info for MLAN_OID_BSS_CHAN_INFO */
1325*4882a593Smuzhiyun 		chan_band_info sta_channel;
1326*4882a593Smuzhiyun #endif
1327*4882a593Smuzhiyun #ifdef UAP_SUPPORT
1328*4882a593Smuzhiyun 		/** STA info for MLAN_OID_UAP_ADD_STATION */
1329*4882a593Smuzhiyun 		mlan_ds_sta_info sta_info;
1330*4882a593Smuzhiyun #endif
1331*4882a593Smuzhiyun 	} param;
1332*4882a593Smuzhiyun } mlan_ds_bss, *pmlan_ds_bss;
1333*4882a593Smuzhiyun 
1334*4882a593Smuzhiyun /* OTP Region info */
1335*4882a593Smuzhiyun typedef MLAN_PACK_START struct _otp_region_info {
1336*4882a593Smuzhiyun 	t_u8 country_code[2];
1337*4882a593Smuzhiyun 	t_u8 region_code;
1338*4882a593Smuzhiyun 	t_u8 environment;
1339*4882a593Smuzhiyun 	t_u8 force_reg : 1;
1340*4882a593Smuzhiyun 	t_u8 reserved : 7;
1341*4882a593Smuzhiyun 	t_u8 dfs_region;
1342*4882a593Smuzhiyun } MLAN_PACK_END otp_region_info_t;
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun /** Type definition of mlan_ds_custom_reg_domain */
1345*4882a593Smuzhiyun typedef struct _mlan_ds_custom_reg_domain {
1346*4882a593Smuzhiyun 	otp_region_info_t region;
1347*4882a593Smuzhiyun 	/** num of 2g channels in custom_reg_domain */
1348*4882a593Smuzhiyun 	t_u8 num_bg_chan;
1349*4882a593Smuzhiyun 	/** num of 5g channels in custom_reg_domain */
1350*4882a593Smuzhiyun 	t_u8 num_a_chan;
1351*4882a593Smuzhiyun 	/** cfp table */
1352*4882a593Smuzhiyun 	chan_freq_power_t cfp_tbl[];
1353*4882a593Smuzhiyun } mlan_ds_custom_reg_domain;
1354*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1355*4882a593Smuzhiyun /** Radio Control Group */
1356*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1357*4882a593Smuzhiyun /** Enumeration for band */
1358*4882a593Smuzhiyun enum _mlan_band_def {
1359*4882a593Smuzhiyun 	BAND_B = 1,
1360*4882a593Smuzhiyun 	BAND_G = 2,
1361*4882a593Smuzhiyun 	BAND_A = 4,
1362*4882a593Smuzhiyun 	BAND_GN = 8,
1363*4882a593Smuzhiyun 	BAND_AN = 16,
1364*4882a593Smuzhiyun 	BAND_GAC = 32,
1365*4882a593Smuzhiyun 	BAND_AAC = 64,
1366*4882a593Smuzhiyun 	BAND_GAX = 256,
1367*4882a593Smuzhiyun 	BAND_AAX = 512,
1368*4882a593Smuzhiyun };
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun /** Channel bandwidth */
1371*4882a593Smuzhiyun #define CHANNEL_BW_20MHZ 0
1372*4882a593Smuzhiyun #define CHANNEL_BW_40MHZ_ABOVE 1
1373*4882a593Smuzhiyun #define CHANNEL_BW_40MHZ_BELOW 3
1374*4882a593Smuzhiyun /** secondary channel is 80Mhz bandwidth for 11ac */
1375*4882a593Smuzhiyun #define CHANNEL_BW_80MHZ 4
1376*4882a593Smuzhiyun #define CHANNEL_BW_160MHZ 5
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun /** RF antenna selection */
1379*4882a593Smuzhiyun #define RF_ANTENNA_MASK(n) ((1 << (n)) - 1)
1380*4882a593Smuzhiyun /** RF antenna auto select */
1381*4882a593Smuzhiyun #define RF_ANTENNA_AUTO 0xFFFF
1382*4882a593Smuzhiyun 
1383*4882a593Smuzhiyun /** Type definition of mlan_ds_band_cfg for MLAN_OID_BAND_CFG */
1384*4882a593Smuzhiyun typedef struct _mlan_ds_band_cfg {
1385*4882a593Smuzhiyun 	/** Infra band */
1386*4882a593Smuzhiyun 	t_u32 config_bands;
1387*4882a593Smuzhiyun 	/** Ad-hoc start band */
1388*4882a593Smuzhiyun 	t_u32 adhoc_start_band;
1389*4882a593Smuzhiyun 	/** Ad-hoc start channel */
1390*4882a593Smuzhiyun 	t_u32 adhoc_channel;
1391*4882a593Smuzhiyun 	/** fw supported band */
1392*4882a593Smuzhiyun 	t_u32 fw_bands;
1393*4882a593Smuzhiyun } mlan_ds_band_cfg;
1394*4882a593Smuzhiyun 
1395*4882a593Smuzhiyun /** Type definition of mlan_ds_ant_cfg for MLAN_OID_ANT_CFG */
1396*4882a593Smuzhiyun typedef struct _mlan_ds_ant_cfg {
1397*4882a593Smuzhiyun 	/** Tx antenna mode */
1398*4882a593Smuzhiyun 	t_u32 tx_antenna;
1399*4882a593Smuzhiyun 	/** Rx antenna mode */
1400*4882a593Smuzhiyun 	t_u32 rx_antenna;
1401*4882a593Smuzhiyun } mlan_ds_ant_cfg, *pmlan_ds_ant_cfg;
1402*4882a593Smuzhiyun /** Type definition of mlan_ds_mimo_switch for MLAN_OID_MIMO_SWITCH */
1403*4882a593Smuzhiyun typedef struct _mlan_ds_mimo_switch {
1404*4882a593Smuzhiyun 	/** Tx antenna mode */
1405*4882a593Smuzhiyun 	t_u8 txpath_antmode;
1406*4882a593Smuzhiyun 	/** Rx antenna mode */
1407*4882a593Smuzhiyun 	t_u8 rxpath_antmode;
1408*4882a593Smuzhiyun } mlan_ds_mimo_switch, *pmlan_ds_mimo_switch;
1409*4882a593Smuzhiyun /** Type definition of mlan_ds_ant_cfg_1x1 for MLAN_OID_ANT_CFG */
1410*4882a593Smuzhiyun typedef struct _mlan_ds_ant_cfg_1x1 {
1411*4882a593Smuzhiyun 	/** Antenna mode */
1412*4882a593Smuzhiyun 	t_u32 antenna;
1413*4882a593Smuzhiyun 	/** Evaluate time */
1414*4882a593Smuzhiyun 	t_u16 evaluate_time;
1415*4882a593Smuzhiyun 	/** Current antenna */
1416*4882a593Smuzhiyun 	t_u16 current_antenna;
1417*4882a593Smuzhiyun } mlan_ds_ant_cfg_1x1, *pmlan_ds_ant_cfg_1x1;
1418*4882a593Smuzhiyun 
1419*4882a593Smuzhiyun /** Type definition of mlan_ds_remain_chan for MLAN_OID_REMAIN_CHAN_CFG */
1420*4882a593Smuzhiyun typedef struct _mlan_ds_remain_chan {
1421*4882a593Smuzhiyun 	/** remove flag */
1422*4882a593Smuzhiyun 	t_u16 remove;
1423*4882a593Smuzhiyun 	/** status */
1424*4882a593Smuzhiyun 	t_u8 status;
1425*4882a593Smuzhiyun 	/** Band cfg */
1426*4882a593Smuzhiyun 	Band_Config_t bandcfg;
1427*4882a593Smuzhiyun 	/** channel */
1428*4882a593Smuzhiyun 	t_u8 channel;
1429*4882a593Smuzhiyun 	/** remain time: Unit ms*/
1430*4882a593Smuzhiyun 	t_u32 remain_period;
1431*4882a593Smuzhiyun } mlan_ds_remain_chan, *pmlan_ds_remain_chan;
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun /** Type definition of mlan_ds_radio_cfg for MLAN_IOCTL_RADIO_CFG */
1434*4882a593Smuzhiyun typedef struct _mlan_ds_radio_cfg {
1435*4882a593Smuzhiyun 	/** Sub-command */
1436*4882a593Smuzhiyun 	t_u32 sub_command;
1437*4882a593Smuzhiyun 	/** Radio control parameter */
1438*4882a593Smuzhiyun 	union {
1439*4882a593Smuzhiyun 		/** Radio on/off for MLAN_OID_RADIO_CTRL */
1440*4882a593Smuzhiyun 		t_u32 radio_on_off;
1441*4882a593Smuzhiyun 		/** Band info for MLAN_OID_BAND_CFG */
1442*4882a593Smuzhiyun 		mlan_ds_band_cfg band_cfg;
1443*4882a593Smuzhiyun 		/** Antenna info for MLAN_OID_ANT_CFG */
1444*4882a593Smuzhiyun 		mlan_ds_ant_cfg ant_cfg;
1445*4882a593Smuzhiyun 		/** Antenna mode for MLAN_OID_MIMO_SWITCH */
1446*4882a593Smuzhiyun 		mlan_ds_mimo_switch mimo_switch_cfg;
1447*4882a593Smuzhiyun 		/** Antenna info for MLAN_OID_ANT_CFG */
1448*4882a593Smuzhiyun 		mlan_ds_ant_cfg_1x1 ant_cfg_1x1;
1449*4882a593Smuzhiyun 		/** remain on channel for MLAN_OID_REMAIN_CHAN_CFG */
1450*4882a593Smuzhiyun 		mlan_ds_remain_chan remain_chan;
1451*4882a593Smuzhiyun 	} param;
1452*4882a593Smuzhiyun } mlan_ds_radio_cfg, *pmlan_ds_radio_cfg;
1453*4882a593Smuzhiyun 
1454*4882a593Smuzhiyun enum COALESCE_OPERATION {
1455*4882a593Smuzhiyun 	RECV_FILTER_MATCH_TYPE_EQ = 0x80,
1456*4882a593Smuzhiyun 	RECV_FILTER_MATCH_TYPE_NE,
1457*4882a593Smuzhiyun };
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun enum COALESCE_PACKET_TYPE {
1460*4882a593Smuzhiyun 	PACKET_TYPE_UNICAST = 1,
1461*4882a593Smuzhiyun 	PACKET_TYPE_MULTICAST = 2,
1462*4882a593Smuzhiyun 	PACKET_TYPE_BROADCAST = 3
1463*4882a593Smuzhiyun };
1464*4882a593Smuzhiyun 
1465*4882a593Smuzhiyun #define COALESCE_MAX_RULES 8
1466*4882a593Smuzhiyun #define COALESCE_MAX_BYTESEQ 4 /* non-adjustable */
1467*4882a593Smuzhiyun #define COALESCE_MAX_FILTERS 4
1468*4882a593Smuzhiyun #define MAX_COALESCING_DELAY 100 /* in msecs */
1469*4882a593Smuzhiyun #define MAX_PATTERN_LEN 20
1470*4882a593Smuzhiyun #define MAX_OFFSET_LEN 100
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun struct filt_field_param {
1473*4882a593Smuzhiyun 	t_u8 operation;
1474*4882a593Smuzhiyun 	t_u8 operand_len;
1475*4882a593Smuzhiyun 	t_u16 offset;
1476*4882a593Smuzhiyun 	t_u8 operand_byte_stream[COALESCE_MAX_BYTESEQ];
1477*4882a593Smuzhiyun };
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun struct coalesce_rule {
1480*4882a593Smuzhiyun 	t_u16 max_coalescing_delay;
1481*4882a593Smuzhiyun 	t_u8 num_of_fields;
1482*4882a593Smuzhiyun 	t_u8 pkt_type;
1483*4882a593Smuzhiyun 	struct filt_field_param params[COALESCE_MAX_FILTERS];
1484*4882a593Smuzhiyun };
1485*4882a593Smuzhiyun 
1486*4882a593Smuzhiyun typedef struct _mlan_ds_coalesce_cfg {
1487*4882a593Smuzhiyun 	t_u16 num_of_rules;
1488*4882a593Smuzhiyun 	struct coalesce_rule rule[COALESCE_MAX_RULES];
1489*4882a593Smuzhiyun } mlan_ds_coalesce_cfg;
1490*4882a593Smuzhiyun 
1491*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1492*4882a593Smuzhiyun /** SNMP MIB Group */
1493*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1494*4882a593Smuzhiyun /** Type definition of mlan_ds_snmp_mib for MLAN_IOCTL_SNMP_MIB */
1495*4882a593Smuzhiyun typedef struct _mlan_ds_snmp_mib {
1496*4882a593Smuzhiyun 	/** Sub-command */
1497*4882a593Smuzhiyun 	t_u32 sub_command;
1498*4882a593Smuzhiyun 	/** SNMP MIB parameter */
1499*4882a593Smuzhiyun 	union {
1500*4882a593Smuzhiyun 		/** RTS threshold for MLAN_OID_SNMP_MIB_RTS_THRESHOLD */
1501*4882a593Smuzhiyun 		t_u32 rts_threshold;
1502*4882a593Smuzhiyun 		/** Fragment threshold for MLAN_OID_SNMP_MIB_FRAG_THRESHOLD */
1503*4882a593Smuzhiyun 		t_u32 frag_threshold;
1504*4882a593Smuzhiyun 		/** Retry count for MLAN_OID_SNMP_MIB_RETRY_COUNT */
1505*4882a593Smuzhiyun 		t_u32 retry_count;
1506*4882a593Smuzhiyun 		/** OID value for MLAN_OID_SNMP_MIB_DOT11D/H */
1507*4882a593Smuzhiyun 		t_u32 oid_value;
1508*4882a593Smuzhiyun 		/** DTIM period for MLAN_OID_SNMP_MIB_DTIM_PERIOD */
1509*4882a593Smuzhiyun 		t_u32 dtim_period;
1510*4882a593Smuzhiyun 		/** Singal_ext Enable for MLAN_OID_SNMP_MIB_SIGNALEXT_ENABLE */
1511*4882a593Smuzhiyun 		t_u8 signalext_enable;
1512*4882a593Smuzhiyun 		/** Control deauth when uap switch channel */
1513*4882a593Smuzhiyun 		t_u8 deauthctrl;
1514*4882a593Smuzhiyun 		t_u8 chan_track;
1515*4882a593Smuzhiyun 	} param;
1516*4882a593Smuzhiyun } mlan_ds_snmp_mib, *pmlan_ds_snmp_mib;
1517*4882a593Smuzhiyun 
1518*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1519*4882a593Smuzhiyun /** Status Information Group */
1520*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
1521*4882a593Smuzhiyun /** Enumeration for ad-hoc status */
1522*4882a593Smuzhiyun enum _mlan_adhoc_status {
1523*4882a593Smuzhiyun 	ADHOC_IDLE,
1524*4882a593Smuzhiyun 	ADHOC_STARTED,
1525*4882a593Smuzhiyun 	ADHOC_JOINED,
1526*4882a593Smuzhiyun 	ADHOC_COALESCED,
1527*4882a593Smuzhiyun 	ADHOC_STARTING
1528*4882a593Smuzhiyun };
1529*4882a593Smuzhiyun 
1530*4882a593Smuzhiyun typedef struct _mlan_ds_get_stats_org {
1531*4882a593Smuzhiyun 	/** Statistics counter */
1532*4882a593Smuzhiyun 	/** Multicast transmitted frame count */
1533*4882a593Smuzhiyun 	t_u32 mcast_tx_frame;
1534*4882a593Smuzhiyun 	/** Failure count */
1535*4882a593Smuzhiyun 	t_u32 failed;
1536*4882a593Smuzhiyun 	/** Retry count */
1537*4882a593Smuzhiyun 	t_u32 retry;
1538*4882a593Smuzhiyun 	/** Multi entry count */
1539*4882a593Smuzhiyun 	t_u32 multi_retry;
1540*4882a593Smuzhiyun 	/** Duplicate frame count */
1541*4882a593Smuzhiyun 	t_u32 frame_dup;
1542*4882a593Smuzhiyun 	/** RTS success count */
1543*4882a593Smuzhiyun 	t_u32 rts_success;
1544*4882a593Smuzhiyun 	/** RTS failure count */
1545*4882a593Smuzhiyun 	t_u32 rts_failure;
1546*4882a593Smuzhiyun 	/** Ack failure count */
1547*4882a593Smuzhiyun 	t_u32 ack_failure;
1548*4882a593Smuzhiyun 	/** Rx fragmentation count */
1549*4882a593Smuzhiyun 	t_u32 rx_frag;
1550*4882a593Smuzhiyun 	/** Multicast Tx frame count */
1551*4882a593Smuzhiyun 	t_u32 mcast_rx_frame;
1552*4882a593Smuzhiyun 	/** FCS error count */
1553*4882a593Smuzhiyun 	t_u32 fcs_error;
1554*4882a593Smuzhiyun 	/** Tx frame count */
1555*4882a593Smuzhiyun 	t_u32 tx_frame;
1556*4882a593Smuzhiyun 	/** WEP ICV error count */
1557*4882a593Smuzhiyun 	t_u32 wep_icv_error[4];
1558*4882a593Smuzhiyun 	/** beacon recv count */
1559*4882a593Smuzhiyun 	t_u32 bcn_rcv_cnt;
1560*4882a593Smuzhiyun 	/** beacon miss count */
1561*4882a593Smuzhiyun 	t_u32 bcn_miss_cnt;
1562*4882a593Smuzhiyun 	/** received amsdu count*/
1563*4882a593Smuzhiyun 	t_u32 amsdu_rx_cnt;
1564*4882a593Smuzhiyun 	/** received msdu count in amsdu*/
1565*4882a593Smuzhiyun 	t_u32 msdu_in_rx_amsdu_cnt;
1566*4882a593Smuzhiyun 	/** tx amsdu count*/
1567*4882a593Smuzhiyun 	t_u32 amsdu_tx_cnt;
1568*4882a593Smuzhiyun 	/** tx msdu count in amsdu*/
1569*4882a593Smuzhiyun 	t_u32 msdu_in_tx_amsdu_cnt;
1570*4882a593Smuzhiyun } mlan_ds_get_stats_org;
1571*4882a593Smuzhiyun 
1572*4882a593Smuzhiyun /** Type definition of mlan_ds_get_stats for MLAN_OID_GET_STATS */
1573*4882a593Smuzhiyun typedef struct _mlan_ds_get_stats {
1574*4882a593Smuzhiyun 	/** Statistics counter */
1575*4882a593Smuzhiyun 	/** Multicast transmitted frame count */
1576*4882a593Smuzhiyun 	t_u32 mcast_tx_frame;
1577*4882a593Smuzhiyun 	/** Failure count */
1578*4882a593Smuzhiyun 	t_u32 failed;
1579*4882a593Smuzhiyun 	/** Retry count */
1580*4882a593Smuzhiyun 	t_u32 retry;
1581*4882a593Smuzhiyun 	/** Multi entry count */
1582*4882a593Smuzhiyun 	t_u32 multi_retry;
1583*4882a593Smuzhiyun 	/** Duplicate frame count */
1584*4882a593Smuzhiyun 	t_u32 frame_dup;
1585*4882a593Smuzhiyun 	/** RTS success count */
1586*4882a593Smuzhiyun 	t_u32 rts_success;
1587*4882a593Smuzhiyun 	/** RTS failure count */
1588*4882a593Smuzhiyun 	t_u32 rts_failure;
1589*4882a593Smuzhiyun 	/** Ack failure count */
1590*4882a593Smuzhiyun 	t_u32 ack_failure;
1591*4882a593Smuzhiyun 	/** Rx fragmentation count */
1592*4882a593Smuzhiyun 	t_u32 rx_frag;
1593*4882a593Smuzhiyun 	/** Multicast Tx frame count */
1594*4882a593Smuzhiyun 	t_u32 mcast_rx_frame;
1595*4882a593Smuzhiyun 	/** FCS error count */
1596*4882a593Smuzhiyun 	t_u32 fcs_error;
1597*4882a593Smuzhiyun 	/** Tx frame count */
1598*4882a593Smuzhiyun 	t_u32 tx_frame;
1599*4882a593Smuzhiyun 	/** WEP ICV error count */
1600*4882a593Smuzhiyun 	t_u32 wep_icv_error[4];
1601*4882a593Smuzhiyun 	/** beacon recv count */
1602*4882a593Smuzhiyun 	t_u32 bcn_rcv_cnt;
1603*4882a593Smuzhiyun 	/** beacon miss count */
1604*4882a593Smuzhiyun 	t_u32 bcn_miss_cnt;
1605*4882a593Smuzhiyun 	/** received amsdu count*/
1606*4882a593Smuzhiyun 	t_u32 amsdu_rx_cnt;
1607*4882a593Smuzhiyun 	/** received msdu count in amsdu*/
1608*4882a593Smuzhiyun 	t_u32 msdu_in_rx_amsdu_cnt;
1609*4882a593Smuzhiyun 	/** tx amsdu count*/
1610*4882a593Smuzhiyun 	t_u32 amsdu_tx_cnt;
1611*4882a593Smuzhiyun 	/** tx msdu count in amsdu*/
1612*4882a593Smuzhiyun 	t_u32 msdu_in_tx_amsdu_cnt;
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun 	/** Tx frag count */
1615*4882a593Smuzhiyun 	t_u32 tx_frag_cnt;
1616*4882a593Smuzhiyun 	/** Qos Tx frag count */
1617*4882a593Smuzhiyun 	t_u32 qos_tx_frag_cnt[8];
1618*4882a593Smuzhiyun 	/** Qos failed count */
1619*4882a593Smuzhiyun 	t_u32 qos_failed_cnt[8];
1620*4882a593Smuzhiyun 	/** Qos retry count */
1621*4882a593Smuzhiyun 	t_u32 qos_retry_cnt[8];
1622*4882a593Smuzhiyun 	/** Qos multi retry count */
1623*4882a593Smuzhiyun 	t_u32 qos_multi_retry_cnt[8];
1624*4882a593Smuzhiyun 	/** Qos frame dup count */
1625*4882a593Smuzhiyun 	t_u32 qos_frm_dup_cnt[8];
1626*4882a593Smuzhiyun 	/** Qos rts success count */
1627*4882a593Smuzhiyun 	t_u32 qos_rts_suc_cnt[8];
1628*4882a593Smuzhiyun 	/** Qos rts failure count */
1629*4882a593Smuzhiyun 	t_u32 qos_rts_failure_cnt[8];
1630*4882a593Smuzhiyun 	/** Qos ack failure count */
1631*4882a593Smuzhiyun 	t_u32 qos_ack_failure_cnt[8];
1632*4882a593Smuzhiyun 	/** Qos Rx frag count */
1633*4882a593Smuzhiyun 	t_u32 qos_rx_frag_cnt[8];
1634*4882a593Smuzhiyun 	/** Qos Tx frame count */
1635*4882a593Smuzhiyun 	t_u32 qos_tx_frm_cnt[8];
1636*4882a593Smuzhiyun 	/** Qos discarded frame count */
1637*4882a593Smuzhiyun 	t_u32 qos_discarded_frm_cnt[8];
1638*4882a593Smuzhiyun 	/** Qos mpdus Rx count */
1639*4882a593Smuzhiyun 	t_u32 qos_mpdus_rx_cnt[8];
1640*4882a593Smuzhiyun 	/** Qos retry rx count */
1641*4882a593Smuzhiyun 	t_u32 qos_retries_rx_cnt[8];
1642*4882a593Smuzhiyun 	/** CMAC ICV errors count */
1643*4882a593Smuzhiyun 	t_u32 cmacicv_errors;
1644*4882a593Smuzhiyun 	/** CMAC replays count */
1645*4882a593Smuzhiyun 	t_u32 cmac_replays;
1646*4882a593Smuzhiyun 	/** mgmt CCMP replays count */
1647*4882a593Smuzhiyun 	t_u32 mgmt_ccmp_replays;
1648*4882a593Smuzhiyun 	/** TKIP ICV errors count */
1649*4882a593Smuzhiyun 	t_u32 tkipicv_errors;
1650*4882a593Smuzhiyun 	/** TKIP replays count */
1651*4882a593Smuzhiyun 	t_u32 tkip_replays;
1652*4882a593Smuzhiyun 	/** CCMP decrypt errors count */
1653*4882a593Smuzhiyun 	t_u32 ccmp_decrypt_errors;
1654*4882a593Smuzhiyun 	/** CCMP replays count */
1655*4882a593Smuzhiyun 	t_u32 ccmp_replays;
1656*4882a593Smuzhiyun 	/** Tx amsdu count */
1657*4882a593Smuzhiyun 	t_u32 tx_amsdu_cnt;
1658*4882a593Smuzhiyun 	/** failed amsdu count */
1659*4882a593Smuzhiyun 	t_u32 failed_amsdu_cnt;
1660*4882a593Smuzhiyun 	/** retry amsdu count */
1661*4882a593Smuzhiyun 	t_u32 retry_amsdu_cnt;
1662*4882a593Smuzhiyun 	/** multi-retry amsdu count */
1663*4882a593Smuzhiyun 	t_u32 multi_retry_amsdu_cnt;
1664*4882a593Smuzhiyun 	/** Tx octets in amsdu count */
1665*4882a593Smuzhiyun 	t_u64 tx_octets_in_amsdu_cnt;
1666*4882a593Smuzhiyun 	/** amsdu ack failure count */
1667*4882a593Smuzhiyun 	t_u32 amsdu_ack_failure_cnt;
1668*4882a593Smuzhiyun 	/** Rx amsdu count */
1669*4882a593Smuzhiyun 	t_u32 rx_amsdu_cnt;
1670*4882a593Smuzhiyun 	/** Rx octets in amsdu count */
1671*4882a593Smuzhiyun 	t_u64 rx_octets_in_amsdu_cnt;
1672*4882a593Smuzhiyun 	/** Tx ampdu count */
1673*4882a593Smuzhiyun 	t_u32 tx_ampdu_cnt;
1674*4882a593Smuzhiyun 	/** tx mpdus in ampdu count */
1675*4882a593Smuzhiyun 	t_u32 tx_mpdus_in_ampdu_cnt;
1676*4882a593Smuzhiyun 	/** tx octets in ampdu count */
1677*4882a593Smuzhiyun 	t_u64 tx_octets_in_ampdu_cnt;
1678*4882a593Smuzhiyun 	/** ampdu Rx count */
1679*4882a593Smuzhiyun 	t_u32 ampdu_rx_cnt;
1680*4882a593Smuzhiyun 	/** mpdu in Rx ampdu count */
1681*4882a593Smuzhiyun 	t_u32 mpdu_in_rx_ampdu_cnt;
1682*4882a593Smuzhiyun 	/** Rx octets ampdu count */
1683*4882a593Smuzhiyun 	t_u64 rx_octets_in_ampdu_cnt;
1684*4882a593Smuzhiyun 	/** ampdu delimiter CRC error count */
1685*4882a593Smuzhiyun 	t_u32 ampdu_delimiter_crc_error_cnt;
1686*4882a593Smuzhiyun 	/** Rx Stuck Related Info*/
1687*4882a593Smuzhiyun 	/** Rx Stuck Issue count */
1688*4882a593Smuzhiyun 	t_u32 rx_stuck_issue_cnt[2];
1689*4882a593Smuzhiyun 	/** Rx Stuck Recovery count */
1690*4882a593Smuzhiyun 	t_u32 rx_stuck_recovery_cnt;
1691*4882a593Smuzhiyun 	/** Rx Stuck TSF */
1692*4882a593Smuzhiyun 	t_u64 rx_stuck_tsf[2];
1693*4882a593Smuzhiyun 	/** Tx Watchdog Recovery Related Info */
1694*4882a593Smuzhiyun 	/** Tx Watchdog Recovery count */
1695*4882a593Smuzhiyun 	t_u32 tx_watchdog_recovery_cnt;
1696*4882a593Smuzhiyun 	/** Tx Watchdog TSF */
1697*4882a593Smuzhiyun 	t_u64 tx_watchdog_tsf[2];
1698*4882a593Smuzhiyun 	/** Channel Switch Related Info */
1699*4882a593Smuzhiyun 	/** Channel Switch Announcement Sent */
1700*4882a593Smuzhiyun 	t_u32 channel_switch_ann_sent;
1701*4882a593Smuzhiyun 	/** Channel Switch State */
1702*4882a593Smuzhiyun 	t_u32 channel_switch_state;
1703*4882a593Smuzhiyun 	/** Register Class */
1704*4882a593Smuzhiyun 	t_u32 reg_class;
1705*4882a593Smuzhiyun 	/** Channel Number */
1706*4882a593Smuzhiyun 	t_u32 channel_number;
1707*4882a593Smuzhiyun 	/** Channel Switch Mode */
1708*4882a593Smuzhiyun 	t_u32 channel_switch_mode;
1709*4882a593Smuzhiyun 	/** Reset Rx Mac Count */
1710*4882a593Smuzhiyun 	t_u32 rx_reset_mac_recovery_cnt;
1711*4882a593Smuzhiyun 	/** ISR2 Not Done Count*/
1712*4882a593Smuzhiyun 	t_u32 rx_Isr2_NotDone_Cnt;
1713*4882a593Smuzhiyun 	/** GDMA Abort Count */
1714*4882a593Smuzhiyun 	t_u32 gdma_abort_cnt;
1715*4882a593Smuzhiyun 	/** Rx Reset MAC Count */
1716*4882a593Smuzhiyun 	t_u32 g_reset_rx_mac_cnt;
1717*4882a593Smuzhiyun 	// Ownership error counters
1718*4882a593Smuzhiyun 	/*Error Ownership error count*/
1719*4882a593Smuzhiyun 	t_u32 dwCtlErrCnt;
1720*4882a593Smuzhiyun 	/*Control Ownership error count*/
1721*4882a593Smuzhiyun 	t_u32 dwBcnErrCnt;
1722*4882a593Smuzhiyun 	/*Control Ownership error count*/
1723*4882a593Smuzhiyun 	t_u32 dwMgtErrCnt;
1724*4882a593Smuzhiyun 	/*Control Ownership error count*/
1725*4882a593Smuzhiyun 	t_u32 dwDatErrCnt;
1726*4882a593Smuzhiyun 	/*BIGTK MME good count*/
1727*4882a593Smuzhiyun 	t_u32 bigtk_mmeGoodCnt;
1728*4882a593Smuzhiyun 	/*BIGTK Replay error count*/
1729*4882a593Smuzhiyun 	t_u32 bigtk_replayErrCnt;
1730*4882a593Smuzhiyun 	/*BIGTK MIC error count*/
1731*4882a593Smuzhiyun 	t_u32 bigtk_micErrCnt;
1732*4882a593Smuzhiyun 	/*BIGTK MME not included count*/
1733*4882a593Smuzhiyun 	t_u32 bigtk_mmeNotFoundCnt;
1734*4882a593Smuzhiyun } mlan_ds_get_stats, *pmlan_ds_get_stats;
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun /** Type definition of mlan_ds_uap_stats for MLAN_OID_GET_STATS */
1737*4882a593Smuzhiyun typedef struct _mlan_ds_uap_stats {
1738*4882a593Smuzhiyun 	/** tkip mic failures */
1739*4882a593Smuzhiyun 	t_u32 tkip_mic_failures;
1740*4882a593Smuzhiyun 	/** ccmp decrypt errors */
1741*4882a593Smuzhiyun 	t_u32 ccmp_decrypt_errors;
1742*4882a593Smuzhiyun 	/** wep undecryptable count */
1743*4882a593Smuzhiyun 	t_u32 wep_undecryptable_count;
1744*4882a593Smuzhiyun 	/** wep icv error count */
1745*4882a593Smuzhiyun 	t_u32 wep_icv_error_count;
1746*4882a593Smuzhiyun 	/** decrypt failure count */
1747*4882a593Smuzhiyun 	t_u32 decrypt_failure_count;
1748*4882a593Smuzhiyun 	/** dot11 multicast tx count */
1749*4882a593Smuzhiyun 	t_u32 mcast_tx_count;
1750*4882a593Smuzhiyun 	/** dot11 failed count */
1751*4882a593Smuzhiyun 	t_u32 failed_count;
1752*4882a593Smuzhiyun 	/** dot11 retry count */
1753*4882a593Smuzhiyun 	t_u32 retry_count;
1754*4882a593Smuzhiyun 	/** dot11 multi retry count */
1755*4882a593Smuzhiyun 	t_u32 multi_retry_count;
1756*4882a593Smuzhiyun 	/** dot11 frame duplicate count */
1757*4882a593Smuzhiyun 	t_u32 frame_dup_count;
1758*4882a593Smuzhiyun 	/** dot11 rts success count */
1759*4882a593Smuzhiyun 	t_u32 rts_success_count;
1760*4882a593Smuzhiyun 	/** dot11 rts failure count */
1761*4882a593Smuzhiyun 	t_u32 rts_failure_count;
1762*4882a593Smuzhiyun 	/** dot11 ack failure count */
1763*4882a593Smuzhiyun 	t_u32 ack_failure_count;
1764*4882a593Smuzhiyun 	/** dot11 rx ragment count */
1765*4882a593Smuzhiyun 	t_u32 rx_fragment_count;
1766*4882a593Smuzhiyun 	/** dot11 mcast rx frame count */
1767*4882a593Smuzhiyun 	t_u32 mcast_rx_frame_count;
1768*4882a593Smuzhiyun 	/** dot11 fcs error count */
1769*4882a593Smuzhiyun 	t_u32 fcs_error_count;
1770*4882a593Smuzhiyun 	/** dot11 tx frame count */
1771*4882a593Smuzhiyun 	t_u32 tx_frame_count;
1772*4882a593Smuzhiyun 	/** dot11 rsna tkip cm invoked */
1773*4882a593Smuzhiyun 	t_u32 rsna_tkip_cm_invoked;
1774*4882a593Smuzhiyun 	/** dot11 rsna 4way handshake failures */
1775*4882a593Smuzhiyun 	t_u32 rsna_4way_hshk_failures;
1776*4882a593Smuzhiyun } mlan_ds_uap_stats, *pmlan_ds_uap_stats;
1777*4882a593Smuzhiyun 
1778*4882a593Smuzhiyun /** Mask of last beacon RSSI */
1779*4882a593Smuzhiyun #define BCN_RSSI_LAST_MASK 0x00000001
1780*4882a593Smuzhiyun /** Mask of average beacon RSSI */
1781*4882a593Smuzhiyun #define BCN_RSSI_AVG_MASK 0x00000002
1782*4882a593Smuzhiyun /** Mask of last data RSSI */
1783*4882a593Smuzhiyun #define DATA_RSSI_LAST_MASK 0x00000004
1784*4882a593Smuzhiyun /** Mask of average data RSSI */
1785*4882a593Smuzhiyun #define DATA_RSSI_AVG_MASK 0x00000008
1786*4882a593Smuzhiyun /** Mask of last beacon SNR */
1787*4882a593Smuzhiyun #define BCN_SNR_LAST_MASK 0x00000010
1788*4882a593Smuzhiyun /** Mask of average beacon SNR */
1789*4882a593Smuzhiyun #define BCN_SNR_AVG_MASK 0x00000020
1790*4882a593Smuzhiyun /** Mask of last data SNR */
1791*4882a593Smuzhiyun #define DATA_SNR_LAST_MASK 0x00000040
1792*4882a593Smuzhiyun /** Mask of average data SNR */
1793*4882a593Smuzhiyun #define DATA_SNR_AVG_MASK 0x00000080
1794*4882a593Smuzhiyun /** Mask of last beacon NF */
1795*4882a593Smuzhiyun #define BCN_NF_LAST_MASK 0x00000100
1796*4882a593Smuzhiyun /** Mask of average beacon NF */
1797*4882a593Smuzhiyun #define BCN_NF_AVG_MASK 0x00000200
1798*4882a593Smuzhiyun /** Mask of last data NF */
1799*4882a593Smuzhiyun #define DATA_NF_LAST_MASK 0x00000400
1800*4882a593Smuzhiyun /** Mask of average data NF */
1801*4882a593Smuzhiyun #define DATA_NF_AVG_MASK 0x00000800
1802*4882a593Smuzhiyun /** Mask of all RSSI_INFO */
1803*4882a593Smuzhiyun #define ALL_RSSI_INFO_MASK 0x00000fff
1804*4882a593Smuzhiyun #define MAX_PATH_NUM 3
1805*4882a593Smuzhiyun /** path A */
1806*4882a593Smuzhiyun #define PATH_A 0x01
1807*4882a593Smuzhiyun /** path B */
1808*4882a593Smuzhiyun #define PATH_B 0x02
1809*4882a593Smuzhiyun /** path AB */
1810*4882a593Smuzhiyun #define PATH_AB 0x03
1811*4882a593Smuzhiyun /** ALL the path */
1812*4882a593Smuzhiyun #define PATH_ALL 0
1813*4882a593Smuzhiyun /** Type definition of mlan_ds_get_signal for MLAN_OID_GET_SIGNAL */
1814*4882a593Smuzhiyun typedef struct _mlan_ds_get_signal {
1815*4882a593Smuzhiyun 	/** Selector of get operation */
1816*4882a593Smuzhiyun 	/*
1817*4882a593Smuzhiyun 	 * Bit0:  Last Beacon RSSI,  Bit1:  Average Beacon RSSI,
1818*4882a593Smuzhiyun 	 * Bit2:  Last Data RSSI,    Bit3:  Average Data RSSI,
1819*4882a593Smuzhiyun 	 * Bit4:  Last Beacon SNR,   Bit5:  Average Beacon SNR,
1820*4882a593Smuzhiyun 	 * Bit6:  Last Data SNR,     Bit7:  Average Data SNR,
1821*4882a593Smuzhiyun 	 * Bit8:  Last Beacon NF,    Bit9:  Average Beacon NF,
1822*4882a593Smuzhiyun 	 * Bit10: Last Data NF,      Bit11: Average Data NF
1823*4882a593Smuzhiyun 	 *
1824*4882a593Smuzhiyun 	 * Bit0: PATH A
1825*4882a593Smuzhiyun 	 * Bit1: PATH B
1826*4882a593Smuzhiyun 	 */
1827*4882a593Smuzhiyun 	t_u16 selector;
1828*4882a593Smuzhiyun 
1829*4882a593Smuzhiyun 	/** RSSI */
1830*4882a593Smuzhiyun 	/** RSSI of last beacon */
1831*4882a593Smuzhiyun 	t_s16 bcn_rssi_last;
1832*4882a593Smuzhiyun 	/** RSSI of beacon average */
1833*4882a593Smuzhiyun 	t_s16 bcn_rssi_avg;
1834*4882a593Smuzhiyun 	/** RSSI of last data packet */
1835*4882a593Smuzhiyun 	t_s16 data_rssi_last;
1836*4882a593Smuzhiyun 	/** RSSI of data packet average */
1837*4882a593Smuzhiyun 	t_s16 data_rssi_avg;
1838*4882a593Smuzhiyun 
1839*4882a593Smuzhiyun 	/** SNR */
1840*4882a593Smuzhiyun 	/** SNR of last beacon */
1841*4882a593Smuzhiyun 	t_s16 bcn_snr_last;
1842*4882a593Smuzhiyun 	/** SNR of beacon average */
1843*4882a593Smuzhiyun 	t_s16 bcn_snr_avg;
1844*4882a593Smuzhiyun 	/** SNR of last data packet */
1845*4882a593Smuzhiyun 	t_s16 data_snr_last;
1846*4882a593Smuzhiyun 	/** SNR of data packet average */
1847*4882a593Smuzhiyun 	t_s16 data_snr_avg;
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 	/** NF */
1850*4882a593Smuzhiyun 	/** NF of last beacon */
1851*4882a593Smuzhiyun 	t_s16 bcn_nf_last;
1852*4882a593Smuzhiyun 	/** NF of beacon average */
1853*4882a593Smuzhiyun 	t_s16 bcn_nf_avg;
1854*4882a593Smuzhiyun 	/** NF of last data packet */
1855*4882a593Smuzhiyun 	t_s16 data_nf_last;
1856*4882a593Smuzhiyun 	/** NF of data packet average */
1857*4882a593Smuzhiyun 	t_s16 data_nf_avg;
1858*4882a593Smuzhiyun } mlan_ds_get_signal, *pmlan_ds_get_signal;
1859*4882a593Smuzhiyun 
1860*4882a593Smuzhiyun /** bit for 2.4 G antenna diversity */
1861*4882a593Smuzhiyun #define ANT_DIVERSITY_2G MBIT(3)
1862*4882a593Smuzhiyun /** bit for 5 G antenna diversity */
1863*4882a593Smuzhiyun #define ANT_DIVERSITY_5G MBIT(7)
1864*4882a593Smuzhiyun 
1865*4882a593Smuzhiyun /** mlan_fw_info data structure for MLAN_OID_GET_FW_INFO */
1866*4882a593Smuzhiyun typedef struct _mlan_fw_info {
1867*4882a593Smuzhiyun 	/** Firmware version */
1868*4882a593Smuzhiyun 	t_u32 fw_ver;
1869*4882a593Smuzhiyun 	/** Firmware Hotfix version */
1870*4882a593Smuzhiyun 	t_u8 hotfix_version;
1871*4882a593Smuzhiyun 	/** tx buf size */
1872*4882a593Smuzhiyun 	t_u16 tx_buf_size;
1873*4882a593Smuzhiyun 	/** MAC address */
1874*4882a593Smuzhiyun 	mlan_802_11_mac_addr mac_addr;
1875*4882a593Smuzhiyun 	/** 802.11n device capabilities */
1876*4882a593Smuzhiyun 	t_u32 hw_dot_11n_dev_cap;
1877*4882a593Smuzhiyun 	/** Device support for MIMO abstraction of MCSs */
1878*4882a593Smuzhiyun 	t_u8 hw_dev_mcs_support;
1879*4882a593Smuzhiyun 	/** user's MCS setting */
1880*4882a593Smuzhiyun 	t_u8 usr_dev_mcs_support;
1881*4882a593Smuzhiyun 	/** 802.11ac device capabilities */
1882*4882a593Smuzhiyun 	t_u32 hw_dot_11ac_dev_cap;
1883*4882a593Smuzhiyun 	/** 802.11ac device Capabilities for 2.4GHz */
1884*4882a593Smuzhiyun 	t_u32 usr_dot_11ac_dev_cap_bg;
1885*4882a593Smuzhiyun 	/** 802.11ac device Capabilities for 5GHz */
1886*4882a593Smuzhiyun 	t_u32 usr_dot_11ac_dev_cap_a;
1887*4882a593Smuzhiyun 	/** length of hw he capability */
1888*4882a593Smuzhiyun 	t_u8 hw_hecap_len;
1889*4882a593Smuzhiyun 	/** 802.11ax HE capability */
1890*4882a593Smuzhiyun 	t_u8 hw_he_cap[54];
1891*4882a593Smuzhiyun 	/** length of hw 2.4G he capability */
1892*4882a593Smuzhiyun 	t_u8 hw_2g_hecap_len;
1893*4882a593Smuzhiyun 	/** 802.11ax 2.4G HE capability */
1894*4882a593Smuzhiyun 	t_u8 hw_2g_he_cap[54];
1895*4882a593Smuzhiyun 	/** 802.11ac device support for MIMO abstraction of MCSs */
1896*4882a593Smuzhiyun 	t_u32 hw_dot_11ac_mcs_support;
1897*4882a593Smuzhiyun 	/** User conf 802.11ac device support for MIMO abstraction of MCSs */
1898*4882a593Smuzhiyun 	t_u32 usr_dot_11ac_mcs_support;
1899*4882a593Smuzhiyun 	/** fw supported band */
1900*4882a593Smuzhiyun 	t_u16 fw_bands;
1901*4882a593Smuzhiyun 	/** region code */
1902*4882a593Smuzhiyun 	t_u16 region_code;
1903*4882a593Smuzhiyun 	/** force_reg */
1904*4882a593Smuzhiyun 	t_u8 force_reg;
1905*4882a593Smuzhiyun 	/** ECSA support */
1906*4882a593Smuzhiyun 	t_u8 ecsa_enable;
1907*4882a593Smuzhiyun 	/** Get log support */
1908*4882a593Smuzhiyun 	t_u8 getlog_enable;
1909*4882a593Smuzhiyun 	/** FW support for embedded supplicant */
1910*4882a593Smuzhiyun 	t_u8 fw_supplicant_support;
1911*4882a593Smuzhiyun 	/** ant info */
1912*4882a593Smuzhiyun 	t_u8 antinfo;
1913*4882a593Smuzhiyun 	/** max AP associated sta count supported by fw */
1914*4882a593Smuzhiyun 	t_u8 max_ap_assoc_sta;
1915*4882a593Smuzhiyun 	/** FW support roaming offload */
1916*4882a593Smuzhiyun 	t_u8 fw_roaming_support;
1917*4882a593Smuzhiyun 	/** Bandwidth not support 80Mhz */
1918*4882a593Smuzhiyun 	t_u8 prohibit_80mhz;
1919*4882a593Smuzhiyun 	/** FW support beacon protection */
1920*4882a593Smuzhiyun 	t_u8 fw_beacon_prot;
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 	/* lower 8 bytes of uuid */
1923*4882a593Smuzhiyun 	t_u64 uuid_lo;
1924*4882a593Smuzhiyun 
1925*4882a593Smuzhiyun 	/* higher 8 bytes of uuid */
1926*4882a593Smuzhiyun 	t_u64 uuid_hi;
1927*4882a593Smuzhiyun } mlan_fw_info, *pmlan_fw_info;
1928*4882a593Smuzhiyun 
1929*4882a593Smuzhiyun /** Version string buffer length */
1930*4882a593Smuzhiyun #define MLAN_MAX_VER_STR_LEN 128
1931*4882a593Smuzhiyun 
1932*4882a593Smuzhiyun /** Maximum length of secure boot uuid */
1933*4882a593Smuzhiyun #define MLAN_MAX_UUID_LEN 32
1934*4882a593Smuzhiyun 
1935*4882a593Smuzhiyun /** mlan_ver_ext data structure for MLAN_OID_GET_VER_EXT */
1936*4882a593Smuzhiyun typedef struct _mlan_ver_ext {
1937*4882a593Smuzhiyun 	/** Selected version string */
1938*4882a593Smuzhiyun 	t_u32 version_str_sel;
1939*4882a593Smuzhiyun 	/** Version string */
1940*4882a593Smuzhiyun 	char version_str[MLAN_MAX_VER_STR_LEN];
1941*4882a593Smuzhiyun } mlan_ver_ext, *pmlan_ver_ext;
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun #ifdef BIG_ENDIAN_SUPPORT
1944*4882a593Smuzhiyun /** Extended Capabilities Data */
1945*4882a593Smuzhiyun typedef struct MLAN_PACK_START _ExtCap_t {
1946*4882a593Smuzhiyun 	/** Extended Capabilities value */
1947*4882a593Smuzhiyun 	t_u8 rsvdBit87 : 1; /* bit 87 */
1948*4882a593Smuzhiyun 	t_u8 rsvdBit86 : 1; /* bit 86 */
1949*4882a593Smuzhiyun 	t_u8 rsvdBit85 : 1; /* bit 85 */
1950*4882a593Smuzhiyun 	t_u8 beacon_prot : 1; /* bit 84 */
1951*4882a593Smuzhiyun 	t_u8 rsvdBit83 : 1; /* bit 83 */
1952*4882a593Smuzhiyun 	t_u8 rsvdBit82 : 1; /* bit 82 */
1953*4882a593Smuzhiyun 	t_u8 rsvdBit81 : 1; /* bit 81 */
1954*4882a593Smuzhiyun 	t_u8 rsvdBit80 : 1; /* bit 80 */
1955*4882a593Smuzhiyun 	t_u8 rsvdBit79 : 1; /* bit 79 */
1956*4882a593Smuzhiyun 	t_u8 TWTResp : 1; /* bit 78 */
1957*4882a593Smuzhiyun 	t_u8 TWTReq : 1; /* bit 77 */
1958*4882a593Smuzhiyun 	t_u8 rsvdBit76 : 1; /* bit 76 */
1959*4882a593Smuzhiyun 	t_u8 rsvdBit75 : 1; /* bit 75 */
1960*4882a593Smuzhiyun 	t_u8 rsvdBit74 : 1; /* bit 74 */
1961*4882a593Smuzhiyun 	t_u8 rsvdBit73 : 1; /* bit 73 */
1962*4882a593Smuzhiyun 	t_u8 FILS : 1; /* bit 72 */
1963*4882a593Smuzhiyun 	t_u8 FTMI : 1; /* bit 71 */
1964*4882a593Smuzhiyun 	t_u8 FTMR : 1; /* bit 70 */
1965*4882a593Smuzhiyun 	t_u8 CAQ : 1; /* bit 69 */
1966*4882a593Smuzhiyun 	t_u8 rsvdBit68 : 1; /* bit 68 */
1967*4882a593Smuzhiyun 	t_u8 NCC : 1; /* bit 67 */
1968*4882a593Smuzhiyun 	t_u8 rsvdBit66 : 1; /* bit 66 */
1969*4882a593Smuzhiyun 	t_u8 chanSchedMgnt : 1; /* bit 65 */
1970*4882a593Smuzhiyun 	t_u8 MaxAMSDU1 : 1; /* bit 64 */
1971*4882a593Smuzhiyun 	t_u8 MaxAMSDU0 : 1; /* bit 63 */
1972*4882a593Smuzhiyun 	t_u8 OperModeNtf : 1; /* bit 62 */
1973*4882a593Smuzhiyun 	t_u8 TDLSWildBandwidth : 1; /* bit 61 */
1974*4882a593Smuzhiyun 	t_u8 rsvdBit60 : 1; /* bit 60 */
1975*4882a593Smuzhiyun 	t_u8 rsvdBit59 : 1; /* bit 59 */
1976*4882a593Smuzhiyun 	t_u8 rsvdBit58 : 1; /* bit 58 */
1977*4882a593Smuzhiyun 	t_u8 rsvdBit57 : 1; /* bit 57 */
1978*4882a593Smuzhiyun 	t_u8 rsvdBit56 : 1; /* bit 56 */
1979*4882a593Smuzhiyun 	t_u8 rsvdBit55 : 1; /* bit 55 */
1980*4882a593Smuzhiyun 	t_u8 rsvdBit54 : 1; /* bit 54 */
1981*4882a593Smuzhiyun 	t_u8 rsvdBit53 : 1; /* bit 53 */
1982*4882a593Smuzhiyun 	t_u8 rsvdBit52 : 1; /* bit 52 */
1983*4882a593Smuzhiyun 	t_u8 rsvdBit51 : 1; /* bit 51 */
1984*4882a593Smuzhiyun 	t_u8 rsvdBit50 : 1; /* bit 50 */
1985*4882a593Smuzhiyun 	t_u8 rsvdBit49 : 1; /* bit 49 */
1986*4882a593Smuzhiyun 	t_u8 rsvdBit48 : 1; /* bit 48 */
1987*4882a593Smuzhiyun 	t_u8 rsvdBit47 : 1; /* bit 47 */
1988*4882a593Smuzhiyun 	t_u8 rsvdBit46 : 1; /* bit 46 */
1989*4882a593Smuzhiyun 	t_u8 rsvdBit45 : 1; /* bit 45 */
1990*4882a593Smuzhiyun 	t_u8 rsvdBit44 : 1; /* bit 44 */
1991*4882a593Smuzhiyun 	t_u8 rsvdBit43 : 1; /* bit 43 */
1992*4882a593Smuzhiyun 	t_u8 rsvdBit42 : 1; /* bit 42 */
1993*4882a593Smuzhiyun 	t_u8 rsvdBit41 : 1; /* bit 41 */
1994*4882a593Smuzhiyun 	t_u8 rsvdBit40 : 1; /* bit 40 */
1995*4882a593Smuzhiyun 	t_u8 TDLSChlSwitchProhib : 1; /* bit 39 */
1996*4882a593Smuzhiyun 	t_u8 TDLSProhibited : 1; /* bit 38 */
1997*4882a593Smuzhiyun 	t_u8 TDLSSupport : 1; /* bit 37 */
1998*4882a593Smuzhiyun 	t_u8 MSGCF_Capa : 1; /* bit 36 */
1999*4882a593Smuzhiyun 	t_u8 Reserved35 : 1; /* bit 35 */
2000*4882a593Smuzhiyun 	t_u8 SSPN_Interface : 1; /* bit 34 */
2001*4882a593Smuzhiyun 	t_u8 EBR : 1; /* bit 33 */
2002*4882a593Smuzhiyun 	t_u8 Qos_Map : 1; /* bit 32 */
2003*4882a593Smuzhiyun 	t_u8 Interworking : 1; /* bit 31 */
2004*4882a593Smuzhiyun 	t_u8 TDLSChannelSwitching : 1; /* bit 30 */
2005*4882a593Smuzhiyun 	t_u8 TDLSPeerPSMSupport : 1; /* bit 29 */
2006*4882a593Smuzhiyun 	t_u8 TDLSPeerUAPSDSupport : 1; /* bit 28 */
2007*4882a593Smuzhiyun 	t_u8 UTC : 1; /* bit 27 */
2008*4882a593Smuzhiyun 	t_u8 DMS : 1; /* bit 26 */
2009*4882a593Smuzhiyun 	t_u8 SSID_List : 1; /* bit 25 */
2010*4882a593Smuzhiyun 	t_u8 ChannelUsage : 1; /* bit 24 */
2011*4882a593Smuzhiyun 	t_u8 TimingMeasurement : 1; /* bit 23 */
2012*4882a593Smuzhiyun 	t_u8 MultipleBSSID : 1; /* bit 22 */
2013*4882a593Smuzhiyun 	t_u8 AC_StationCount : 1; /* bit 21 */
2014*4882a593Smuzhiyun 	t_u8 QoSTrafficCap : 1; /* bit 20 */
2015*4882a593Smuzhiyun 	t_u8 BSS_Transition : 1; /* bit 19 */
2016*4882a593Smuzhiyun 	t_u8 TIM_Broadcast : 1; /* bit 18 */
2017*4882a593Smuzhiyun 	t_u8 WNM_Sleep : 1; /* bit 17 */
2018*4882a593Smuzhiyun 	t_u8 TFS : 1; /* bit 16 */
2019*4882a593Smuzhiyun 	t_u8 GeospatialLocation : 1; /* bit 15 */
2020*4882a593Smuzhiyun 	t_u8 CivicLocation : 1; /* bit 14 */
2021*4882a593Smuzhiyun 	t_u8 CollocatedIntf : 1; /* bit 13 */
2022*4882a593Smuzhiyun 	t_u8 ProxyARPService : 1; /* bit 12 */
2023*4882a593Smuzhiyun 	t_u8 FMS : 1; /* bit 11 */
2024*4882a593Smuzhiyun 	t_u8 LocationTracking : 1; /* bit 10 */
2025*4882a593Smuzhiyun 	t_u8 MulticastDiagnostics : 1; /* bit 9  */
2026*4882a593Smuzhiyun 	t_u8 Diagnostics : 1; /* bit 8  */
2027*4882a593Smuzhiyun 	t_u8 Event : 1; /* bit 7  */
2028*4882a593Smuzhiyun 	t_u8 SPSMP_Support : 1; /* bit 6 */
2029*4882a593Smuzhiyun 	t_u8 Reserved5 : 1; /* bit 5 */
2030*4882a593Smuzhiyun 	t_u8 PSMP_Capable : 1; /* bit 4 */
2031*4882a593Smuzhiyun 	t_u8 RejectUnadmFrame : 1; /* bit 3 */
2032*4882a593Smuzhiyun 	t_u8 ExtChanSwitching : 1; /* bit 2 */
2033*4882a593Smuzhiyun 	t_u8 Reserved1 : 1; /* bit 1 */
2034*4882a593Smuzhiyun 	t_u8 BSS_CoexistSupport : 1; /* bit 0 */
2035*4882a593Smuzhiyun } MLAN_PACK_END ExtCap_t, *pExtCap_t;
2036*4882a593Smuzhiyun #else
2037*4882a593Smuzhiyun /** Extended Capabilities Data */
2038*4882a593Smuzhiyun typedef struct MLAN_PACK_START _ExtCap_t {
2039*4882a593Smuzhiyun 	/** Extended Capabilities value */
2040*4882a593Smuzhiyun 	t_u8 BSS_CoexistSupport : 1; /* bit 0 */
2041*4882a593Smuzhiyun 	t_u8 Reserved1 : 1; /* bit 1 */
2042*4882a593Smuzhiyun 	t_u8 ExtChanSwitching : 1; /* bit 2 */
2043*4882a593Smuzhiyun 	t_u8 RejectUnadmFrame : 1; /* bit 3 */
2044*4882a593Smuzhiyun 	t_u8 PSMP_Capable : 1; /* bit 4 */
2045*4882a593Smuzhiyun 	t_u8 Reserved5 : 1; /* bit 5 */
2046*4882a593Smuzhiyun 	t_u8 SPSMP_Support : 1; /* bit 6 */
2047*4882a593Smuzhiyun 	t_u8 Event : 1; /* bit 7  */
2048*4882a593Smuzhiyun 	t_u8 Diagnostics : 1; /* bit 8  */
2049*4882a593Smuzhiyun 	t_u8 MulticastDiagnostics : 1; /* bit 9  */
2050*4882a593Smuzhiyun 	t_u8 LocationTracking : 1; /* bit 10 */
2051*4882a593Smuzhiyun 	t_u8 FMS : 1; /* bit 11 */
2052*4882a593Smuzhiyun 	t_u8 ProxyARPService : 1; /* bit 12 */
2053*4882a593Smuzhiyun 	t_u8 CollocatedIntf : 1; /* bit 13 */
2054*4882a593Smuzhiyun 	t_u8 CivicLocation : 1; /* bit 14 */
2055*4882a593Smuzhiyun 	t_u8 GeospatialLocation : 1; /* bit 15 */
2056*4882a593Smuzhiyun 	t_u8 TFS : 1; /* bit 16 */
2057*4882a593Smuzhiyun 	t_u8 WNM_Sleep : 1; /* bit 17 */
2058*4882a593Smuzhiyun 	t_u8 TIM_Broadcast : 1; /* bit 18 */
2059*4882a593Smuzhiyun 	t_u8 BSS_Transition : 1; /* bit 19 */
2060*4882a593Smuzhiyun 	t_u8 QoSTrafficCap : 1; /* bit 20 */
2061*4882a593Smuzhiyun 	t_u8 AC_StationCount : 1; /* bit 21 */
2062*4882a593Smuzhiyun 	t_u8 MultipleBSSID : 1; /* bit 22 */
2063*4882a593Smuzhiyun 	t_u8 TimingMeasurement : 1; /* bit 23 */
2064*4882a593Smuzhiyun 	t_u8 ChannelUsage : 1; /* bit 24 */
2065*4882a593Smuzhiyun 	t_u8 SSID_List : 1; /* bit 25 */
2066*4882a593Smuzhiyun 	t_u8 DMS : 1; /* bit 26 */
2067*4882a593Smuzhiyun 	t_u8 UTC : 1; /* bit 27 */
2068*4882a593Smuzhiyun 	t_u8 TDLSPeerUAPSDSupport : 1; /* bit 28 */
2069*4882a593Smuzhiyun 	t_u8 TDLSPeerPSMSupport : 1; /* bit 29 */
2070*4882a593Smuzhiyun 	t_u8 TDLSChannelSwitching : 1; /* bit 30 */
2071*4882a593Smuzhiyun 	t_u8 Interworking : 1; /* bit 31 */
2072*4882a593Smuzhiyun 	t_u8 Qos_Map : 1; /* bit 32 */
2073*4882a593Smuzhiyun 	t_u8 EBR : 1; /* bit 33 */
2074*4882a593Smuzhiyun 	t_u8 SSPN_Interface : 1; /* bit 34 */
2075*4882a593Smuzhiyun 	t_u8 Reserved35 : 1; /* bit 35 */
2076*4882a593Smuzhiyun 	t_u8 MSGCF_Capa : 1; /* bit 36 */
2077*4882a593Smuzhiyun 	t_u8 TDLSSupport : 1; /* bit 37 */
2078*4882a593Smuzhiyun 	t_u8 TDLSProhibited : 1; /* bit 38 */
2079*4882a593Smuzhiyun 	t_u8 TDLSChlSwitchProhib : 1; /* bit 39 */
2080*4882a593Smuzhiyun 	t_u8 rsvdBit40 : 1; /* bit 40 */
2081*4882a593Smuzhiyun 	t_u8 rsvdBit41 : 1; /* bit 41 */
2082*4882a593Smuzhiyun 	t_u8 rsvdBit42 : 1; /* bit 42 */
2083*4882a593Smuzhiyun 	t_u8 rsvdBit43 : 1; /* bit 43 */
2084*4882a593Smuzhiyun 	t_u8 rsvdBit44 : 1; /* bit 44 */
2085*4882a593Smuzhiyun 	t_u8 rsvdBit45 : 1; /* bit 45 */
2086*4882a593Smuzhiyun 	t_u8 rsvdBit46 : 1; /* bit 46 */
2087*4882a593Smuzhiyun 	t_u8 rsvdBit47 : 1; /* bit 47 */
2088*4882a593Smuzhiyun 	t_u8 rsvdBit48 : 1; /* bit 48 */
2089*4882a593Smuzhiyun 	t_u8 rsvdBit49 : 1; /* bit 49 */
2090*4882a593Smuzhiyun 	t_u8 rsvdBit50 : 1; /* bit 50 */
2091*4882a593Smuzhiyun 	t_u8 rsvdBit51 : 1; /* bit 51 */
2092*4882a593Smuzhiyun 	t_u8 rsvdBit52 : 1; /* bit 52 */
2093*4882a593Smuzhiyun 	t_u8 rsvdBit53 : 1; /* bit 53 */
2094*4882a593Smuzhiyun 	t_u8 rsvdBit54 : 1; /* bit 54 */
2095*4882a593Smuzhiyun 	t_u8 rsvdBit55 : 1; /* bit 55 */
2096*4882a593Smuzhiyun 	t_u8 rsvdBit56 : 1; /* bit 56 */
2097*4882a593Smuzhiyun 	t_u8 rsvdBit57 : 1; /* bit 57 */
2098*4882a593Smuzhiyun 	t_u8 rsvdBit58 : 1; /* bit 58 */
2099*4882a593Smuzhiyun 	t_u8 rsvdBit59 : 1; /* bit 59 */
2100*4882a593Smuzhiyun 	t_u8 rsvdBit60 : 1; /* bit 60 */
2101*4882a593Smuzhiyun 	t_u8 TDLSWildBandwidth : 1; /* bit 61 */
2102*4882a593Smuzhiyun 	t_u8 OperModeNtf : 1; /* bit 62 */
2103*4882a593Smuzhiyun 	t_u8 MaxAMSDU0 : 1; /* bit 63 */
2104*4882a593Smuzhiyun 	t_u8 MaxAMSDU1 : 1; /* bit 64 */
2105*4882a593Smuzhiyun 	t_u8 chanSchedMgnt : 1; /* bit 65 */
2106*4882a593Smuzhiyun 	t_u8 rsvdBit66 : 1; /* bit 66 */
2107*4882a593Smuzhiyun 	t_u8 NCC : 1; /* bit 67 */
2108*4882a593Smuzhiyun 	t_u8 rsvdBit68 : 1; /* bit 68 */
2109*4882a593Smuzhiyun 	t_u8 CAQ : 1; /* bit 69 */
2110*4882a593Smuzhiyun 	t_u8 FTMR : 1; /* bit 70 */
2111*4882a593Smuzhiyun 	t_u8 FTMI : 1; /* bit 71 */
2112*4882a593Smuzhiyun 	t_u8 FILS : 1; /* bit 72 */
2113*4882a593Smuzhiyun 	t_u8 rsvdBit73 : 1; /* bit 73 */
2114*4882a593Smuzhiyun 	t_u8 rsvdBit74 : 1; /* bit 74 */
2115*4882a593Smuzhiyun 	t_u8 rsvdBit75 : 1; /* bit 75 */
2116*4882a593Smuzhiyun 	t_u8 rsvdBit76 : 1; /* bit 76 */
2117*4882a593Smuzhiyun 	t_u8 TWTReq : 1; /* bit 77 */
2118*4882a593Smuzhiyun 	t_u8 TWTResp : 1; /* bit 78 */
2119*4882a593Smuzhiyun 	t_u8 rsvdBit79 : 1; /* bit 79 */
2120*4882a593Smuzhiyun 	t_u8 rsvdBit80 : 1; /* bit 80 */
2121*4882a593Smuzhiyun 	t_u8 rsvdBit81 : 1; /* bit 81 */
2122*4882a593Smuzhiyun 	t_u8 rsvdBit82 : 1; /* bit 82 */
2123*4882a593Smuzhiyun 	t_u8 rsvdBit83 : 1; /* bit 83 */
2124*4882a593Smuzhiyun 	t_u8 beacon_prot : 1; /* bit 84 */
2125*4882a593Smuzhiyun 	t_u8 rsvdBit85 : 1; /* bit 85 */
2126*4882a593Smuzhiyun 	t_u8 rsvdBit86 : 1; /* bit 86 */
2127*4882a593Smuzhiyun 	t_u8 rsvdBit87 : 1; /* bit 87 */
2128*4882a593Smuzhiyun } MLAN_PACK_END ExtCap_t, *pExtCap_t;
2129*4882a593Smuzhiyun #endif
2130*4882a593Smuzhiyun 
2131*4882a593Smuzhiyun /** ExtCap : TDLS prohibited */
2132*4882a593Smuzhiyun #define IS_EXTCAP_TDLS_PROHIBITED(ext_cap) (ext_cap.TDLSProhibited)
2133*4882a593Smuzhiyun /** ExtCap : TDLS channel switch prohibited */
2134*4882a593Smuzhiyun #define IS_EXTCAP_TDLS_CHLSWITCHPROHIB(ext_cap) (ext_cap.TDLSChlSwitchProhib)
2135*4882a593Smuzhiyun 
2136*4882a593Smuzhiyun /** mlan_bss_info data structure for MLAN_OID_GET_BSS_INFO */
2137*4882a593Smuzhiyun typedef struct _mlan_bss_info {
2138*4882a593Smuzhiyun 	/** BSS mode */
2139*4882a593Smuzhiyun 	t_u32 bss_mode;
2140*4882a593Smuzhiyun 	/** SSID */
2141*4882a593Smuzhiyun 	mlan_802_11_ssid ssid;
2142*4882a593Smuzhiyun 	/** Table index */
2143*4882a593Smuzhiyun 	t_u32 scan_table_idx;
2144*4882a593Smuzhiyun 	/** Channel */
2145*4882a593Smuzhiyun 	t_u32 bss_chan;
2146*4882a593Smuzhiyun 	/** Band */
2147*4882a593Smuzhiyun 	t_u16 bss_band;
2148*4882a593Smuzhiyun 	/** Region code */
2149*4882a593Smuzhiyun 	t_u32 region_code;
2150*4882a593Smuzhiyun 	/** Connection status */
2151*4882a593Smuzhiyun 	t_u32 media_connected;
2152*4882a593Smuzhiyun 	/** Radio on */
2153*4882a593Smuzhiyun 	t_u32 radio_on;
2154*4882a593Smuzhiyun 	/** Max power level in dBm */
2155*4882a593Smuzhiyun 	t_s32 max_power_level;
2156*4882a593Smuzhiyun 	/** Min power level in dBm */
2157*4882a593Smuzhiyun 	t_s32 min_power_level;
2158*4882a593Smuzhiyun 	/** Adhoc state */
2159*4882a593Smuzhiyun 	t_u32 adhoc_state;
2160*4882a593Smuzhiyun 	/** NF of last beacon */
2161*4882a593Smuzhiyun 	t_s32 bcn_nf_last;
2162*4882a593Smuzhiyun 	/** wep status */
2163*4882a593Smuzhiyun 	t_u32 wep_status;
2164*4882a593Smuzhiyun 	/** scan block status */
2165*4882a593Smuzhiyun 	t_u8 scan_block;
2166*4882a593Smuzhiyun 	/** Host Sleep configured flag */
2167*4882a593Smuzhiyun 	t_u32 is_hs_configured;
2168*4882a593Smuzhiyun 	/** Deep Sleep flag */
2169*4882a593Smuzhiyun 	t_u32 is_deep_sleep;
2170*4882a593Smuzhiyun 	/** BSSID */
2171*4882a593Smuzhiyun 	mlan_802_11_mac_addr bssid;
2172*4882a593Smuzhiyun #ifdef STA_SUPPORT
2173*4882a593Smuzhiyun 	/** Capability Info */
2174*4882a593Smuzhiyun 	t_u16 capability_info;
2175*4882a593Smuzhiyun 	/** Beacon Interval */
2176*4882a593Smuzhiyun 	t_u16 beacon_interval;
2177*4882a593Smuzhiyun 	/** Listen Interval */
2178*4882a593Smuzhiyun 	t_u16 listen_interval;
2179*4882a593Smuzhiyun 	/** Association Id  */
2180*4882a593Smuzhiyun 	t_u16 assoc_id;
2181*4882a593Smuzhiyun 	/** AP/Peer supported rates */
2182*4882a593Smuzhiyun 	t_u8 peer_supp_rates[MLAN_SUPPORTED_RATES];
2183*4882a593Smuzhiyun 	/** extend capability for AP */
2184*4882a593Smuzhiyun 	ExtCap_t ext_cap;
2185*4882a593Smuzhiyun #endif /* STA_SUPPORT */
2186*4882a593Smuzhiyun 	/** Mobility Domain ID */
2187*4882a593Smuzhiyun 	t_u16 mdid;
2188*4882a593Smuzhiyun 	/** FT Capability policy */
2189*4882a593Smuzhiyun 	t_u8 ft_cap;
2190*4882a593Smuzhiyun 	/** 11h active */
2191*4882a593Smuzhiyun 	t_bool is_11h_active;
2192*4882a593Smuzhiyun 	/** dfs check channel */
2193*4882a593Smuzhiyun 	t_u8 dfs_check_channel;
2194*4882a593Smuzhiyun } mlan_bss_info, *pmlan_bss_info;
2195*4882a593Smuzhiyun 
2196*4882a593Smuzhiyun /** MAXIMUM number of TID */
2197*4882a593Smuzhiyun #define MAX_NUM_TID 8
2198*4882a593Smuzhiyun 
2199*4882a593Smuzhiyun /** Max RX Win size */
2200*4882a593Smuzhiyun #define MAX_RX_WINSIZE 64
2201*4882a593Smuzhiyun 
2202*4882a593Smuzhiyun /** rx_reorder_tbl */
2203*4882a593Smuzhiyun typedef struct {
2204*4882a593Smuzhiyun 	/** TID */
2205*4882a593Smuzhiyun 	t_u16 tid;
2206*4882a593Smuzhiyun 	/** TA */
2207*4882a593Smuzhiyun 	t_u8 ta[MLAN_MAC_ADDR_LENGTH];
2208*4882a593Smuzhiyun 	/** Start window */
2209*4882a593Smuzhiyun 	t_u32 start_win;
2210*4882a593Smuzhiyun 	/** Window size */
2211*4882a593Smuzhiyun 	t_u32 win_size;
2212*4882a593Smuzhiyun 	/** amsdu flag */
2213*4882a593Smuzhiyun 	t_u8 amsdu;
2214*4882a593Smuzhiyun 	/** buffer status */
2215*4882a593Smuzhiyun 	t_u32 buffer[MAX_RX_WINSIZE];
2216*4882a593Smuzhiyun } rx_reorder_tbl;
2217*4882a593Smuzhiyun 
2218*4882a593Smuzhiyun /** tx_ba_stream_tbl */
2219*4882a593Smuzhiyun typedef struct {
2220*4882a593Smuzhiyun 	/** TID */
2221*4882a593Smuzhiyun 	t_u16 tid;
2222*4882a593Smuzhiyun 	/** RA */
2223*4882a593Smuzhiyun 	t_u8 ra[MLAN_MAC_ADDR_LENGTH];
2224*4882a593Smuzhiyun 	/** amsdu flag */
2225*4882a593Smuzhiyun 	t_u8 amsdu;
2226*4882a593Smuzhiyun } tx_ba_stream_tbl;
2227*4882a593Smuzhiyun 
2228*4882a593Smuzhiyun /** Debug command number */
2229*4882a593Smuzhiyun #define DBG_CMD_NUM 10
2230*4882a593Smuzhiyun 
2231*4882a593Smuzhiyun #ifdef SDIO
2232*4882a593Smuzhiyun /** sdio mp debug number */
2233*4882a593Smuzhiyun #define SDIO_MP_DBG_NUM 10
2234*4882a593Smuzhiyun #endif
2235*4882a593Smuzhiyun 
2236*4882a593Smuzhiyun /** Maximum size of IEEE Information Elements */
2237*4882a593Smuzhiyun #define IEEE_MAX_IE_SIZE 256
2238*4882a593Smuzhiyun 
2239*4882a593Smuzhiyun /** support up to 8 TDLS peer */
2240*4882a593Smuzhiyun #define MLAN_MAX_TDLS_PEER_SUPPORTED 8
2241*4882a593Smuzhiyun /** TDLS peer info */
2242*4882a593Smuzhiyun typedef struct _tdls_peer_info {
2243*4882a593Smuzhiyun 	/** station mac address */
2244*4882a593Smuzhiyun 	t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
2245*4882a593Smuzhiyun 	/** SNR */
2246*4882a593Smuzhiyun 	t_s8 snr;
2247*4882a593Smuzhiyun 	/** Noise Floor */
2248*4882a593Smuzhiyun 	t_s8 nf;
2249*4882a593Smuzhiyun 	/** Extended Capabilities IE */
2250*4882a593Smuzhiyun 	t_u8 ext_cap[IEEE_MAX_IE_SIZE];
2251*4882a593Smuzhiyun 	/** HT Capabilities IE */
2252*4882a593Smuzhiyun 	t_u8 ht_cap[IEEE_MAX_IE_SIZE];
2253*4882a593Smuzhiyun 	/** VHT Capabilities IE */
2254*4882a593Smuzhiyun 	t_u8 vht_cap[IEEE_MAX_IE_SIZE];
2255*4882a593Smuzhiyun 	/** HE Capabilities IE */
2256*4882a593Smuzhiyun 	t_u8 he_cap[IEEE_MAX_IE_SIZE];
2257*4882a593Smuzhiyun } tdls_peer_info;
2258*4882a593Smuzhiyun 
2259*4882a593Smuzhiyun /** max ralist num */
2260*4882a593Smuzhiyun #define MLAN_MAX_RALIST_NUM 8
2261*4882a593Smuzhiyun /** ralist info */
2262*4882a593Smuzhiyun typedef struct _ralist_info {
2263*4882a593Smuzhiyun 	/** RA list buffer */
2264*4882a593Smuzhiyun 	t_u8 ra[MLAN_MAC_ADDR_LENGTH];
2265*4882a593Smuzhiyun 	/** total packets in RA list */
2266*4882a593Smuzhiyun 	t_u16 total_pkts;
2267*4882a593Smuzhiyun 	/** tid num */
2268*4882a593Smuzhiyun 	t_u8 tid;
2269*4882a593Smuzhiyun 	/** tx_pause flag */
2270*4882a593Smuzhiyun 	t_u8 tx_pause;
2271*4882a593Smuzhiyun } ralist_info, *pralist_info;
2272*4882a593Smuzhiyun 
2273*4882a593Smuzhiyun /** mlan_debug_info data structure for MLAN_OID_GET_DEBUG_INFO */
2274*4882a593Smuzhiyun typedef struct _mlan_debug_info {
2275*4882a593Smuzhiyun 	/* WMM AC_BK count */
2276*4882a593Smuzhiyun 	t_u32 wmm_ac_bk;
2277*4882a593Smuzhiyun 	/* WMM AC_BE count */
2278*4882a593Smuzhiyun 	t_u32 wmm_ac_be;
2279*4882a593Smuzhiyun 	/* WMM AC_VI count */
2280*4882a593Smuzhiyun 	t_u32 wmm_ac_vi;
2281*4882a593Smuzhiyun 	/* WMM AC_VO count */
2282*4882a593Smuzhiyun 	t_u32 wmm_ac_vo;
2283*4882a593Smuzhiyun 	/** Corresponds to max_tx_buf_size member of mlan_adapter*/
2284*4882a593Smuzhiyun 	t_u32 max_tx_buf_size;
2285*4882a593Smuzhiyun 	/** Corresponds to tx_buf_size member of mlan_adapter*/
2286*4882a593Smuzhiyun 	t_u32 tx_buf_size;
2287*4882a593Smuzhiyun 	/** Corresponds to curr_tx_buf_size member of mlan_adapter*/
2288*4882a593Smuzhiyun 	t_u32 curr_tx_buf_size;
2289*4882a593Smuzhiyun 	/** Tx table num */
2290*4882a593Smuzhiyun 	t_u32 tx_tbl_num;
2291*4882a593Smuzhiyun 	/** Tx ba stream table */
2292*4882a593Smuzhiyun 	tx_ba_stream_tbl tx_tbl[MLAN_MAX_TX_BASTREAM_SUPPORTED];
2293*4882a593Smuzhiyun 	/** Rx table num */
2294*4882a593Smuzhiyun 	t_u32 rx_tbl_num;
2295*4882a593Smuzhiyun 	/** Rx reorder table*/
2296*4882a593Smuzhiyun 	rx_reorder_tbl rx_tbl[MLAN_MAX_RX_BASTREAM_SUPPORTED];
2297*4882a593Smuzhiyun 	/** TDLS peer number */
2298*4882a593Smuzhiyun 	t_u32 tdls_peer_num;
2299*4882a593Smuzhiyun 	/** TDLS peer list*/
2300*4882a593Smuzhiyun 	tdls_peer_info tdls_peer_list[MLAN_MAX_TDLS_PEER_SUPPORTED];
2301*4882a593Smuzhiyun 	/** ralist num */
2302*4882a593Smuzhiyun 	t_u32 ralist_num;
2303*4882a593Smuzhiyun 	/** ralist info */
2304*4882a593Smuzhiyun 	ralist_info ralist[MLAN_MAX_RALIST_NUM];
2305*4882a593Smuzhiyun 	/** Corresponds to ps_mode member of mlan_adapter */
2306*4882a593Smuzhiyun 	t_u16 ps_mode;
2307*4882a593Smuzhiyun 	/** Corresponds to ps_state member of mlan_adapter */
2308*4882a593Smuzhiyun 	t_u32 ps_state;
2309*4882a593Smuzhiyun #ifdef STA_SUPPORT
2310*4882a593Smuzhiyun 	/** Corresponds to is_deep_sleep member of mlan_adapter */
2311*4882a593Smuzhiyun 	t_u8 is_deep_sleep;
2312*4882a593Smuzhiyun #endif /** STA_SUPPORT */
2313*4882a593Smuzhiyun 	/** Corresponds to pm_wakeup_card_req member of mlan_adapter */
2314*4882a593Smuzhiyun 	t_u8 pm_wakeup_card_req;
2315*4882a593Smuzhiyun 	/** Corresponds to pm_wakeup_fw_try member of mlan_adapter */
2316*4882a593Smuzhiyun 	t_u32 pm_wakeup_fw_try;
2317*4882a593Smuzhiyun 	/** time stamp when host try to wake up firmware */
2318*4882a593Smuzhiyun 	t_u32 pm_wakeup_in_secs;
2319*4882a593Smuzhiyun 	/** wake up timeout happened */
2320*4882a593Smuzhiyun 	t_u32 pm_wakeup_timeout;
2321*4882a593Smuzhiyun 	/** Corresponds to is_hs_configured member of mlan_adapter */
2322*4882a593Smuzhiyun 	t_u8 is_hs_configured;
2323*4882a593Smuzhiyun 	/** Corresponds to hs_activated member of mlan_adapter */
2324*4882a593Smuzhiyun 	t_u8 hs_activated;
2325*4882a593Smuzhiyun 	/** Corresponds to pps_uapsd_mode member of mlan_adapter */
2326*4882a593Smuzhiyun 	t_u16 pps_uapsd_mode;
2327*4882a593Smuzhiyun 	/** Corresponds to sleep_period.period member of mlan_adapter */
2328*4882a593Smuzhiyun 	t_u16 sleep_pd;
2329*4882a593Smuzhiyun 	/** Corresponds to wmm_qosinfo member of mlan_private */
2330*4882a593Smuzhiyun 	t_u8 qos_cfg;
2331*4882a593Smuzhiyun 	/** Corresponds to tx_lock_flag member of mlan_adapter */
2332*4882a593Smuzhiyun 	t_u8 tx_lock_flag;
2333*4882a593Smuzhiyun 	/** Corresponds to port_open member of mlan_private */
2334*4882a593Smuzhiyun 	t_u8 port_open;
2335*4882a593Smuzhiyun 	/** bypass pkt count */
2336*4882a593Smuzhiyun 	t_u32 bypass_pkt_count;
2337*4882a593Smuzhiyun 	/** Corresponds to scan_processing member of mlan_adapter */
2338*4882a593Smuzhiyun 	t_u32 scan_processing;
2339*4882a593Smuzhiyun 	/** Corresponds to scan_state member of mlan_adapter */
2340*4882a593Smuzhiyun 	t_u32 scan_state;
2341*4882a593Smuzhiyun 	/** Corresponds to mlan_processing member of mlan_adapter */
2342*4882a593Smuzhiyun 	t_u32 mlan_processing;
2343*4882a593Smuzhiyun 	/** Corresponds to main_lock_flag member of mlan_adapter */
2344*4882a593Smuzhiyun 	t_u32 main_lock_flag;
2345*4882a593Smuzhiyun 	/** Corresponds to main_process_cnt member of mlan_adapter */
2346*4882a593Smuzhiyun 	t_u32 main_process_cnt;
2347*4882a593Smuzhiyun 	/** Corresponds to delay_task_flag member of mlan_adapter */
2348*4882a593Smuzhiyun 	t_u32 delay_task_flag;
2349*4882a593Smuzhiyun 	/** mlan_rx_processing */
2350*4882a593Smuzhiyun 	t_u32 mlan_rx_processing;
2351*4882a593Smuzhiyun 	/** rx pkts queued */
2352*4882a593Smuzhiyun 	t_u32 rx_pkts_queued;
2353*4882a593Smuzhiyun 	/** Number of host to card command failures */
2354*4882a593Smuzhiyun 	t_u32 num_cmd_host_to_card_failure;
2355*4882a593Smuzhiyun 	/** Number of host to card sleep confirm failures */
2356*4882a593Smuzhiyun 	t_u32 num_cmd_sleep_cfm_host_to_card_failure;
2357*4882a593Smuzhiyun 	/** Number of host to card Tx failures */
2358*4882a593Smuzhiyun 	t_u32 num_tx_host_to_card_failure;
2359*4882a593Smuzhiyun 	/** Number of allocate buffer failure */
2360*4882a593Smuzhiyun 	t_u32 num_alloc_buffer_failure;
2361*4882a593Smuzhiyun 	/** Number of pkt dropped */
2362*4882a593Smuzhiyun 	t_u32 num_pkt_dropped;
2363*4882a593Smuzhiyun #ifdef SDIO
2364*4882a593Smuzhiyun 	/** Number of card to host command/event failures */
2365*4882a593Smuzhiyun 	t_u32 num_cmdevt_card_to_host_failure;
2366*4882a593Smuzhiyun 	/** Number of card to host Rx failures */
2367*4882a593Smuzhiyun 	t_u32 num_rx_card_to_host_failure;
2368*4882a593Smuzhiyun 	/** Number of interrupt read failures */
2369*4882a593Smuzhiyun 	t_u32 num_int_read_failure;
2370*4882a593Smuzhiyun 	/** Last interrupt status */
2371*4882a593Smuzhiyun 	t_u32 last_int_status;
2372*4882a593Smuzhiyun 	/** number of interrupt receive */
2373*4882a593Smuzhiyun 	t_u32 num_of_irq;
2374*4882a593Smuzhiyun 	/** flag for sdio rx aggr */
2375*4882a593Smuzhiyun 	t_u8 sdio_rx_aggr;
2376*4882a593Smuzhiyun 	/** FW update port number */
2377*4882a593Smuzhiyun 	t_u32 mp_update[SDIO_MP_AGGR_DEF_PKT_LIMIT_MAX * 2];
2378*4882a593Smuzhiyun 	/** Invalid port update count */
2379*4882a593Smuzhiyun 	t_u32 mp_invalid_update;
2380*4882a593Smuzhiyun 	/** Number of packets tx aggr */
2381*4882a593Smuzhiyun 	t_u32 mpa_tx_count[SDIO_MP_AGGR_DEF_PKT_LIMIT_MAX];
2382*4882a593Smuzhiyun 	/** no more packets count*/
2383*4882a593Smuzhiyun 	t_u32 mpa_sent_last_pkt;
2384*4882a593Smuzhiyun 	/** no write_ports count */
2385*4882a593Smuzhiyun 	t_u32 mpa_sent_no_ports;
2386*4882a593Smuzhiyun 	/** last recv wr_bitmap */
2387*4882a593Smuzhiyun 	t_u32 last_recv_wr_bitmap;
2388*4882a593Smuzhiyun 	/** last recv rd_bitmap */
2389*4882a593Smuzhiyun 	t_u32 last_recv_rd_bitmap;
2390*4882a593Smuzhiyun 	/** mp_data_port_mask */
2391*4882a593Smuzhiyun 	t_u32 mp_data_port_mask;
2392*4882a593Smuzhiyun 	/** last mp_wr_bitmap */
2393*4882a593Smuzhiyun 	t_u32 last_mp_wr_bitmap[SDIO_MP_DBG_NUM];
2394*4882a593Smuzhiyun 	/** last ports for cmd53 write data */
2395*4882a593Smuzhiyun 	t_u32 last_mp_wr_ports[SDIO_MP_DBG_NUM];
2396*4882a593Smuzhiyun 	/** last len for cmd53 write data */
2397*4882a593Smuzhiyun 	t_u32 last_mp_wr_len[SDIO_MP_DBG_NUM];
2398*4882a593Smuzhiyun 	/** last curr_wr_port */
2399*4882a593Smuzhiyun 	t_u8 last_curr_wr_port[SDIO_MP_DBG_NUM];
2400*4882a593Smuzhiyun 	/** length info for cmd53 write data */
2401*4882a593Smuzhiyun 	t_u16 last_mp_wr_info[SDIO_MP_DBG_NUM * SDIO_MP_AGGR_DEF_PKT_LIMIT_MAX];
2402*4882a593Smuzhiyun 	/** last mp_index */
2403*4882a593Smuzhiyun 	t_u8 last_mp_index;
2404*4882a593Smuzhiyun 	/** buffer for mp debug */
2405*4882a593Smuzhiyun 	t_u8 *mpa_buf;
2406*4882a593Smuzhiyun 	/** length info for mp buf size */
2407*4882a593Smuzhiyun 	t_u32 mpa_buf_size;
2408*4882a593Smuzhiyun 	/** Number of packets rx aggr */
2409*4882a593Smuzhiyun 	t_u32 mpa_rx_count[SDIO_MP_AGGR_DEF_PKT_LIMIT_MAX];
2410*4882a593Smuzhiyun 	/** mp aggr_pkt limit */
2411*4882a593Smuzhiyun 	t_u8 mp_aggr_pkt_limit;
2412*4882a593Smuzhiyun #endif
2413*4882a593Smuzhiyun 	/** Number of deauthentication events */
2414*4882a593Smuzhiyun 	t_u32 num_event_deauth;
2415*4882a593Smuzhiyun 	/** Number of disassosiation events */
2416*4882a593Smuzhiyun 	t_u32 num_event_disassoc;
2417*4882a593Smuzhiyun 	/** Number of link lost events */
2418*4882a593Smuzhiyun 	t_u32 num_event_link_lost;
2419*4882a593Smuzhiyun 	/** Number of deauthentication commands */
2420*4882a593Smuzhiyun 	t_u32 num_cmd_deauth;
2421*4882a593Smuzhiyun 	/** Number of association comamnd successes */
2422*4882a593Smuzhiyun 	t_u32 num_cmd_assoc_success;
2423*4882a593Smuzhiyun 	/** Number of association command failures */
2424*4882a593Smuzhiyun 	t_u32 num_cmd_assoc_failure;
2425*4882a593Smuzhiyun 	/** Number of consecutive association failures */
2426*4882a593Smuzhiyun 	t_u32 num_cons_assoc_failure;
2427*4882a593Smuzhiyun 
2428*4882a593Smuzhiyun 	/** Number of command timeouts */
2429*4882a593Smuzhiyun 	t_u32 num_cmd_timeout;
2430*4882a593Smuzhiyun 	/** Timeout command ID */
2431*4882a593Smuzhiyun 	t_u16 timeout_cmd_id;
2432*4882a593Smuzhiyun 	/** Timeout command action */
2433*4882a593Smuzhiyun 	t_u16 timeout_cmd_act;
2434*4882a593Smuzhiyun 	/** List of last command IDs */
2435*4882a593Smuzhiyun 	t_u16 last_cmd_id[DBG_CMD_NUM];
2436*4882a593Smuzhiyun 	/** List of last command actions */
2437*4882a593Smuzhiyun 	t_u16 last_cmd_act[DBG_CMD_NUM];
2438*4882a593Smuzhiyun 	/** Last command index */
2439*4882a593Smuzhiyun 	t_u16 last_cmd_index;
2440*4882a593Smuzhiyun 	/** List of last command response IDs */
2441*4882a593Smuzhiyun 	t_u16 last_cmd_resp_id[DBG_CMD_NUM];
2442*4882a593Smuzhiyun 	/** Last command response index */
2443*4882a593Smuzhiyun 	t_u16 last_cmd_resp_index;
2444*4882a593Smuzhiyun 	/** List of last events */
2445*4882a593Smuzhiyun 	t_u16 last_event[DBG_CMD_NUM];
2446*4882a593Smuzhiyun 	/** Last event index */
2447*4882a593Smuzhiyun 	t_u16 last_event_index;
2448*4882a593Smuzhiyun 	/** Number of no free command node */
2449*4882a593Smuzhiyun 	t_u16 num_no_cmd_node;
2450*4882a593Smuzhiyun 	/** pending command id */
2451*4882a593Smuzhiyun 	t_u16 pending_cmd;
2452*4882a593Smuzhiyun 	/** time stamp for dnld last cmd */
2453*4882a593Smuzhiyun 	t_u32 dnld_cmd_in_secs;
2454*4882a593Smuzhiyun 	/** Corresponds to data_sent member of mlan_adapter */
2455*4882a593Smuzhiyun 	t_u8 data_sent;
2456*4882a593Smuzhiyun 	/** Corresponds to data_sent_cnt member of mlan_adapter */
2457*4882a593Smuzhiyun 	t_u32 data_sent_cnt;
2458*4882a593Smuzhiyun 	/** Corresponds to cmd_sent member of mlan_adapter */
2459*4882a593Smuzhiyun 	t_u8 cmd_sent;
2460*4882a593Smuzhiyun 	/** SDIO multiple port read bitmap */
2461*4882a593Smuzhiyun 	t_u32 mp_rd_bitmap;
2462*4882a593Smuzhiyun 	/** SDIO multiple port write bitmap */
2463*4882a593Smuzhiyun 	t_u32 mp_wr_bitmap;
2464*4882a593Smuzhiyun 	/** Current available port for read */
2465*4882a593Smuzhiyun 	t_u8 curr_rd_port;
2466*4882a593Smuzhiyun 	/** Current available port for write */
2467*4882a593Smuzhiyun 	t_u8 curr_wr_port;
2468*4882a593Smuzhiyun #ifdef PCIE
2469*4882a593Smuzhiyun 	/** PCIE txbd read pointer */
2470*4882a593Smuzhiyun 	t_u32 txbd_rdptr;
2471*4882a593Smuzhiyun 	/** PCIE txbd write pointer */
2472*4882a593Smuzhiyun 	t_u32 txbd_wrptr;
2473*4882a593Smuzhiyun 	/** PCIE rxbd read pointer */
2474*4882a593Smuzhiyun 	t_u32 rxbd_rdptr;
2475*4882a593Smuzhiyun 	/** PCIE rxbd write pointer */
2476*4882a593Smuzhiyun 	t_u32 rxbd_wrptr;
2477*4882a593Smuzhiyun 	/** PCIE eventbd read pointer */
2478*4882a593Smuzhiyun 	t_u32 eventbd_rdptr;
2479*4882a593Smuzhiyun 	/** PCIE eventbd write pointer */
2480*4882a593Smuzhiyun 	t_u32 eventbd_wrptr;
2481*4882a593Smuzhiyun 	/** txrx_bd_size */
2482*4882a593Smuzhiyun 	t_u16 txrx_bd_size;
2483*4882a593Smuzhiyun 	/** txbd ring vbase */
2484*4882a593Smuzhiyun 	t_u8 *txbd_ring_vbase;
2485*4882a593Smuzhiyun 	/** txbd ring size */
2486*4882a593Smuzhiyun 	t_u32 txbd_ring_size;
2487*4882a593Smuzhiyun 	/** rxbd ring vbase */
2488*4882a593Smuzhiyun 	t_u8 *rxbd_ring_vbase;
2489*4882a593Smuzhiyun 	/** rxbd ring size */
2490*4882a593Smuzhiyun 	t_u32 rxbd_ring_size;
2491*4882a593Smuzhiyun 	/** evtbd ring vbase */
2492*4882a593Smuzhiyun 	t_u8 *evtbd_ring_vbase;
2493*4882a593Smuzhiyun 	/** evtbd ring size */
2494*4882a593Smuzhiyun 	t_u32 evtbd_ring_size;
2495*4882a593Smuzhiyun #endif
2496*4882a593Smuzhiyun 	/** Corresponds to cmdresp_received member of mlan_adapter */
2497*4882a593Smuzhiyun 	t_u8 cmd_resp_received;
2498*4882a593Smuzhiyun 	/** Corresponds to event_received member of mlan_adapter */
2499*4882a593Smuzhiyun 	t_u8 event_received;
2500*4882a593Smuzhiyun 	/**  pendig tx pkts */
2501*4882a593Smuzhiyun 	t_u32 tx_pkts_queued;
2502*4882a593Smuzhiyun #ifdef UAP_SUPPORT
2503*4882a593Smuzhiyun 	/**  pending bridge pkts */
2504*4882a593Smuzhiyun 	t_u16 num_bridge_pkts;
2505*4882a593Smuzhiyun 	/**  dropped pkts */
2506*4882a593Smuzhiyun 	t_u32 num_drop_pkts;
2507*4882a593Smuzhiyun #endif
2508*4882a593Smuzhiyun 	/** FW hang report */
2509*4882a593Smuzhiyun 	t_u8 fw_hang_report;
2510*4882a593Smuzhiyun 	/** mlan_adapter pointer */
2511*4882a593Smuzhiyun 	t_void *mlan_adapter;
2512*4882a593Smuzhiyun 	/** mlan_adapter_size */
2513*4882a593Smuzhiyun 	t_u32 mlan_adapter_size;
2514*4882a593Smuzhiyun 	/** mlan_priv vector */
2515*4882a593Smuzhiyun 	t_void *mlan_priv[MLAN_MAX_BSS_NUM];
2516*4882a593Smuzhiyun 	/** mlan_priv_size */
2517*4882a593Smuzhiyun 	t_u32 mlan_priv_size[MLAN_MAX_BSS_NUM];
2518*4882a593Smuzhiyun 	/** mlan_priv_num */
2519*4882a593Smuzhiyun 	t_u8 mlan_priv_num;
2520*4882a593Smuzhiyun } mlan_debug_info, *pmlan_debug_info;
2521*4882a593Smuzhiyun 
2522*4882a593Smuzhiyun #ifdef UAP_SUPPORT
2523*4882a593Smuzhiyun /** Maximum number of clients supported by AP */
2524*4882a593Smuzhiyun #define MAX_NUM_CLIENTS MAX_STA_COUNT
2525*4882a593Smuzhiyun 
2526*4882a593Smuzhiyun /** station info */
2527*4882a593Smuzhiyun typedef struct _sta_info_data {
2528*4882a593Smuzhiyun 	/** STA MAC address */
2529*4882a593Smuzhiyun 	t_u8 mac_address[MLAN_MAC_ADDR_LENGTH];
2530*4882a593Smuzhiyun 	/** Power mgmt status */
2531*4882a593Smuzhiyun 	t_u8 power_mgmt_status;
2532*4882a593Smuzhiyun 	/** RSSI */
2533*4882a593Smuzhiyun 	t_s8 rssi;
2534*4882a593Smuzhiyun 	/** station bandmode */
2535*4882a593Smuzhiyun 	t_u16 bandmode;
2536*4882a593Smuzhiyun 	/** station stats */
2537*4882a593Smuzhiyun 	sta_stats stats;
2538*4882a593Smuzhiyun 	/** ie length */
2539*4882a593Smuzhiyun 	t_u16 ie_len;
2540*4882a593Smuzhiyun } sta_info_data;
2541*4882a593Smuzhiyun 
2542*4882a593Smuzhiyun /** mlan_ds_sta_list structure for MLAN_OID_UAP_STA_LIST */
2543*4882a593Smuzhiyun typedef struct _mlan_ds_sta_list {
2544*4882a593Smuzhiyun 	/** station count */
2545*4882a593Smuzhiyun 	t_u16 sta_count;
2546*4882a593Smuzhiyun 	/** station list */
2547*4882a593Smuzhiyun 	sta_info_data info[MAX_NUM_CLIENTS];
2548*4882a593Smuzhiyun 	/* ie_buf will be append at the end */
2549*4882a593Smuzhiyun } mlan_ds_sta_list, *pmlan_ds_sta_list;
2550*4882a593Smuzhiyun #endif
2551*4882a593Smuzhiyun 
2552*4882a593Smuzhiyun /** Type definition of mlan_ds_get_info for MLAN_IOCTL_GET_INFO */
2553*4882a593Smuzhiyun typedef struct _mlan_ds_get_info {
2554*4882a593Smuzhiyun 	/** Sub-command */
2555*4882a593Smuzhiyun 	t_u32 sub_command;
2556*4882a593Smuzhiyun 
2557*4882a593Smuzhiyun 	/** Status information parameter */
2558*4882a593Smuzhiyun 	union {
2559*4882a593Smuzhiyun 		/** Signal information for MLAN_OID_GET_SIGNAL */
2560*4882a593Smuzhiyun 		mlan_ds_get_signal signal;
2561*4882a593Smuzhiyun 		/** Signal path id for MLAN_OID_GET_SIGNAL_EXT */
2562*4882a593Smuzhiyun 		t_u16 path_id;
2563*4882a593Smuzhiyun 		/** Signal information for MLAN_OID_GET_SIGNAL_EXT */
2564*4882a593Smuzhiyun 		mlan_ds_get_signal signal_ext[MAX_PATH_NUM];
2565*4882a593Smuzhiyun 		/** Statistics information for MLAN_OID_GET_STATS */
2566*4882a593Smuzhiyun 		mlan_ds_get_stats stats;
2567*4882a593Smuzhiyun 		/** Statistics information for MLAN_OID_LINK_STATS*/
2568*4882a593Smuzhiyun 		t_u8 link_statistic[1];
2569*4882a593Smuzhiyun 		/** Firmware information for MLAN_OID_GET_FW_INFO */
2570*4882a593Smuzhiyun 		mlan_fw_info fw_info;
2571*4882a593Smuzhiyun 		/** Extended version information for MLAN_OID_GET_VER_EXT */
2572*4882a593Smuzhiyun 		mlan_ver_ext ver_ext;
2573*4882a593Smuzhiyun 		/** BSS information for MLAN_OID_GET_BSS_INFO */
2574*4882a593Smuzhiyun 		mlan_bss_info bss_info;
2575*4882a593Smuzhiyun 		/** Debug information for MLAN_OID_GET_DEBUG_INFO */
2576*4882a593Smuzhiyun 		t_u8 debug_info[1];
2577*4882a593Smuzhiyun #ifdef UAP_SUPPORT
2578*4882a593Smuzhiyun 		/** UAP Statistics information for MLAN_OID_GET_STATS */
2579*4882a593Smuzhiyun 		mlan_ds_uap_stats ustats;
2580*4882a593Smuzhiyun 		/** UAP station list for MLAN_OID_UAP_STA_LIST */
2581*4882a593Smuzhiyun 		mlan_ds_sta_list sta_list;
2582*4882a593Smuzhiyun #endif
2583*4882a593Smuzhiyun 	} param;
2584*4882a593Smuzhiyun } mlan_ds_get_info, *pmlan_ds_get_info;
2585*4882a593Smuzhiyun 
2586*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2587*4882a593Smuzhiyun /** Security Configuration Group */
2588*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2589*4882a593Smuzhiyun /** Enumeration for authentication mode */
2590*4882a593Smuzhiyun enum _mlan_auth_mode {
2591*4882a593Smuzhiyun 	MLAN_AUTH_MODE_OPEN = 0x00,
2592*4882a593Smuzhiyun 	MLAN_AUTH_MODE_SHARED = 0x01,
2593*4882a593Smuzhiyun 	MLAN_AUTH_MODE_FT = 0x02,
2594*4882a593Smuzhiyun 	MLAN_AUTH_MODE_SAE = 0x03,
2595*4882a593Smuzhiyun 	MLAN_AUTH_MODE_NETWORKEAP = 0x80,
2596*4882a593Smuzhiyun 	MLAN_AUTH_MODE_AUTO = 0xFF,
2597*4882a593Smuzhiyun };
2598*4882a593Smuzhiyun 
2599*4882a593Smuzhiyun /**Enumeration for AssocAgent authentication mode, sync from FW.*/
2600*4882a593Smuzhiyun typedef enum {
2601*4882a593Smuzhiyun 	AssocAgentAuth_Open,
2602*4882a593Smuzhiyun 	AssocAgentAuth_Shared,
2603*4882a593Smuzhiyun 	AssocAgentAuth_FastBss,
2604*4882a593Smuzhiyun 	AssocAgentAuth_FastBss_Skip,
2605*4882a593Smuzhiyun 	AssocAgentAuth_Network_EAP,
2606*4882a593Smuzhiyun 	AssocAgentAuth_Wpa3Sae = 6,
2607*4882a593Smuzhiyun 	AssocAgentAuth_Auto,
2608*4882a593Smuzhiyun } AssocAgentAuthType_e;
2609*4882a593Smuzhiyun 
2610*4882a593Smuzhiyun /** Enumeration for encryption mode */
2611*4882a593Smuzhiyun enum _mlan_encryption_mode {
2612*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_NONE = 0,
2613*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_WEP40 = 1,
2614*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_TKIP = 2,
2615*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_CCMP = 3,
2616*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_WEP104 = 4,
2617*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_GCMP = 5,
2618*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_GCMP_256 = 6,
2619*4882a593Smuzhiyun 	MLAN_ENCRYPTION_MODE_CCMP_256 = 7,
2620*4882a593Smuzhiyun };
2621*4882a593Smuzhiyun 
2622*4882a593Smuzhiyun /** Enumeration for PSK */
2623*4882a593Smuzhiyun enum _mlan_psk_type {
2624*4882a593Smuzhiyun 	MLAN_PSK_PASSPHRASE = 1,
2625*4882a593Smuzhiyun 	MLAN_PSK_PMK,
2626*4882a593Smuzhiyun 	MLAN_PSK_CLEAR,
2627*4882a593Smuzhiyun 	MLAN_PSK_QUERY,
2628*4882a593Smuzhiyun 	MLAN_PSK_SAE_PASSWORD,
2629*4882a593Smuzhiyun };
2630*4882a593Smuzhiyun 
2631*4882a593Smuzhiyun /** The bit to indicate the key is for unicast */
2632*4882a593Smuzhiyun #define MLAN_KEY_INDEX_UNICAST 0x40000000
2633*4882a593Smuzhiyun /** The key index to indicate default key */
2634*4882a593Smuzhiyun #define MLAN_KEY_INDEX_DEFAULT 0x000000ff
2635*4882a593Smuzhiyun /** Maximum key length */
2636*4882a593Smuzhiyun /* #define MLAN_MAX_KEY_LENGTH        32 */
2637*4882a593Smuzhiyun /** Minimum passphrase length */
2638*4882a593Smuzhiyun #define MLAN_MIN_PASSPHRASE_LENGTH 8
2639*4882a593Smuzhiyun /** Maximum passphrase length */
2640*4882a593Smuzhiyun #define MLAN_MAX_PASSPHRASE_LENGTH 63
2641*4882a593Smuzhiyun /** Minimum sae_password length */
2642*4882a593Smuzhiyun #define MLAN_MIN_SAE_PASSWORD_LENGTH 8
2643*4882a593Smuzhiyun /** Maximum sae_password length */
2644*4882a593Smuzhiyun #define MLAN_MAX_SAE_PASSWORD_LENGTH 255
2645*4882a593Smuzhiyun /** PMK length */
2646*4882a593Smuzhiyun #define MLAN_PMK_HEXSTR_LENGTH 64
2647*4882a593Smuzhiyun /* A few details needed for WEP (Wireless Equivalent Privacy) */
2648*4882a593Smuzhiyun /** 104 bits */
2649*4882a593Smuzhiyun #define MAX_WEP_KEY_SIZE 13
2650*4882a593Smuzhiyun /** 40 bits RC4 - WEP */
2651*4882a593Smuzhiyun #define MIN_WEP_KEY_SIZE 5
2652*4882a593Smuzhiyun /** packet number size */
2653*4882a593Smuzhiyun #define PN_SIZE 16
2654*4882a593Smuzhiyun /** max seq size of wpa/wpa2 key */
2655*4882a593Smuzhiyun #define SEQ_MAX_SIZE 8
2656*4882a593Smuzhiyun 
2657*4882a593Smuzhiyun /** key flag for tx_seq */
2658*4882a593Smuzhiyun #define KEY_FLAG_TX_SEQ_VALID 0x00000001
2659*4882a593Smuzhiyun /** key flag for rx_seq */
2660*4882a593Smuzhiyun #define KEY_FLAG_RX_SEQ_VALID 0x00000002
2661*4882a593Smuzhiyun /** key flag for group key */
2662*4882a593Smuzhiyun #define KEY_FLAG_GROUP_KEY 0x00000004
2663*4882a593Smuzhiyun /** key flag for tx */
2664*4882a593Smuzhiyun #define KEY_FLAG_SET_TX_KEY 0x00000008
2665*4882a593Smuzhiyun /** key flag for mcast IGTK */
2666*4882a593Smuzhiyun #define KEY_FLAG_AES_MCAST_IGTK 0x00000010
2667*4882a593Smuzhiyun /** key flag for remove key */
2668*4882a593Smuzhiyun #define KEY_FLAG_REMOVE_KEY 0x80000000
2669*4882a593Smuzhiyun /** key flag for GCMP */
2670*4882a593Smuzhiyun #define KEY_FLAG_GCMP 0x00000020
2671*4882a593Smuzhiyun /** key flag for GCMP_256 */
2672*4882a593Smuzhiyun #define KEY_FLAG_GCMP_256 0x00000040
2673*4882a593Smuzhiyun /** key flag for ccmp 256 */
2674*4882a593Smuzhiyun #define KEY_FLAG_CCMP_256 0x00000080
2675*4882a593Smuzhiyun /** key flag for GMAC_128 */
2676*4882a593Smuzhiyun #define KEY_FLAG_GMAC_128 0x00000100
2677*4882a593Smuzhiyun /** key flag for GMAC_256 */
2678*4882a593Smuzhiyun #define KEY_FLAG_GMAC_256 0x00000200
2679*4882a593Smuzhiyun 
2680*4882a593Smuzhiyun /** Type definition of mlan_ds_encrypt_key for MLAN_OID_SEC_CFG_ENCRYPT_KEY */
2681*4882a593Smuzhiyun typedef struct _mlan_ds_encrypt_key {
2682*4882a593Smuzhiyun 	/** Key disabled, all other fields will be
2683*4882a593Smuzhiyun 	 *  ignore when this flag set to MTRUE
2684*4882a593Smuzhiyun 	 */
2685*4882a593Smuzhiyun 	t_u32 key_disable;
2686*4882a593Smuzhiyun 	/** key removed flag, when this flag is set
2687*4882a593Smuzhiyun 	 *  to MTRUE, only key_index will be check
2688*4882a593Smuzhiyun 	 */
2689*4882a593Smuzhiyun 	t_u32 key_remove;
2690*4882a593Smuzhiyun 	/** Key index, used as current tx key index
2691*4882a593Smuzhiyun 	 *  when is_current_wep_key is set to MTRUE
2692*4882a593Smuzhiyun 	 */
2693*4882a593Smuzhiyun 	t_u32 key_index;
2694*4882a593Smuzhiyun 	/** Current Tx key flag */
2695*4882a593Smuzhiyun 	t_u32 is_current_wep_key;
2696*4882a593Smuzhiyun 	/** Key length */
2697*4882a593Smuzhiyun 	t_u32 key_len;
2698*4882a593Smuzhiyun 	/** Key */
2699*4882a593Smuzhiyun 	t_u8 key_material[MLAN_MAX_KEY_LENGTH];
2700*4882a593Smuzhiyun 	/** mac address */
2701*4882a593Smuzhiyun 	t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
2702*4882a593Smuzhiyun 	/** wapi key flag */
2703*4882a593Smuzhiyun 	t_u32 is_wapi_key;
2704*4882a593Smuzhiyun 	/** Initial packet number */
2705*4882a593Smuzhiyun 	t_u8 pn[PN_SIZE];
2706*4882a593Smuzhiyun 	/** key flags */
2707*4882a593Smuzhiyun 	t_u32 key_flags;
2708*4882a593Smuzhiyun } mlan_ds_encrypt_key, *pmlan_ds_encrypt_key;
2709*4882a593Smuzhiyun 
2710*4882a593Smuzhiyun /** Type definition of mlan_passphrase_t */
2711*4882a593Smuzhiyun typedef struct _mlan_passphrase_t {
2712*4882a593Smuzhiyun 	/** Length of passphrase */
2713*4882a593Smuzhiyun 	t_u32 passphrase_len;
2714*4882a593Smuzhiyun 	/** Passphrase */
2715*4882a593Smuzhiyun 	t_u8 passphrase[MLAN_MAX_PASSPHRASE_LENGTH];
2716*4882a593Smuzhiyun } mlan_passphrase_t;
2717*4882a593Smuzhiyun 
2718*4882a593Smuzhiyun /** Type definition of mlan_sae_password_t */
2719*4882a593Smuzhiyun typedef struct _mlan_sae_password_t {
2720*4882a593Smuzhiyun 	/** Length of SAE Password */
2721*4882a593Smuzhiyun 	t_u32 sae_password_len;
2722*4882a593Smuzhiyun 	/** SAE Password */
2723*4882a593Smuzhiyun 	t_u8 sae_password[MLAN_MAX_SAE_PASSWORD_LENGTH];
2724*4882a593Smuzhiyun } mlan_sae_password_t;
2725*4882a593Smuzhiyun 
2726*4882a593Smuzhiyun /** Type defnition of mlan_pmk_t */
2727*4882a593Smuzhiyun typedef struct _mlan_pmk_t {
2728*4882a593Smuzhiyun 	/** PMK */
2729*4882a593Smuzhiyun 	t_u8 pmk[MLAN_MAX_KEY_LENGTH];
2730*4882a593Smuzhiyun 	t_u8 pmk_r0[MLAN_MAX_KEY_LENGTH];
2731*4882a593Smuzhiyun 	t_u8 pmk_r0_name[MLAN_MAX_PMKR0_NAME_LENGTH];
2732*4882a593Smuzhiyun } mlan_pmk_t;
2733*4882a593Smuzhiyun 
2734*4882a593Smuzhiyun /** Embedded supplicant RSN type: No RSN */
2735*4882a593Smuzhiyun #define RSN_TYPE_NO_RSN MBIT(0)
2736*4882a593Smuzhiyun /** Embedded supplicant RSN type: WPA */
2737*4882a593Smuzhiyun #define RSN_TYPE_WPA MBIT(3)
2738*4882a593Smuzhiyun /** Embedded supplicant RSN type: WPA-NONE */
2739*4882a593Smuzhiyun #define RSN_TYPE_WPANONE MBIT(4)
2740*4882a593Smuzhiyun /** Embedded supplicant RSN type: WPA2 */
2741*4882a593Smuzhiyun #define RSN_TYPE_WPA2 MBIT(5)
2742*4882a593Smuzhiyun /** Embedded supplicant RSN type: RFU */
2743*4882a593Smuzhiyun #define RSN_TYPE_VALID_BITS                                                    \
2744*4882a593Smuzhiyun 	(RSN_TYPE_NO_RSN | RSN_TYPE_WPA | RSN_TYPE_WPANONE | RSN_TYPE_WPA2)
2745*4882a593Smuzhiyun 
2746*4882a593Smuzhiyun /** Embedded supplicant cipher type: TKIP */
2747*4882a593Smuzhiyun #define EMBED_CIPHER_TKIP MBIT(2)
2748*4882a593Smuzhiyun /** Embedded supplicant cipher type: AES */
2749*4882a593Smuzhiyun #define EMBED_CIPHER_AES MBIT(3)
2750*4882a593Smuzhiyun /** Embedded supplicant cipher type: RFU */
2751*4882a593Smuzhiyun #define EMBED_CIPHER_VALID_BITS (EMBED_CIPHER_TKIP | EMBED_CIPHER_AES)
2752*4882a593Smuzhiyun 
2753*4882a593Smuzhiyun /** Type definition of mlan_ds_passphrase for MLAN_OID_SEC_CFG_PASSPHRASE */
2754*4882a593Smuzhiyun typedef struct _mlan_ds_passphrase {
2755*4882a593Smuzhiyun 	/** SSID may be used */
2756*4882a593Smuzhiyun 	mlan_802_11_ssid ssid;
2757*4882a593Smuzhiyun 	/** BSSID may be used */
2758*4882a593Smuzhiyun 	mlan_802_11_mac_addr bssid;
2759*4882a593Smuzhiyun 	/** Flag for passphrase or pmk used */
2760*4882a593Smuzhiyun 	t_u16 psk_type;
2761*4882a593Smuzhiyun 	/** Passphrase or PMK */
2762*4882a593Smuzhiyun 	union {
2763*4882a593Smuzhiyun 		/** Passphrase */
2764*4882a593Smuzhiyun 		mlan_passphrase_t passphrase;
2765*4882a593Smuzhiyun 		/** SAE Password */
2766*4882a593Smuzhiyun 		mlan_sae_password_t sae_password;
2767*4882a593Smuzhiyun 		/** PMK */
2768*4882a593Smuzhiyun 		mlan_pmk_t pmk;
2769*4882a593Smuzhiyun 	} psk;
2770*4882a593Smuzhiyun } mlan_ds_passphrase, *pmlan_ds_passphrase;
2771*4882a593Smuzhiyun 
2772*4882a593Smuzhiyun /** Type definition of mlan_ds_esupp_mode for MLAN_OID_SEC_CFG_ESUPP_MODE */
2773*4882a593Smuzhiyun typedef struct _mlan_ds_ewpa_mode {
2774*4882a593Smuzhiyun 	/** RSN mode */
2775*4882a593Smuzhiyun 	t_u32 rsn_mode;
2776*4882a593Smuzhiyun 	/** Active pairwise cipher */
2777*4882a593Smuzhiyun 	t_u32 act_paircipher;
2778*4882a593Smuzhiyun 	/** Active pairwise cipher */
2779*4882a593Smuzhiyun 	t_u32 act_groupcipher;
2780*4882a593Smuzhiyun } mlan_ds_esupp_mode, *pmlan_ds_esupp_mode;
2781*4882a593Smuzhiyun 
2782*4882a593Smuzhiyun /* Security SSID MAX number support by firmware*/
2783*4882a593Smuzhiyun #define MAX_SEC_SSID_NUM 6
2784*4882a593Smuzhiyun 
2785*4882a593Smuzhiyun /** Type definition of mlan_ds_sec_cfg for MLAN_IOCTL_SEC_CFG */
2786*4882a593Smuzhiyun typedef struct _mlan_ds_sec_cfg {
2787*4882a593Smuzhiyun 	/** Sub-command */
2788*4882a593Smuzhiyun 	t_u32 sub_command;
2789*4882a593Smuzhiyun 	/** Flag to extend some structures to support multiple values.
2790*4882a593Smuzhiyun 	 ** For example, mlan_ds_passphrase can only contain one value,
2791*4882a593Smuzhiyun 	 ** if need use mlan_ds_passphrase[N], just set this flag and
2792*4882a593Smuzhiyun 	 ** use mlan_ds_passphrase[] instead to avoid modify
2793*4882a593Smuzhiyun 	 ** more already exist code.
2794*4882a593Smuzhiyun 	 */
2795*4882a593Smuzhiyun 	t_u8 multi_passphrase;
2796*4882a593Smuzhiyun 	/** Security configuration parameter */
2797*4882a593Smuzhiyun 	union {
2798*4882a593Smuzhiyun 		/** Authentication mode for MLAN_OID_SEC_CFG_AUTH_MODE */
2799*4882a593Smuzhiyun 		t_u32 auth_mode;
2800*4882a593Smuzhiyun 		/** Encryption mode for MLAN_OID_SEC_CFG_ENCRYPT_MODE */
2801*4882a593Smuzhiyun 		t_u32 encrypt_mode;
2802*4882a593Smuzhiyun 		/** WPA enabled flag for MLAN_OID_SEC_CFG_WPA_ENABLED */
2803*4882a593Smuzhiyun 		t_u32 wpa_enabled;
2804*4882a593Smuzhiyun 		/** WAPI enabled flag for MLAN_OID_SEC_CFG_WAPI_ENABLED */
2805*4882a593Smuzhiyun 		t_u32 wapi_enabled;
2806*4882a593Smuzhiyun 		/** Port Control enabled flag for MLAN_OID_SEC_CFG_PORT_CTRL */
2807*4882a593Smuzhiyun 		t_u32 port_ctrl_enabled;
2808*4882a593Smuzhiyun 		/** Encryption key for MLAN_OID_SEC_CFG_ENCRYPT_KEY */
2809*4882a593Smuzhiyun 		mlan_ds_encrypt_key encrypt_key;
2810*4882a593Smuzhiyun 		/** Passphrase for MLAN_OID_SEC_CFG_PASSPHRASE */
2811*4882a593Smuzhiyun 		mlan_ds_passphrase passphrase;
2812*4882a593Smuzhiyun 		/** Embedded supplicant WPA enabled flag for
2813*4882a593Smuzhiyun 		 *  MLAN_OID_SEC_CFG_EWPA_ENABLED
2814*4882a593Smuzhiyun 		 */
2815*4882a593Smuzhiyun 		t_u32 ewpa_enabled;
2816*4882a593Smuzhiyun 		/** Embedded supplicant mode for MLAN_OID_SEC_CFG_ESUPP_MODE */
2817*4882a593Smuzhiyun 		mlan_ds_esupp_mode esupp_mode;
2818*4882a593Smuzhiyun #ifdef UAP_SUPPORT
2819*4882a593Smuzhiyun 		t_u8 sta_mac[MLAN_MAC_ADDR_LENGTH];
2820*4882a593Smuzhiyun #endif
2821*4882a593Smuzhiyun 		mlan_ds_passphrase roam_passphrase[MAX_SEC_SSID_NUM];
2822*4882a593Smuzhiyun 	} param;
2823*4882a593Smuzhiyun } mlan_ds_sec_cfg, *pmlan_ds_sec_cfg;
2824*4882a593Smuzhiyun 
2825*4882a593Smuzhiyun #if defined(DRV_EMBEDDED_AUTHENTICATOR) || defined(DRV_EMBEDDED_SUPPLICANT)
2826*4882a593Smuzhiyun #define BIT_TLV_TYPE_CRYPTO_KEY (1 << 0)
2827*4882a593Smuzhiyun #define BIT_TLV_TYPE_CRYPTO_KEY_IV (1 << 1)
2828*4882a593Smuzhiyun #define BIT_TLV_TYPE_CRYPTO_KEY_PREFIX (1 << 2)
2829*4882a593Smuzhiyun #define BIT_TLV_TYPE_CRYPTO_KEY_DATA_BLK (1 << 3)
2830*4882a593Smuzhiyun 
2831*4882a593Smuzhiyun /** Type definition of mlan_ds_sup_cfg */
2832*4882a593Smuzhiyun typedef struct _mlan_ds_sup_cfg {
2833*4882a593Smuzhiyun 	/** Sub-command */
2834*4882a593Smuzhiyun 	t_u8 sub_command;
2835*4882a593Smuzhiyun 	/** output length */
2836*4882a593Smuzhiyun 	t_u16 output_len;
2837*4882a593Smuzhiyun 	/** number of data blks */
2838*4882a593Smuzhiyun 	t_u16 data_blks_nr;
2839*4882a593Smuzhiyun 	/** sub action code */
2840*4882a593Smuzhiyun 	t_u8 sub_action_code;
2841*4882a593Smuzhiyun 	/** skip bytes */
2842*4882a593Smuzhiyun 	t_u16 skip_bytes;
2843*4882a593Smuzhiyun 	/** iteration */
2844*4882a593Smuzhiyun 	t_u32 iteration;
2845*4882a593Smuzhiyun 	/** count */
2846*4882a593Smuzhiyun 	t_u32 count;
2847*4882a593Smuzhiyun 	/** pointer to output */
2848*4882a593Smuzhiyun 	t_u8 *output;
2849*4882a593Smuzhiyun 	/** key length  */
2850*4882a593Smuzhiyun 	t_u16 key_len;
2851*4882a593Smuzhiyun 	/** pointer to key */
2852*4882a593Smuzhiyun 	t_u8 *key;
2853*4882a593Smuzhiyun 	/** key iv length  */
2854*4882a593Smuzhiyun 	t_u16 key_iv_len;
2855*4882a593Smuzhiyun 	/** pointer to key iv */
2856*4882a593Smuzhiyun 	t_u8 *key_iv;
2857*4882a593Smuzhiyun 	/** key prefix length */
2858*4882a593Smuzhiyun 	t_u16 key_prefix_len;
2859*4882a593Smuzhiyun 	/** pointer to key prefix */
2860*4882a593Smuzhiyun 	t_u8 *key_prefix;
2861*4882a593Smuzhiyun 	/** pointer to data blk length array */
2862*4882a593Smuzhiyun 	t_u32 *key_data_blk_len;
2863*4882a593Smuzhiyun 	/** pointer to key data blk pointer array */
2864*4882a593Smuzhiyun 	t_u8 **key_data_blk;
2865*4882a593Smuzhiyun 	/** callback */
2866*4882a593Smuzhiyun 	t_u8 call_back;
2867*4882a593Smuzhiyun } mlan_ds_sup_cfg, *pmlan_ds_sup_cfg;
2868*4882a593Smuzhiyun #endif
2869*4882a593Smuzhiyun 
2870*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2871*4882a593Smuzhiyun /** Rate Configuration Group */
2872*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2873*4882a593Smuzhiyun /** Enumeration for rate type */
2874*4882a593Smuzhiyun enum _mlan_rate_type { MLAN_RATE_INDEX, MLAN_RATE_VALUE, MLAN_RATE_BITMAP };
2875*4882a593Smuzhiyun 
2876*4882a593Smuzhiyun /** Enumeration for rate format */
2877*4882a593Smuzhiyun enum _mlan_rate_format {
2878*4882a593Smuzhiyun 	MLAN_RATE_FORMAT_LG = 0,
2879*4882a593Smuzhiyun 	MLAN_RATE_FORMAT_HT,
2880*4882a593Smuzhiyun 	MLAN_RATE_FORMAT_VHT,
2881*4882a593Smuzhiyun 	MLAN_RATE_FORMAT_HE,
2882*4882a593Smuzhiyun 	MLAN_RATE_FORMAT_AUTO = 0xFF,
2883*4882a593Smuzhiyun };
2884*4882a593Smuzhiyun 
2885*4882a593Smuzhiyun /** Max bitmap rates size */
2886*4882a593Smuzhiyun #define MAX_BITMAP_RATES_SIZE 26
2887*4882a593Smuzhiyun 
2888*4882a593Smuzhiyun /** Type definition of mlan_rate_cfg_t for MLAN_OID_RATE_CFG */
2889*4882a593Smuzhiyun typedef struct _mlan_rate_cfg_t {
2890*4882a593Smuzhiyun 	/** Fixed rate: 0, auto rate: 1 */
2891*4882a593Smuzhiyun 	t_u32 is_rate_auto;
2892*4882a593Smuzhiyun 	/** Rate type. 0: index; 1: value; 2: bitmap */
2893*4882a593Smuzhiyun 	t_u32 rate_type;
2894*4882a593Smuzhiyun 	/** Rate/MCS index or rate value if fixed rate */
2895*4882a593Smuzhiyun 	t_u32 rate;
2896*4882a593Smuzhiyun 	/** Rate Bitmap */
2897*4882a593Smuzhiyun 	t_u16 bitmap_rates[MAX_BITMAP_RATES_SIZE];
2898*4882a593Smuzhiyun 	/** NSS */
2899*4882a593Smuzhiyun 	t_u32 nss;
2900*4882a593Smuzhiyun 	/* LG rate: 0, HT rate: 1, VHT rate: 2 */
2901*4882a593Smuzhiyun 	t_u32 rate_format;
2902*4882a593Smuzhiyun 	/** Rate Setting */
2903*4882a593Smuzhiyun 	t_u16 rate_setting;
2904*4882a593Smuzhiyun } mlan_rate_cfg_t;
2905*4882a593Smuzhiyun 
2906*4882a593Smuzhiyun /** HT channel bandwidth */
2907*4882a593Smuzhiyun typedef enum _mlan_ht_bw {
2908*4882a593Smuzhiyun 	MLAN_HT_BW20,
2909*4882a593Smuzhiyun 	MLAN_HT_BW40,
2910*4882a593Smuzhiyun 	/** VHT channel bandwidth */
2911*4882a593Smuzhiyun 	MLAN_VHT_BW80,
2912*4882a593Smuzhiyun 	MLAN_VHT_BW160,
2913*4882a593Smuzhiyun } mlan_ht_bw;
2914*4882a593Smuzhiyun 
2915*4882a593Smuzhiyun /** HT guard interval */
2916*4882a593Smuzhiyun typedef enum _mlan_ht_gi {
2917*4882a593Smuzhiyun 	MLAN_HT_LGI,
2918*4882a593Smuzhiyun 	MLAN_HT_SGI,
2919*4882a593Smuzhiyun } mlan_ht_gi;
2920*4882a593Smuzhiyun 
2921*4882a593Smuzhiyun typedef enum _mlan_vht_stbc {
2922*4882a593Smuzhiyun 	MLAN_VHT_STBC,
2923*4882a593Smuzhiyun 	MLAN_VHT_NO_STBC,
2924*4882a593Smuzhiyun } mlan_vht_stbc;
2925*4882a593Smuzhiyun 
2926*4882a593Smuzhiyun typedef enum _mlan_vht_ldpc {
2927*4882a593Smuzhiyun 	MLAN_VHT_LDPC,
2928*4882a593Smuzhiyun 	MLAN_VHT_NO_LDPC,
2929*4882a593Smuzhiyun } mlan_vht_ldpc;
2930*4882a593Smuzhiyun 
2931*4882a593Smuzhiyun /** Band and BSS mode */
2932*4882a593Smuzhiyun typedef struct _mlan_band_data_rate {
2933*4882a593Smuzhiyun 	/** Band configuration */
2934*4882a593Smuzhiyun 	t_u8 config_bands;
2935*4882a593Smuzhiyun 	/** BSS mode (Infra or IBSS) */
2936*4882a593Smuzhiyun 	t_u8 bss_mode;
2937*4882a593Smuzhiyun } mlan_band_data_rate;
2938*4882a593Smuzhiyun 
2939*4882a593Smuzhiyun /** Type definition of mlan_data_rate for MLAN_OID_GET_DATA_RATE */
2940*4882a593Smuzhiyun typedef struct _mlan_data_rate {
2941*4882a593Smuzhiyun 	/** Tx data rate */
2942*4882a593Smuzhiyun 	t_u32 tx_data_rate;
2943*4882a593Smuzhiyun 	/** Rx data rate */
2944*4882a593Smuzhiyun 	t_u32 rx_data_rate;
2945*4882a593Smuzhiyun 
2946*4882a593Smuzhiyun 	/** Tx channel bandwidth */
2947*4882a593Smuzhiyun 	t_u32 tx_ht_bw;
2948*4882a593Smuzhiyun 	/** Tx guard interval */
2949*4882a593Smuzhiyun 	t_u32 tx_ht_gi;
2950*4882a593Smuzhiyun 	/** Rx channel bandwidth */
2951*4882a593Smuzhiyun 	t_u32 rx_ht_bw;
2952*4882a593Smuzhiyun 	/** Rx guard interval */
2953*4882a593Smuzhiyun 	t_u32 rx_ht_gi;
2954*4882a593Smuzhiyun 	/** MCS index */
2955*4882a593Smuzhiyun 	t_u32 tx_mcs_index;
2956*4882a593Smuzhiyun 	t_u32 rx_mcs_index;
2957*4882a593Smuzhiyun 	/** NSS */
2958*4882a593Smuzhiyun 	t_u32 tx_nss;
2959*4882a593Smuzhiyun 	t_u32 rx_nss;
2960*4882a593Smuzhiyun 	/* LG rate: 0, HT rate: 1, VHT rate: 2 */
2961*4882a593Smuzhiyun 	t_u32 tx_rate_format;
2962*4882a593Smuzhiyun 	t_u32 rx_rate_format;
2963*4882a593Smuzhiyun } mlan_data_rate;
2964*4882a593Smuzhiyun 
2965*4882a593Smuzhiyun /** Type definition of mlan_ds_rate for MLAN_IOCTL_RATE */
2966*4882a593Smuzhiyun typedef struct _mlan_ds_rate {
2967*4882a593Smuzhiyun 	/** Sub-command */
2968*4882a593Smuzhiyun 	t_u32 sub_command;
2969*4882a593Smuzhiyun 	/** Rate configuration parameter */
2970*4882a593Smuzhiyun 	union {
2971*4882a593Smuzhiyun 		/** Rate configuration for MLAN_OID_RATE_CFG */
2972*4882a593Smuzhiyun 		mlan_rate_cfg_t rate_cfg;
2973*4882a593Smuzhiyun 		/** Data rate for MLAN_OID_GET_DATA_RATE */
2974*4882a593Smuzhiyun 		mlan_data_rate data_rate;
2975*4882a593Smuzhiyun 		/** Supported rates for MLAN_OID_SUPPORTED_RATES */
2976*4882a593Smuzhiyun 		t_u8 rates[MLAN_SUPPORTED_RATES];
2977*4882a593Smuzhiyun 		/** Band/BSS mode for getting supported rates */
2978*4882a593Smuzhiyun 		mlan_band_data_rate rate_band_cfg;
2979*4882a593Smuzhiyun 	} param;
2980*4882a593Smuzhiyun } mlan_ds_rate, *pmlan_ds_rate;
2981*4882a593Smuzhiyun 
2982*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2983*4882a593Smuzhiyun /** Power Configuration Group */
2984*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
2985*4882a593Smuzhiyun 
2986*4882a593Smuzhiyun /** Type definition of mlan_power_cfg_t for MLAN_OID_POWER_CFG */
2987*4882a593Smuzhiyun typedef struct _mlan_power_cfg_t {
2988*4882a593Smuzhiyun 	/** Is power auto */
2989*4882a593Smuzhiyun 	t_u32 is_power_auto;
2990*4882a593Smuzhiyun 	/** Power level in dBm */
2991*4882a593Smuzhiyun 	t_s32 power_level;
2992*4882a593Smuzhiyun } mlan_power_cfg_t;
2993*4882a593Smuzhiyun 
2994*4882a593Smuzhiyun /** max power table size */
2995*4882a593Smuzhiyun #define MAX_POWER_TABLE_SIZE 128
2996*4882a593Smuzhiyun #define TX_PWR_CFG_AUTO_CTRL_OFF 0xFF
2997*4882a593Smuzhiyun #define MAX_POWER_GROUP 64
2998*4882a593Smuzhiyun /** Type definition of mlan_power group info */
2999*4882a593Smuzhiyun typedef struct mlan_power_group {
3000*4882a593Smuzhiyun 	/** rate format (LG: 0, HT: 1, VHT: 2, no auto ctrl: 0xFF) */
3001*4882a593Smuzhiyun 	t_u32 rate_format;
3002*4882a593Smuzhiyun 	/** bandwidth (LG: 20 MHz, HT: 20/40 MHz, VHT: 80/160/80+80 MHz) */
3003*4882a593Smuzhiyun 	t_u8 bandwidth;
3004*4882a593Smuzhiyun 	/** NSS */
3005*4882a593Smuzhiyun 	t_u32 nss;
3006*4882a593Smuzhiyun 	/** LG: first rate index, HT/VHT: first MCS */
3007*4882a593Smuzhiyun 	t_u8 first_rate_ind;
3008*4882a593Smuzhiyun 	/** LG: last rate index, HT/VHT: last MCS */
3009*4882a593Smuzhiyun 	t_u8 last_rate_ind;
3010*4882a593Smuzhiyun 	/** minmum tx power (dBm) */
3011*4882a593Smuzhiyun 	t_s8 power_min;
3012*4882a593Smuzhiyun 	/** maximum tx power (dBm) */
3013*4882a593Smuzhiyun 	t_s8 power_max;
3014*4882a593Smuzhiyun 	/** tx power step (dB) */
3015*4882a593Smuzhiyun 	t_s8 power_step;
3016*4882a593Smuzhiyun } mlan_power_group;
3017*4882a593Smuzhiyun 
3018*4882a593Smuzhiyun /** Type definition of mlan_power_cfg_ext for MLAN_OID_POWER_CFG_EXT */
3019*4882a593Smuzhiyun typedef struct _mlan_power_cfg_ext {
3020*4882a593Smuzhiyun 	/** number of power_groups */
3021*4882a593Smuzhiyun 	t_u32 num_pwr_grp;
3022*4882a593Smuzhiyun 	/** array of power groups */
3023*4882a593Smuzhiyun 	mlan_power_group power_group[MAX_POWER_GROUP];
3024*4882a593Smuzhiyun } mlan_power_cfg_ext;
3025*4882a593Smuzhiyun 
3026*4882a593Smuzhiyun /** Type definition of mlan_ds_power_cfg for MLAN_IOCTL_POWER_CFG */
3027*4882a593Smuzhiyun typedef struct _mlan_ds_power_cfg {
3028*4882a593Smuzhiyun 	/** Sub-command */
3029*4882a593Smuzhiyun 	t_u32 sub_command;
3030*4882a593Smuzhiyun 	/** Power configuration parameter */
3031*4882a593Smuzhiyun 	union {
3032*4882a593Smuzhiyun 		/** Power configuration for MLAN_OID_POWER_CFG */
3033*4882a593Smuzhiyun 		mlan_power_cfg_t power_cfg;
3034*4882a593Smuzhiyun 		/** Extended power configuration for MLAN_OID_POWER_CFG_EXT */
3035*4882a593Smuzhiyun 		mlan_power_cfg_ext power_ext;
3036*4882a593Smuzhiyun 		/** Low power mode for MLAN_OID_POWER_LOW_POWER_MODE */
3037*4882a593Smuzhiyun 		t_u16 lpm;
3038*4882a593Smuzhiyun 	} param;
3039*4882a593Smuzhiyun } mlan_ds_power_cfg, *pmlan_ds_power_cfg;
3040*4882a593Smuzhiyun 
3041*4882a593Smuzhiyun /** Type definition of mlan_ds_band_steer_cfg for MLAN_IOCTL_POWER_CFG */
3042*4882a593Smuzhiyun typedef struct _mlan_ds_band_steer_cfg {
3043*4882a593Smuzhiyun 	/** Set/Get */
3044*4882a593Smuzhiyun 	t_u8 action;
3045*4882a593Smuzhiyun 	/** enable/disable band steering*/
3046*4882a593Smuzhiyun 	t_u8 state;
3047*4882a593Smuzhiyun 	/** Probe Response will be blocked to 2G channel for first
3048*4882a593Smuzhiyun 	 * block_2g_prb_req probe requests*/
3049*4882a593Smuzhiyun 	t_u8 block_2g_prb_req;
3050*4882a593Smuzhiyun 	/** When band steering is enabled, limit the btm request sent to STA at
3051*4882a593Smuzhiyun 	 * <max_btm_req_allowed>*/
3052*4882a593Smuzhiyun 	t_u8 max_btm_req_allowed;
3053*4882a593Smuzhiyun } mlan_ds_band_steer_cfg, *pmlan_ds_band_steer_cfg;
3054*4882a593Smuzhiyun 
3055*4882a593Smuzhiyun /** Type definition of mlan_ds_beacon_stuck_param_cfg for MLAN_IOCTL_POWER_CFG
3056*4882a593Smuzhiyun  */
3057*4882a593Smuzhiyun typedef struct _mlan_ds_beacon_stuck_param_cfg {
3058*4882a593Smuzhiyun 	/** subcmd */
3059*4882a593Smuzhiyun 	t_u32 subcmd;
3060*4882a593Smuzhiyun 	/** Set/Get */
3061*4882a593Smuzhiyun 	t_u8 action;
3062*4882a593Smuzhiyun 	/** No of beacon interval after which firmware will check if beacon Tx
3063*4882a593Smuzhiyun 	 * is going fine */
3064*4882a593Smuzhiyun 	t_u8 beacon_stuck_detect_count;
3065*4882a593Smuzhiyun 	/** Upon performing MAC reset, no of beacon interval after which
3066*4882a593Smuzhiyun 	 * firmware will check if recovery was successful */
3067*4882a593Smuzhiyun 	t_u8 recovery_confirm_count;
3068*4882a593Smuzhiyun } mlan_ds_beacon_stuck_param_cfg, *pmlan_ds_beacon_stuck_param_cfg;
3069*4882a593Smuzhiyun 
3070*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3071*4882a593Smuzhiyun /** Power Management Configuration Group */
3072*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3073*4882a593Smuzhiyun /** Host sleep config conditions : Cancel */
3074*4882a593Smuzhiyun #define HOST_SLEEP_CFG_CANCEL 0xffffffff
3075*4882a593Smuzhiyun 
3076*4882a593Smuzhiyun /** Host sleep config condition: broadcast data */
3077*4882a593Smuzhiyun #define HOST_SLEEP_COND_BROADCAST_DATA MBIT(0)
3078*4882a593Smuzhiyun /** Host sleep config condition: unicast data */
3079*4882a593Smuzhiyun #define HOST_SLEEP_COND_UNICAST_DATA MBIT(1)
3080*4882a593Smuzhiyun /** Host sleep config condition: mac event */
3081*4882a593Smuzhiyun #define HOST_SLEEP_COND_MAC_EVENT MBIT(2)
3082*4882a593Smuzhiyun /** Host sleep config condition: multicast data */
3083*4882a593Smuzhiyun #define HOST_SLEEP_COND_MULTICAST_DATA MBIT(3)
3084*4882a593Smuzhiyun /** Host sleep config condition: IPV6 packet */
3085*4882a593Smuzhiyun #define HOST_SLEEP_COND_IPV6_PACKET MBIT(31)
3086*4882a593Smuzhiyun 
3087*4882a593Smuzhiyun /** Host sleep config conditions: Default */
3088*4882a593Smuzhiyun #define HOST_SLEEP_DEF_COND                                                    \
3089*4882a593Smuzhiyun 	(HOST_SLEEP_COND_BROADCAST_DATA | HOST_SLEEP_COND_UNICAST_DATA |       \
3090*4882a593Smuzhiyun 	 HOST_SLEEP_COND_MAC_EVENT)
3091*4882a593Smuzhiyun 
3092*4882a593Smuzhiyun /** Host sleep config GPIO : Default */
3093*4882a593Smuzhiyun #define HOST_SLEEP_DEF_GPIO 0xff
3094*4882a593Smuzhiyun /** Host sleep config gap : Default */
3095*4882a593Smuzhiyun #define HOST_SLEEP_DEF_GAP 200
3096*4882a593Smuzhiyun /** Host sleep config min wake holdoff */
3097*4882a593Smuzhiyun #define HOST_SLEEP_DEF_WAKE_HOLDOFF 0;
3098*4882a593Smuzhiyun /** Host sleep config inactivity timeout */
3099*4882a593Smuzhiyun #define HOST_SLEEP_DEF_INACTIVITY_TIMEOUT 10;
3100*4882a593Smuzhiyun 
3101*4882a593Smuzhiyun /** Type definition of mlan_ds_hs_cfg for MLAN_OID_PM_CFG_HS_CFG */
3102*4882a593Smuzhiyun typedef struct _mlan_ds_hs_cfg {
3103*4882a593Smuzhiyun 	/** MTRUE to invoke the HostCmd, MFALSE otherwise */
3104*4882a593Smuzhiyun 	t_u32 is_invoke_hostcmd;
3105*4882a593Smuzhiyun 	/** Host sleep config condition */
3106*4882a593Smuzhiyun 	/** Bit0: broadcast data
3107*4882a593Smuzhiyun 	 *  Bit1: unicast data
3108*4882a593Smuzhiyun 	 *  Bit2: mac event
3109*4882a593Smuzhiyun 	 *  Bit3: multicast data
3110*4882a593Smuzhiyun 	 */
3111*4882a593Smuzhiyun 	t_u32 conditions;
3112*4882a593Smuzhiyun 	/** GPIO pin or 0xff for interface */
3113*4882a593Smuzhiyun 	t_u32 gpio;
3114*4882a593Smuzhiyun 	/** Gap in milliseconds or or 0xff for special
3115*4882a593Smuzhiyun 	 *  setting when GPIO is used to wakeup host
3116*4882a593Smuzhiyun 	 */
3117*4882a593Smuzhiyun 	t_u32 gap;
3118*4882a593Smuzhiyun 	/** Host sleep wake interval */
3119*4882a593Smuzhiyun 	t_u32 hs_wake_interval;
3120*4882a593Smuzhiyun 	/** Parameter type for indication gpio*/
3121*4882a593Smuzhiyun 	t_u8 param_type_ind;
3122*4882a593Smuzhiyun 	/** GPIO pin for indication wakeup source */
3123*4882a593Smuzhiyun 	t_u32 ind_gpio;
3124*4882a593Smuzhiyun 	/** Level on ind_gpio pin for indication normal wakeup source */
3125*4882a593Smuzhiyun 	t_u32 level;
3126*4882a593Smuzhiyun 	/** Parameter type for extend hscfg*/
3127*4882a593Smuzhiyun 	t_u8 param_type_ext;
3128*4882a593Smuzhiyun 	/** Events that will be forced ignore*/
3129*4882a593Smuzhiyun 	t_u32 event_force_ignore;
3130*4882a593Smuzhiyun 	/** Events that will use extend gap to inform host*/
3131*4882a593Smuzhiyun 	t_u32 event_use_ext_gap;
3132*4882a593Smuzhiyun 	/** Ext gap*/
3133*4882a593Smuzhiyun 	t_u8 ext_gap;
3134*4882a593Smuzhiyun 	/** GPIO wave level for extend hscfg*/
3135*4882a593Smuzhiyun 	t_u8 gpio_wave;
3136*4882a593Smuzhiyun 	/** Minimum delay between HsActive and HostWake (in msec) */
3137*4882a593Smuzhiyun 	t_u16 min_wake_holdoff;
3138*4882a593Smuzhiyun } mlan_ds_hs_cfg, *pmlan_ds_hs_cfg;
3139*4882a593Smuzhiyun 
3140*4882a593Smuzhiyun #define MAX_MGMT_FRAME_FILTER 2
3141*4882a593Smuzhiyun typedef struct _mlan_mgmt_frame_wakeup {
3142*4882a593Smuzhiyun 	/** action - bitmap
3143*4882a593Smuzhiyun 	 ** On matching rx'd pkt and filter during NON_HOSTSLEEP mode:
3144*4882a593Smuzhiyun 	 **   Action[1]=0  Discard
3145*4882a593Smuzhiyun 	 **   Action[1]=1  Allow
3146*4882a593Smuzhiyun 	 ** Note that default action on non-match is "Allow".
3147*4882a593Smuzhiyun 	 **
3148*4882a593Smuzhiyun 	 ** On matching rx'd pkt and filter during HOSTSLEEP mode:
3149*4882a593Smuzhiyun 	 **   Action[1:0]=00  Discard and Not Wake host
3150*4882a593Smuzhiyun 	 **   Action[1:0]=01  Discard and Wake host
3151*4882a593Smuzhiyun 	 **   Action[1:0]=10  Invalid
3152*4882a593Smuzhiyun 	 ** Note that default action on non-match is "Discard and Not Wake
3153*4882a593Smuzhiyun 	 *host".
3154*4882a593Smuzhiyun 	 **/
3155*4882a593Smuzhiyun 	t_u32 action;
3156*4882a593Smuzhiyun 	/** Frame type(p2p, tdls...)
3157*4882a593Smuzhiyun 	 ** type=0: invalid
3158*4882a593Smuzhiyun 	 ** type=1: p2p
3159*4882a593Smuzhiyun 	 ** type=others: reserved
3160*4882a593Smuzhiyun 	 **/
3161*4882a593Smuzhiyun 	t_u32 type;
3162*4882a593Smuzhiyun 	/** Frame mask according to each type
3163*4882a593Smuzhiyun 	 ** When type=1 for p2p, frame-mask have following define:
3164*4882a593Smuzhiyun 	 **    Bit      Frame
3165*4882a593Smuzhiyun 	 **     0       GO Negotiation Request
3166*4882a593Smuzhiyun 	 **     1       GO Negotiation Response
3167*4882a593Smuzhiyun 	 **     2       GO Negotiation Confirmation
3168*4882a593Smuzhiyun 	 **     3       P2P Invitation Request
3169*4882a593Smuzhiyun 	 **     4       P2P Invitation Response
3170*4882a593Smuzhiyun 	 **     5       Device Discoverability Request
3171*4882a593Smuzhiyun 	 **     6       Device Discoverability Response
3172*4882a593Smuzhiyun 	 **     7       Provision Discovery Request
3173*4882a593Smuzhiyun 	 **     8       Provision Discovery Response
3174*4882a593Smuzhiyun 	 **     9       Notice of Absence
3175*4882a593Smuzhiyun 	 **     10      P2P Presence Request
3176*4882a593Smuzhiyun 	 **     11      P2P Presence Response
3177*4882a593Smuzhiyun 	 **     12      GO Discoverability Request
3178*4882a593Smuzhiyun 	 **     13-31   Reserved
3179*4882a593Smuzhiyun 	 **
3180*4882a593Smuzhiyun 	 ** When type=others, frame-mask is reserved.
3181*4882a593Smuzhiyun 	 **/
3182*4882a593Smuzhiyun 	t_u32 frame_mask;
3183*4882a593Smuzhiyun } mlan_mgmt_frame_wakeup, *pmlan_mgmt_frame_wakeup;
3184*4882a593Smuzhiyun 
3185*4882a593Smuzhiyun /** Enable deep sleep mode */
3186*4882a593Smuzhiyun #define DEEP_SLEEP_ON 1
3187*4882a593Smuzhiyun /** Disable deep sleep mode */
3188*4882a593Smuzhiyun #define DEEP_SLEEP_OFF 0
3189*4882a593Smuzhiyun 
3190*4882a593Smuzhiyun /** Default idle time in milliseconds for auto deep sleep */
3191*4882a593Smuzhiyun #define DEEP_SLEEP_IDLE_TIME 100
3192*4882a593Smuzhiyun 
3193*4882a593Smuzhiyun typedef struct _mlan_ds_auto_ds {
3194*4882a593Smuzhiyun 	/** auto ds mode, 0 - disable, 1 - enable */
3195*4882a593Smuzhiyun 	t_u16 auto_ds;
3196*4882a593Smuzhiyun 	/** auto ds idle time in milliseconds */
3197*4882a593Smuzhiyun 	t_u16 idletime;
3198*4882a593Smuzhiyun } mlan_ds_auto_ds;
3199*4882a593Smuzhiyun 
3200*4882a593Smuzhiyun /** Type definition of mlan_ds_inactivity_to
3201*4882a593Smuzhiyun  *  for MLAN_OID_PM_CFG_INACTIVITY_TO
3202*4882a593Smuzhiyun  */
3203*4882a593Smuzhiyun typedef struct _mlan_ds_inactivity_to {
3204*4882a593Smuzhiyun 	/** Timeout unit in microsecond, 0 means 1000us (1ms) */
3205*4882a593Smuzhiyun 	t_u32 timeout_unit;
3206*4882a593Smuzhiyun 	/** Inactivity timeout for unicast data */
3207*4882a593Smuzhiyun 	t_u32 unicast_timeout;
3208*4882a593Smuzhiyun 	/** Inactivity timeout for multicast data */
3209*4882a593Smuzhiyun 	t_u32 mcast_timeout;
3210*4882a593Smuzhiyun 	/** Timeout for additional Rx traffic after Null PM1 packet exchange */
3211*4882a593Smuzhiyun 	t_u32 ps_entry_timeout;
3212*4882a593Smuzhiyun } mlan_ds_inactivity_to, *pmlan_ds_inactivity_to;
3213*4882a593Smuzhiyun 
3214*4882a593Smuzhiyun /** Minimum sleep period in milliseconds */
3215*4882a593Smuzhiyun #define MIN_SLEEP_PERIOD 10
3216*4882a593Smuzhiyun /** Maximum sleep period in milliseconds */
3217*4882a593Smuzhiyun #define MAX_SLEEP_PERIOD 60
3218*4882a593Smuzhiyun /** Special setting for UPSD certification tests */
3219*4882a593Smuzhiyun #define SLEEP_PERIOD_RESERVED_FF 0xFF
3220*4882a593Smuzhiyun 
3221*4882a593Smuzhiyun /** PS null interval disable */
3222*4882a593Smuzhiyun #define PS_NULL_DISABLE (-1)
3223*4882a593Smuzhiyun 
3224*4882a593Smuzhiyun /** Local listen interval disable */
3225*4882a593Smuzhiyun #define MRVDRV_LISTEN_INTERVAL_DISABLE (-1)
3226*4882a593Smuzhiyun /** Minimum listen interval */
3227*4882a593Smuzhiyun #define MRVDRV_MIN_LISTEN_INTERVAL 0
3228*4882a593Smuzhiyun 
3229*4882a593Smuzhiyun /** Minimum multiple DTIM */
3230*4882a593Smuzhiyun #define MRVDRV_MIN_MULTIPLE_DTIM 0
3231*4882a593Smuzhiyun /** Maximum multiple DTIM */
3232*4882a593Smuzhiyun #define MRVDRV_MAX_MULTIPLE_DTIM 5
3233*4882a593Smuzhiyun /** Ignore multiple DTIM */
3234*4882a593Smuzhiyun #define MRVDRV_IGNORE_MULTIPLE_DTIM 0xfffe
3235*4882a593Smuzhiyun /** Match listen interval to closest DTIM */
3236*4882a593Smuzhiyun #define MRVDRV_MATCH_CLOSEST_DTIM 0xfffd
3237*4882a593Smuzhiyun 
3238*4882a593Smuzhiyun /** Minimum beacon miss timeout in milliseconds */
3239*4882a593Smuzhiyun #define MIN_BCN_MISS_TO 0
3240*4882a593Smuzhiyun /** Maximum beacon miss timeout in milliseconds */
3241*4882a593Smuzhiyun #define MAX_BCN_MISS_TO 50
3242*4882a593Smuzhiyun /** Disable beacon miss timeout */
3243*4882a593Smuzhiyun #define DISABLE_BCN_MISS_TO 65535
3244*4882a593Smuzhiyun 
3245*4882a593Smuzhiyun /** Minimum delay to PS in milliseconds */
3246*4882a593Smuzhiyun #define MIN_DELAY_TO_PS 0
3247*4882a593Smuzhiyun /** Maximum delay to PS in milliseconds */
3248*4882a593Smuzhiyun #define MAX_DELAY_TO_PS 65535
3249*4882a593Smuzhiyun /** Delay to PS unchanged */
3250*4882a593Smuzhiyun #define DELAY_TO_PS_UNCHANGED (-1)
3251*4882a593Smuzhiyun /** Default delay to PS in milliseconds */
3252*4882a593Smuzhiyun #define DELAY_TO_PS_DEFAULT 1000
3253*4882a593Smuzhiyun 
3254*4882a593Smuzhiyun /** PS mode: Unchanged */
3255*4882a593Smuzhiyun #define PS_MODE_UNCHANGED 0
3256*4882a593Smuzhiyun /** PS mode: Auto */
3257*4882a593Smuzhiyun #define PS_MODE_AUTO 1
3258*4882a593Smuzhiyun /** PS mode: Poll */
3259*4882a593Smuzhiyun #define PS_MODE_POLL 2
3260*4882a593Smuzhiyun /** PS mode: Null */
3261*4882a593Smuzhiyun #define PS_MODE_NULL 3
3262*4882a593Smuzhiyun 
3263*4882a593Smuzhiyun /** Type definition of mlan_ds_ps_cfg for MLAN_OID_PM_CFG_PS_CFG */
3264*4882a593Smuzhiyun typedef struct _mlan_ds_ps_cfg {
3265*4882a593Smuzhiyun 	/** PS null interval in seconds */
3266*4882a593Smuzhiyun 	t_u32 ps_null_interval;
3267*4882a593Smuzhiyun 	/** Multiple DTIM interval */
3268*4882a593Smuzhiyun 	t_u32 multiple_dtim_interval;
3269*4882a593Smuzhiyun 	/** Listen interval */
3270*4882a593Smuzhiyun 	t_u32 listen_interval;
3271*4882a593Smuzhiyun 	/** Beacon miss timeout in milliseconds */
3272*4882a593Smuzhiyun 	t_u32 bcn_miss_timeout;
3273*4882a593Smuzhiyun 	/** Delay to PS in milliseconds */
3274*4882a593Smuzhiyun 	t_s32 delay_to_ps;
3275*4882a593Smuzhiyun 	/** PS mode */
3276*4882a593Smuzhiyun 	t_u32 ps_mode;
3277*4882a593Smuzhiyun } mlan_ds_ps_cfg, *pmlan_ds_ps_cfg;
3278*4882a593Smuzhiyun 
3279*4882a593Smuzhiyun /** Type definition of mlan_ds_sleep_params for MLAN_OID_PM_CFG_SLEEP_PARAMS */
3280*4882a593Smuzhiyun typedef struct _mlan_ds_sleep_params {
3281*4882a593Smuzhiyun 	/** Error */
3282*4882a593Smuzhiyun 	t_u32 error;
3283*4882a593Smuzhiyun 	/** Offset in microseconds */
3284*4882a593Smuzhiyun 	t_u32 offset;
3285*4882a593Smuzhiyun 	/** Stable time in microseconds */
3286*4882a593Smuzhiyun 	t_u32 stable_time;
3287*4882a593Smuzhiyun 	/** Calibration control */
3288*4882a593Smuzhiyun 	t_u32 cal_control;
3289*4882a593Smuzhiyun 	/** External sleep clock */
3290*4882a593Smuzhiyun 	t_u32 ext_sleep_clk;
3291*4882a593Smuzhiyun 	/** Reserved */
3292*4882a593Smuzhiyun 	t_u32 reserved;
3293*4882a593Smuzhiyun } mlan_ds_sleep_params, *pmlan_ds_sleep_params;
3294*4882a593Smuzhiyun 
3295*4882a593Smuzhiyun /** sleep_param */
3296*4882a593Smuzhiyun typedef struct _ps_sleep_param {
3297*4882a593Smuzhiyun 	/** control bitmap */
3298*4882a593Smuzhiyun 	t_u32 ctrl_bitmap;
3299*4882a593Smuzhiyun 	/** minimum sleep period (micro second) */
3300*4882a593Smuzhiyun 	t_u32 min_sleep;
3301*4882a593Smuzhiyun 	/** maximum sleep period (micro second) */
3302*4882a593Smuzhiyun 	t_u32 max_sleep;
3303*4882a593Smuzhiyun } ps_sleep_param;
3304*4882a593Smuzhiyun 
3305*4882a593Smuzhiyun /** inactivity sleep_param */
3306*4882a593Smuzhiyun typedef struct _inact_sleep_param {
3307*4882a593Smuzhiyun 	/** inactivity timeout (micro second) */
3308*4882a593Smuzhiyun 	t_u32 inactivity_to;
3309*4882a593Smuzhiyun 	/** miniumu awake period (micro second) */
3310*4882a593Smuzhiyun 	t_u32 min_awake;
3311*4882a593Smuzhiyun 	/** maximum awake period (micro second) */
3312*4882a593Smuzhiyun 	t_u32 max_awake;
3313*4882a593Smuzhiyun } inact_sleep_param;
3314*4882a593Smuzhiyun 
3315*4882a593Smuzhiyun /** flag for ps mode */
3316*4882a593Smuzhiyun #define PS_FLAG_PS_MODE 1
3317*4882a593Smuzhiyun /** flag for sleep param */
3318*4882a593Smuzhiyun #define PS_FLAG_SLEEP_PARAM 2
3319*4882a593Smuzhiyun /** flag for inactivity sleep param */
3320*4882a593Smuzhiyun #define PS_FLAG_INACT_SLEEP_PARAM 4
3321*4882a593Smuzhiyun 
3322*4882a593Smuzhiyun /** Enable Robust Coex mode */
3323*4882a593Smuzhiyun #define ROBUSTCOEX_GPIOCFG_ENABLE 1
3324*4882a593Smuzhiyun /** Disable Robust Coex mode */
3325*4882a593Smuzhiyun #define ROBUSTCOEX_GPIOCFG_DISABLE 0
3326*4882a593Smuzhiyun 
3327*4882a593Smuzhiyun /** Disable power mode */
3328*4882a593Smuzhiyun #define PS_MODE_DISABLE 0
3329*4882a593Smuzhiyun /** Enable periodic dtim ps */
3330*4882a593Smuzhiyun #define PS_MODE_PERIODIC_DTIM 1
3331*4882a593Smuzhiyun /** Enable inactivity ps */
3332*4882a593Smuzhiyun #define PS_MODE_INACTIVITY 2
3333*4882a593Smuzhiyun /** FW wake up method interface */
3334*4882a593Smuzhiyun #define FW_WAKEUP_METHOD_INTERFACE 1
3335*4882a593Smuzhiyun /** FW wake up method gpio */
3336*4882a593Smuzhiyun #define FW_WAKEUP_METHOD_GPIO 2
3337*4882a593Smuzhiyun /** mlan_ds_ps_mgmt */
3338*4882a593Smuzhiyun typedef struct _mlan_ds_ps_mgmt {
3339*4882a593Smuzhiyun 	/** flags for valid field */
3340*4882a593Smuzhiyun 	t_u16 flags;
3341*4882a593Smuzhiyun 	/** power mode */
3342*4882a593Smuzhiyun 	t_u16 ps_mode;
3343*4882a593Smuzhiyun 	/** sleep param */
3344*4882a593Smuzhiyun 	ps_sleep_param sleep_param;
3345*4882a593Smuzhiyun 	/** inactivity sleep param */
3346*4882a593Smuzhiyun 	inact_sleep_param inact_param;
3347*4882a593Smuzhiyun } mlan_ds_ps_mgmt;
3348*4882a593Smuzhiyun 
3349*4882a593Smuzhiyun /** mlan_ds_ps_info */
3350*4882a593Smuzhiyun typedef struct _mlan_ds_ps_info {
3351*4882a593Smuzhiyun 	/** suspend allowed flag */
3352*4882a593Smuzhiyun 	t_u32 is_suspend_allowed;
3353*4882a593Smuzhiyun } mlan_ds_ps_info;
3354*4882a593Smuzhiyun 
3355*4882a593Smuzhiyun /** Type definition of mlan_ds_wakeup_reason for MLAN_OID_PM_HS_WAKEUP_REASON */
3356*4882a593Smuzhiyun typedef struct _mlan_ds_hs_wakeup_reason {
3357*4882a593Smuzhiyun 	t_u16 hs_wakeup_reason;
3358*4882a593Smuzhiyun } mlan_ds_hs_wakeup_reason;
3359*4882a593Smuzhiyun 
3360*4882a593Smuzhiyun /** Type definition of mlan_ds_ps_cfg for MLAN_OID_PM_CFG_PS_CFG */
3361*4882a593Smuzhiyun typedef struct _mlan_ds_bcn_timeout {
3362*4882a593Smuzhiyun 	/** Beacon miss timeout period window */
3363*4882a593Smuzhiyun 	t_u16 bcn_miss_tmo_window;
3364*4882a593Smuzhiyun 	/** Beacon miss timeout period */
3365*4882a593Smuzhiyun 	t_u16 bcn_miss_tmo_period;
3366*4882a593Smuzhiyun 	/** Beacon reacquire timeout period window */
3367*4882a593Smuzhiyun 	t_u16 bcn_rq_tmo_window;
3368*4882a593Smuzhiyun 	/** Beacon reacquire timeout period */
3369*4882a593Smuzhiyun 	t_u16 bcn_rq_tmo_period;
3370*4882a593Smuzhiyun } mlan_ds_bcn_timeout, *pmlan_ds_bcn_timeout;
3371*4882a593Smuzhiyun 
3372*4882a593Smuzhiyun /** Type definition of mlan_ds_pm_cfg for MLAN_IOCTL_PM_CFG */
3373*4882a593Smuzhiyun typedef struct _mlan_ds_pm_cfg {
3374*4882a593Smuzhiyun 	/** Sub-command */
3375*4882a593Smuzhiyun 	t_u32 sub_command;
3376*4882a593Smuzhiyun 	/** Power management parameter */
3377*4882a593Smuzhiyun 	union {
3378*4882a593Smuzhiyun 		/** Power saving mode for MLAN_OID_PM_CFG_IEEE_PS */
3379*4882a593Smuzhiyun 		t_u32 ps_mode;
3380*4882a593Smuzhiyun 		/** Host Sleep configuration for MLAN_OID_PM_CFG_HS_CFG */
3381*4882a593Smuzhiyun 		mlan_ds_hs_cfg hs_cfg;
3382*4882a593Smuzhiyun 		/** Deep sleep mode for MLAN_OID_PM_CFG_DEEP_SLEEP */
3383*4882a593Smuzhiyun 		mlan_ds_auto_ds auto_deep_sleep;
3384*4882a593Smuzhiyun 		/** Inactivity timeout for MLAN_OID_PM_CFG_INACTIVITY_TO */
3385*4882a593Smuzhiyun 		mlan_ds_inactivity_to inactivity_to;
3386*4882a593Smuzhiyun 		/** Sleep period for MLAN_OID_PM_CFG_SLEEP_PD */
3387*4882a593Smuzhiyun 		t_u32 sleep_period;
3388*4882a593Smuzhiyun 		/** PS configuration parameters for MLAN_OID_PM_CFG_PS_CFG */
3389*4882a593Smuzhiyun 		mlan_ds_ps_cfg ps_cfg;
3390*4882a593Smuzhiyun 		/** PS configuration parameters for MLAN_OID_PM_CFG_SLEEP_PARAMS
3391*4882a593Smuzhiyun 		 */
3392*4882a593Smuzhiyun 		mlan_ds_sleep_params sleep_params;
3393*4882a593Smuzhiyun 		/** PS configuration parameters for MLAN_OID_PM_CFG_PS_MODE */
3394*4882a593Smuzhiyun 		mlan_ds_ps_mgmt ps_mgmt;
3395*4882a593Smuzhiyun 		/** power info for MLAN_OID_PM_INFO */
3396*4882a593Smuzhiyun 		mlan_ds_ps_info ps_info;
3397*4882a593Smuzhiyun 		/** hs wakeup reason for MLAN_OID_PM_HS_WAKEUP_REASON */
3398*4882a593Smuzhiyun 		mlan_ds_hs_wakeup_reason wakeup_reason;
3399*4882a593Smuzhiyun 		/** config manamgement frame for hs wakeup */
3400*4882a593Smuzhiyun 		mlan_mgmt_frame_wakeup mgmt_filter[MAX_MGMT_FRAME_FILTER];
3401*4882a593Smuzhiyun 		/** Beacon timout parameters for MLAN_OID_PM_CFG_BCN_TIMEOUT */
3402*4882a593Smuzhiyun 		mlan_ds_bcn_timeout bcn_timeout;
3403*4882a593Smuzhiyun 	} param;
3404*4882a593Smuzhiyun } mlan_ds_pm_cfg, *pmlan_ds_pm_cfg;
3405*4882a593Smuzhiyun 
3406*4882a593Smuzhiyun #ifdef RX_PACKET_COALESCE
3407*4882a593Smuzhiyun typedef struct {
3408*4882a593Smuzhiyun 	mlan_cmd_result_e cmd_result; /**< Firmware execution result */
3409*4882a593Smuzhiyun 
3410*4882a593Smuzhiyun 	t_u32 pkt_threshold; /** Packet threshold */
3411*4882a593Smuzhiyun 	t_u16 delay; /** Timeout value in milliseconds */
3412*4882a593Smuzhiyun } wlan_ioctl_rx_pkt_coalesce_config_t;
3413*4882a593Smuzhiyun #endif
3414*4882a593Smuzhiyun 
3415*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3416*4882a593Smuzhiyun /** WMM Configuration Group */
3417*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3418*4882a593Smuzhiyun 
3419*4882a593Smuzhiyun /** WMM TSpec size */
3420*4882a593Smuzhiyun #define MLAN_WMM_TSPEC_SIZE 63
3421*4882a593Smuzhiyun /** WMM Add TS extra IE bytes */
3422*4882a593Smuzhiyun #define MLAN_WMM_ADDTS_EXTRA_IE_BYTES 256
3423*4882a593Smuzhiyun /** WMM statistics for packets hist bins */
3424*4882a593Smuzhiyun #define MLAN_WMM_STATS_PKTS_HIST_BINS 7
3425*4882a593Smuzhiyun /** Maximum number of AC QOS queues available */
3426*4882a593Smuzhiyun #define MLAN_WMM_MAX_AC_QUEUES 4
3427*4882a593Smuzhiyun 
3428*4882a593Smuzhiyun /**
3429*4882a593Smuzhiyun  *  @brief IOCTL structure to send an ADDTS request and retrieve the response.
3430*4882a593Smuzhiyun  *
3431*4882a593Smuzhiyun  *  IOCTL structure from the application layer relayed to firmware to
3432*4882a593Smuzhiyun  *    instigate an ADDTS management frame with an appropriate TSPEC IE as well
3433*4882a593Smuzhiyun  *    as any additional IEs appended in the ADDTS Action frame.
3434*4882a593Smuzhiyun  *
3435*4882a593Smuzhiyun  *  @sa woal_wmm_addts_req_ioctl
3436*4882a593Smuzhiyun  */
3437*4882a593Smuzhiyun typedef struct {
3438*4882a593Smuzhiyun 	mlan_cmd_result_e cmd_result; /**< Firmware execution result */
3439*4882a593Smuzhiyun 
3440*4882a593Smuzhiyun 	t_u32 timeout_ms; /**< Timeout value in milliseconds */
3441*4882a593Smuzhiyun 	t_u8 ieee_status_code; /**< IEEE status code */
3442*4882a593Smuzhiyun 
3443*4882a593Smuzhiyun 	t_u32 ie_data_len; /**< Length of ie block in ie_data */
3444*4882a593Smuzhiyun 	t_u8 ie_data[MLAN_WMM_TSPEC_SIZE /**< TSPEC to send in the ADDTS */
3445*4882a593Smuzhiyun 		     + MLAN_WMM_ADDTS_EXTRA_IE_BYTES]; /**< Extra IE buf*/
3446*4882a593Smuzhiyun } wlan_ioctl_wmm_addts_req_t;
3447*4882a593Smuzhiyun 
3448*4882a593Smuzhiyun /**
3449*4882a593Smuzhiyun  *  @brief IOCTL structure to send a DELTS request.
3450*4882a593Smuzhiyun  *
3451*4882a593Smuzhiyun  *  IOCTL structure from the application layer relayed to firmware to
3452*4882a593Smuzhiyun  *    instigate an DELTS management frame with an appropriate TSPEC IE.
3453*4882a593Smuzhiyun  *
3454*4882a593Smuzhiyun  *  @sa woal_wmm_delts_req_ioctl
3455*4882a593Smuzhiyun  */
3456*4882a593Smuzhiyun typedef struct {
3457*4882a593Smuzhiyun 	mlan_cmd_result_e cmd_result; /**< Firmware execution result */
3458*4882a593Smuzhiyun 	t_u8 ieee_reason_code; /**< IEEE reason code sent, unused for WMM */
3459*4882a593Smuzhiyun 	t_u32 ie_data_len; /**< Length of ie block in ie_data */
3460*4882a593Smuzhiyun 	t_u8 ie_data[MLAN_WMM_TSPEC_SIZE]; /**< TSPEC to send in the DELTS */
3461*4882a593Smuzhiyun } wlan_ioctl_wmm_delts_req_t;
3462*4882a593Smuzhiyun 
3463*4882a593Smuzhiyun /**
3464*4882a593Smuzhiyun  *  @brief IOCTL structure to configure a specific AC Queue's parameters
3465*4882a593Smuzhiyun  *
3466*4882a593Smuzhiyun  *  IOCTL structure from the application layer relayed to firmware to
3467*4882a593Smuzhiyun  *    get, set, or default the WMM AC queue parameters.
3468*4882a593Smuzhiyun  *
3469*4882a593Smuzhiyun  *  - msdu_lifetime_expiry is ignored if set to 0 on a set command
3470*4882a593Smuzhiyun  *
3471*4882a593Smuzhiyun  *  @sa woal_wmm_queue_config_ioctl
3472*4882a593Smuzhiyun  */
3473*4882a593Smuzhiyun typedef struct {
3474*4882a593Smuzhiyun 	mlan_wmm_queue_config_action_e action; /**< Set, Get, or Default */
3475*4882a593Smuzhiyun 	mlan_wmm_ac_e access_category; /**< WMM_AC_BK(0) to WMM_AC_VO(3) */
3476*4882a593Smuzhiyun 	t_u16 msdu_lifetime_expiry; /**< lifetime expiry in TUs */
3477*4882a593Smuzhiyun 	t_u8 supported_rates[10]; /**< Not supported yet */
3478*4882a593Smuzhiyun } wlan_ioctl_wmm_queue_config_t;
3479*4882a593Smuzhiyun 
3480*4882a593Smuzhiyun /**
3481*4882a593Smuzhiyun  *  @brief IOCTL structure to start, stop, and get statistics for a WMM AC
3482*4882a593Smuzhiyun  *
3483*4882a593Smuzhiyun  *  IOCTL structure from the application layer relayed to firmware to
3484*4882a593Smuzhiyun  *    start or stop statistical collection for a given AC.  Also used to
3485*4882a593Smuzhiyun  *    retrieve and clear the collected stats on a given AC.
3486*4882a593Smuzhiyun  *
3487*4882a593Smuzhiyun  *  @sa woal_wmm_queue_stats_ioctl
3488*4882a593Smuzhiyun  */
3489*4882a593Smuzhiyun typedef struct {
3490*4882a593Smuzhiyun 	/** Action of Queue Config : Start, Stop, or Get */
3491*4882a593Smuzhiyun 	mlan_wmm_queue_stats_action_e action;
3492*4882a593Smuzhiyun 	/** User Priority */
3493*4882a593Smuzhiyun 	t_u8 user_priority;
3494*4882a593Smuzhiyun 	/** Number of successful packets transmitted */
3495*4882a593Smuzhiyun 	t_u16 pkt_count;
3496*4882a593Smuzhiyun 	/** Packets lost; not included in pkt_count */
3497*4882a593Smuzhiyun 	t_u16 pkt_loss;
3498*4882a593Smuzhiyun 	/** Average Queue delay in microseconds */
3499*4882a593Smuzhiyun 	t_u32 avg_queue_delay;
3500*4882a593Smuzhiyun 	/** Average Transmission delay in microseconds */
3501*4882a593Smuzhiyun 	t_u32 avg_tx_delay;
3502*4882a593Smuzhiyun 	/** Calculated used time in units of 32 microseconds */
3503*4882a593Smuzhiyun 	t_u16 used_time;
3504*4882a593Smuzhiyun 	/** Calculated policed time in units of 32 microseconds */
3505*4882a593Smuzhiyun 	t_u16 policed_time;
3506*4882a593Smuzhiyun 	/** Queue Delay Histogram; number of packets per queue delay range
3507*4882a593Smuzhiyun 	 *
3508*4882a593Smuzhiyun 	 *  [0] -  0ms <= delay < 5ms
3509*4882a593Smuzhiyun 	 *  [1] -  5ms <= delay < 10ms
3510*4882a593Smuzhiyun 	 *  [2] - 10ms <= delay < 20ms
3511*4882a593Smuzhiyun 	 *  [3] - 20ms <= delay < 30ms
3512*4882a593Smuzhiyun 	 *  [4] - 30ms <= delay < 40ms
3513*4882a593Smuzhiyun 	 *  [5] - 40ms <= delay < 50ms
3514*4882a593Smuzhiyun 	 *  [6] - 50ms <= delay < msduLifetime (TUs)
3515*4882a593Smuzhiyun 	 */
3516*4882a593Smuzhiyun 	t_u16 delay_histogram[MLAN_WMM_STATS_PKTS_HIST_BINS];
3517*4882a593Smuzhiyun } wlan_ioctl_wmm_queue_stats_t,
3518*4882a593Smuzhiyun 	/** Type definition of mlan_ds_wmm_queue_stats
3519*4882a593Smuzhiyun 	 *  for MLAN_OID_WMM_CFG_QUEUE_STATS
3520*4882a593Smuzhiyun 	 */
3521*4882a593Smuzhiyun 	mlan_ds_wmm_queue_stats, *pmlan_ds_wmm_queue_stats;
3522*4882a593Smuzhiyun 
3523*4882a593Smuzhiyun /**
3524*4882a593Smuzhiyun  *  @brief IOCTL sub structure for a specific WMM AC Status
3525*4882a593Smuzhiyun  */
3526*4882a593Smuzhiyun typedef struct {
3527*4882a593Smuzhiyun 	/** WMM Acm */
3528*4882a593Smuzhiyun 	t_u8 wmm_acm;
3529*4882a593Smuzhiyun 	/** Flow required flag */
3530*4882a593Smuzhiyun 	t_u8 flow_required;
3531*4882a593Smuzhiyun 	/** Flow created flag */
3532*4882a593Smuzhiyun 	t_u8 flow_created;
3533*4882a593Smuzhiyun 	/** Disabled flag */
3534*4882a593Smuzhiyun 	t_u8 disabled;
3535*4882a593Smuzhiyun } wlan_ioctl_wmm_queue_status_ac_t;
3536*4882a593Smuzhiyun 
3537*4882a593Smuzhiyun /**
3538*4882a593Smuzhiyun  *  @brief IOCTL structure to retrieve the WMM AC Queue status
3539*4882a593Smuzhiyun  *
3540*4882a593Smuzhiyun  *  IOCTL structure from the application layer to retrieve:
3541*4882a593Smuzhiyun  *     - ACM bit setting for the AC
3542*4882a593Smuzhiyun  *     - Firmware status (flow required, flow created, flow disabled)
3543*4882a593Smuzhiyun  *
3544*4882a593Smuzhiyun  *  @sa woal_wmm_queue_status_ioctl
3545*4882a593Smuzhiyun  */
3546*4882a593Smuzhiyun typedef struct {
3547*4882a593Smuzhiyun 	/** WMM AC queue status */
3548*4882a593Smuzhiyun 	wlan_ioctl_wmm_queue_status_ac_t ac_status[MLAN_WMM_MAX_AC_QUEUES];
3549*4882a593Smuzhiyun } wlan_ioctl_wmm_queue_status_t,
3550*4882a593Smuzhiyun 	/** Type definition of mlan_ds_wmm_queue_status
3551*4882a593Smuzhiyun 	 *  for MLAN_OID_WMM_CFG_QUEUE_STATUS
3552*4882a593Smuzhiyun 	 */
3553*4882a593Smuzhiyun 	mlan_ds_wmm_queue_status, *pmlan_ds_wmm_queue_status;
3554*4882a593Smuzhiyun 
3555*4882a593Smuzhiyun /** Type definition of mlan_ds_wmm_addts for MLAN_OID_WMM_CFG_ADDTS */
3556*4882a593Smuzhiyun typedef struct _mlan_ds_wmm_addts {
3557*4882a593Smuzhiyun 	/** Result of ADDTS request */
3558*4882a593Smuzhiyun 	mlan_cmd_result_e result;
3559*4882a593Smuzhiyun 	/** Timeout value in milliseconds */
3560*4882a593Smuzhiyun 	t_u32 timeout;
3561*4882a593Smuzhiyun 	/** IEEE status code */
3562*4882a593Smuzhiyun 	t_u32 status_code;
3563*4882a593Smuzhiyun 	/** Dialog token */
3564*4882a593Smuzhiyun 	t_u8 dialog_tok;
3565*4882a593Smuzhiyun 	/** TSPEC data length */
3566*4882a593Smuzhiyun 	t_u32 ie_data_len;
3567*4882a593Smuzhiyun 	/** TSPEC to send in the ADDTS + buffering for any extra IEs */
3568*4882a593Smuzhiyun 	t_u8 ie_data[MLAN_WMM_TSPEC_SIZE + MLAN_WMM_ADDTS_EXTRA_IE_BYTES];
3569*4882a593Smuzhiyun } mlan_ds_wmm_addts, *pmlan_ds_wmm_addts;
3570*4882a593Smuzhiyun 
3571*4882a593Smuzhiyun /** Type definition of mlan_ds_wmm_delts for MLAN_OID_WMM_CFG_DELTS */
3572*4882a593Smuzhiyun typedef struct _mlan_ds_wmm_delts {
3573*4882a593Smuzhiyun 	/** Result of DELTS request */
3574*4882a593Smuzhiyun 	mlan_cmd_result_e result;
3575*4882a593Smuzhiyun 	/** IEEE status code */
3576*4882a593Smuzhiyun 	t_u32 status_code;
3577*4882a593Smuzhiyun 	/** TSPEC data length */
3578*4882a593Smuzhiyun 	t_u8 ie_data_len;
3579*4882a593Smuzhiyun 	/** TSPEC to send in the DELTS */
3580*4882a593Smuzhiyun 	t_u8 ie_data[MLAN_WMM_TSPEC_SIZE];
3581*4882a593Smuzhiyun } mlan_ds_wmm_delts, *pmlan_ds_wmm_delts;
3582*4882a593Smuzhiyun 
3583*4882a593Smuzhiyun /** Type definition of mlan_ds_wmm_queue_config
3584*4882a593Smuzhiyun  *  for MLAN_OID_WMM_CFG_QUEUE_CONFIG
3585*4882a593Smuzhiyun  */
3586*4882a593Smuzhiyun typedef struct _mlan_ds_wmm_queue_config {
3587*4882a593Smuzhiyun 	/** Action of Queue Config : Set, Get, or Default */
3588*4882a593Smuzhiyun 	mlan_wmm_queue_config_action_e action;
3589*4882a593Smuzhiyun 	/** WMM Access Category: WMM_AC_BK(0) to WMM_AC_VO(3) */
3590*4882a593Smuzhiyun 	mlan_wmm_ac_e access_category;
3591*4882a593Smuzhiyun 	/** Lifetime expiry in TUs */
3592*4882a593Smuzhiyun 	t_u16 msdu_lifetime_expiry;
3593*4882a593Smuzhiyun 	/** Reserve for future use */
3594*4882a593Smuzhiyun 	t_u8 reserved[10];
3595*4882a593Smuzhiyun } mlan_ds_wmm_queue_config, *pmlan_ds_wmm_queue_config;
3596*4882a593Smuzhiyun 
3597*4882a593Smuzhiyun /** Type definition of mlan_ds_wmm_cfg for MLAN_IOCTL_WMM_CFG */
3598*4882a593Smuzhiyun typedef struct _mlan_ds_wmm_cfg {
3599*4882a593Smuzhiyun 	/** Sub-command */
3600*4882a593Smuzhiyun 	t_u32 sub_command;
3601*4882a593Smuzhiyun 	/** WMM configuration parameter */
3602*4882a593Smuzhiyun 	union {
3603*4882a593Smuzhiyun 		/** WMM enable for MLAN_OID_WMM_CFG_ENABLE */
3604*4882a593Smuzhiyun 		t_u32 wmm_enable;
3605*4882a593Smuzhiyun 		/** QoS configuration for MLAN_OID_WMM_CFG_QOS */
3606*4882a593Smuzhiyun 		t_u8 qos_cfg;
3607*4882a593Smuzhiyun 		/** WMM add TS for MLAN_OID_WMM_CFG_ADDTS */
3608*4882a593Smuzhiyun 		mlan_ds_wmm_addts addts;
3609*4882a593Smuzhiyun 		/** WMM delete TS for MLAN_OID_WMM_CFG_DELTS */
3610*4882a593Smuzhiyun 		mlan_ds_wmm_delts delts;
3611*4882a593Smuzhiyun 		/** WMM queue configuration for MLAN_OID_WMM_CFG_QUEUE_CONFIG */
3612*4882a593Smuzhiyun 		mlan_ds_wmm_queue_config q_cfg;
3613*4882a593Smuzhiyun 		/** AC Parameters Record WMM_AC_BE, WMM_AC_BK, WMM_AC_VI,
3614*4882a593Smuzhiyun 		 * WMM_AC_VO */
3615*4882a593Smuzhiyun 		wmm_ac_parameters_t ac_params[MAX_AC_QUEUES];
3616*4882a593Smuzhiyun 		/** WMM queue status for MLAN_OID_WMM_CFG_QUEUE_STATS */
3617*4882a593Smuzhiyun 		mlan_ds_wmm_queue_stats q_stats;
3618*4882a593Smuzhiyun 		/** WMM queue status for MLAN_OID_WMM_CFG_QUEUE_STATUS */
3619*4882a593Smuzhiyun 		mlan_ds_wmm_queue_status q_status;
3620*4882a593Smuzhiyun 		/** WMM TS status for MLAN_OID_WMM_CFG_TS_STATUS */
3621*4882a593Smuzhiyun 		mlan_ds_wmm_ts_status ts_status;
3622*4882a593Smuzhiyun 	} param;
3623*4882a593Smuzhiyun } mlan_ds_wmm_cfg, *pmlan_ds_wmm_cfg;
3624*4882a593Smuzhiyun 
3625*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3626*4882a593Smuzhiyun /** WPS Configuration Group */
3627*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3628*4882a593Smuzhiyun /** Enumeration for WPS session */
3629*4882a593Smuzhiyun enum _mlan_wps_status {
3630*4882a593Smuzhiyun 	MLAN_WPS_CFG_SESSION_START = 1,
3631*4882a593Smuzhiyun 	MLAN_WPS_CFG_SESSION_END = 0
3632*4882a593Smuzhiyun };
3633*4882a593Smuzhiyun 
3634*4882a593Smuzhiyun /** Type definition of mlan_ds_wps_cfg for MLAN_IOCTL_WPS_CFG */
3635*4882a593Smuzhiyun typedef struct _mlan_ds_wps_cfg {
3636*4882a593Smuzhiyun 	/** Sub-command */
3637*4882a593Smuzhiyun 	t_u32 sub_command;
3638*4882a593Smuzhiyun 	/** WPS configuration parameter */
3639*4882a593Smuzhiyun 	union {
3640*4882a593Smuzhiyun 		/** WPS session for MLAN_OID_WPS_CFG_SESSION */
3641*4882a593Smuzhiyun 		t_u32 wps_session;
3642*4882a593Smuzhiyun 	} param;
3643*4882a593Smuzhiyun } mlan_ds_wps_cfg, *pmlan_ds_wps_cfg;
3644*4882a593Smuzhiyun 
3645*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3646*4882a593Smuzhiyun /** 802.11n Configuration Group */
3647*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
3648*4882a593Smuzhiyun /** Maximum MCS */
3649*4882a593Smuzhiyun #define NUM_MCS_FIELD 16
3650*4882a593Smuzhiyun 
3651*4882a593Smuzhiyun /** Supported stream modes */
3652*4882a593Smuzhiyun #define HT_STREAM_MODE_1X1 0x11
3653*4882a593Smuzhiyun #define HT_STREAM_MODE_2X2 0x22
3654*4882a593Smuzhiyun 
3655*4882a593Smuzhiyun /* Both 2.4G and 5G band selected */
3656*4882a593Smuzhiyun #define BAND_SELECT_BOTH 0
3657*4882a593Smuzhiyun /* Band 2.4G selected */
3658*4882a593Smuzhiyun #define BAND_SELECT_BG 1
3659*4882a593Smuzhiyun /* Band 5G selected */
3660*4882a593Smuzhiyun #define BAND_SELECT_A 2
3661*4882a593Smuzhiyun 
3662*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_htcap_cfg for MLAN_OID_11N_HTCAP_CFG */
3663*4882a593Smuzhiyun typedef struct _mlan_ds_11n_htcap_cfg {
3664*4882a593Smuzhiyun 	/** HT Capability information */
3665*4882a593Smuzhiyun 	t_u32 htcap;
3666*4882a593Smuzhiyun 	/** Band selection */
3667*4882a593Smuzhiyun 	t_u32 misc_cfg;
3668*4882a593Smuzhiyun 	/** Hardware HT cap information required */
3669*4882a593Smuzhiyun 	t_u32 hw_cap_req;
3670*4882a593Smuzhiyun } mlan_ds_11n_htcap_cfg, *pmlan_ds_11n_htcap_cfg;
3671*4882a593Smuzhiyun 
3672*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_addba_param
3673*4882a593Smuzhiyun  * for MLAN_OID_11N_CFG_ADDBA_PARAM
3674*4882a593Smuzhiyun  */
3675*4882a593Smuzhiyun typedef struct _mlan_ds_11n_addba_param {
3676*4882a593Smuzhiyun 	/** Timeout */
3677*4882a593Smuzhiyun 	t_u32 timeout;
3678*4882a593Smuzhiyun 	/** Buffer size for ADDBA request */
3679*4882a593Smuzhiyun 	t_u32 txwinsize;
3680*4882a593Smuzhiyun 	/** Buffer size for ADDBA response */
3681*4882a593Smuzhiyun 	t_u32 rxwinsize;
3682*4882a593Smuzhiyun 	/** amsdu for ADDBA request */
3683*4882a593Smuzhiyun 	t_u8 txamsdu;
3684*4882a593Smuzhiyun 	/** amsdu for ADDBA response */
3685*4882a593Smuzhiyun 	t_u8 rxamsdu;
3686*4882a593Smuzhiyun } mlan_ds_11n_addba_param, *pmlan_ds_11n_addba_param;
3687*4882a593Smuzhiyun 
3688*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_tx_cfg for MLAN_OID_11N_CFG_TX */
3689*4882a593Smuzhiyun typedef struct _mlan_ds_11n_tx_cfg {
3690*4882a593Smuzhiyun 	/** HTTxCap */
3691*4882a593Smuzhiyun 	t_u16 httxcap;
3692*4882a593Smuzhiyun 	/** HTTxInfo */
3693*4882a593Smuzhiyun 	t_u16 httxinfo;
3694*4882a593Smuzhiyun 	/** Band selection */
3695*4882a593Smuzhiyun 	t_u32 misc_cfg;
3696*4882a593Smuzhiyun } mlan_ds_11n_tx_cfg, *pmlan_ds_11n_tx_cfg;
3697*4882a593Smuzhiyun 
3698*4882a593Smuzhiyun /** BF Global Configuration */
3699*4882a593Smuzhiyun #define BF_GLOBAL_CONFIGURATION 0x00
3700*4882a593Smuzhiyun /** Performs NDP sounding for PEER specified */
3701*4882a593Smuzhiyun #define TRIGGER_SOUNDING_FOR_PEER 0x01
3702*4882a593Smuzhiyun /** TX BF interval for channel sounding */
3703*4882a593Smuzhiyun #define SET_GET_BF_PERIODICITY 0x02
3704*4882a593Smuzhiyun /** Tell FW not to perform any sounding for peer */
3705*4882a593Smuzhiyun #define TX_BF_FOR_PEER_ENBL 0x03
3706*4882a593Smuzhiyun /** TX BF SNR threshold for peer */
3707*4882a593Smuzhiyun #define SET_SNR_THR_PEER 0x04
3708*4882a593Smuzhiyun /** TX Sounding*/
3709*4882a593Smuzhiyun #define TX_SOUNDING_CFG 0x05
3710*4882a593Smuzhiyun 
3711*4882a593Smuzhiyun /* Maximum number of peer MAC and status/SNR tuples */
3712*4882a593Smuzhiyun #define MAX_PEER_MAC_TUPLES 10
3713*4882a593Smuzhiyun 
3714*4882a593Smuzhiyun /** Any new subcommand structure should be declare here */
3715*4882a593Smuzhiyun 
3716*4882a593Smuzhiyun /** bf global cfg args */
3717*4882a593Smuzhiyun typedef struct _mlan_bf_global_cfg_args {
3718*4882a593Smuzhiyun 	/** Global enable/disable bf */
3719*4882a593Smuzhiyun 	t_u8 bf_enbl;
3720*4882a593Smuzhiyun 	/** Global enable/disable sounding */
3721*4882a593Smuzhiyun 	t_u8 sounding_enbl;
3722*4882a593Smuzhiyun 	/** FB Type */
3723*4882a593Smuzhiyun 	t_u8 fb_type;
3724*4882a593Smuzhiyun 	/** SNR Threshold */
3725*4882a593Smuzhiyun 	t_u8 snr_threshold;
3726*4882a593Smuzhiyun 	/** Sounding interval in milliseconds */
3727*4882a593Smuzhiyun 	t_u16 sounding_interval;
3728*4882a593Smuzhiyun 	/** BF mode */
3729*4882a593Smuzhiyun 	t_u8 bf_mode;
3730*4882a593Smuzhiyun 	/** Reserved */
3731*4882a593Smuzhiyun 	t_u8 reserved;
3732*4882a593Smuzhiyun } mlan_bf_global_cfg_args;
3733*4882a593Smuzhiyun 
3734*4882a593Smuzhiyun /** trigger sounding args */
3735*4882a593Smuzhiyun typedef struct _mlan_trigger_sound_args {
3736*4882a593Smuzhiyun 	/** Peer MAC address */
3737*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
3738*4882a593Smuzhiyun 	/** Status */
3739*4882a593Smuzhiyun 	t_u8 status;
3740*4882a593Smuzhiyun } mlan_trigger_sound_args;
3741*4882a593Smuzhiyun 
3742*4882a593Smuzhiyun /** bf periodicity args */
3743*4882a593Smuzhiyun typedef struct _mlan_bf_periodicity_args {
3744*4882a593Smuzhiyun 	/** Peer MAC address */
3745*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
3746*4882a593Smuzhiyun 	/** Current Tx BF Interval in milliseconds */
3747*4882a593Smuzhiyun 	t_u16 interval;
3748*4882a593Smuzhiyun 	/** Status */
3749*4882a593Smuzhiyun 	t_u8 status;
3750*4882a593Smuzhiyun } mlan_bf_periodicity_args;
3751*4882a593Smuzhiyun 
3752*4882a593Smuzhiyun /** tx bf peer args */
3753*4882a593Smuzhiyun typedef struct _mlan_tx_bf_peer_args {
3754*4882a593Smuzhiyun 	/** Peer MAC address */
3755*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
3756*4882a593Smuzhiyun 	/** Reserved */
3757*4882a593Smuzhiyun 	t_u16 reserved;
3758*4882a593Smuzhiyun 	/** Enable/Disable Beamforming */
3759*4882a593Smuzhiyun 	t_u8 bf_enbl;
3760*4882a593Smuzhiyun 	/** Enable/Disable sounding */
3761*4882a593Smuzhiyun 	t_u8 sounding_enbl;
3762*4882a593Smuzhiyun 	/** FB Type */
3763*4882a593Smuzhiyun 	t_u8 fb_type;
3764*4882a593Smuzhiyun } mlan_tx_bf_peer_args;
3765*4882a593Smuzhiyun 
3766*4882a593Smuzhiyun /** SNR threshold args */
3767*4882a593Smuzhiyun typedef struct _mlan_snr_thr_args {
3768*4882a593Smuzhiyun 	/** Peer MAC address */
3769*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
3770*4882a593Smuzhiyun 	/** SNR for peer */
3771*4882a593Smuzhiyun 	t_u8 snr;
3772*4882a593Smuzhiyun } mlan_snr_thr_args;
3773*4882a593Smuzhiyun 
3774*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_tx_bf_cfg for MLAN_OID_11N_CFG_TX_BF_CFG */
3775*4882a593Smuzhiyun typedef struct _mlan_ds_11n_tx_bf_cfg {
3776*4882a593Smuzhiyun 	/** BF Action */
3777*4882a593Smuzhiyun 	t_u16 bf_action;
3778*4882a593Smuzhiyun 	/** Action */
3779*4882a593Smuzhiyun 	t_u16 action;
3780*4882a593Smuzhiyun 	/** Number of peers */
3781*4882a593Smuzhiyun 	t_u32 no_of_peers;
3782*4882a593Smuzhiyun 	union {
3783*4882a593Smuzhiyun 		mlan_bf_global_cfg_args bf_global_cfg;
3784*4882a593Smuzhiyun 		mlan_trigger_sound_args bf_sound[MAX_PEER_MAC_TUPLES];
3785*4882a593Smuzhiyun 		mlan_bf_periodicity_args bf_periodicity[MAX_PEER_MAC_TUPLES];
3786*4882a593Smuzhiyun 		mlan_tx_bf_peer_args tx_bf_peer[MAX_PEER_MAC_TUPLES];
3787*4882a593Smuzhiyun 		mlan_snr_thr_args bf_snr[MAX_PEER_MAC_TUPLES];
3788*4882a593Smuzhiyun 	} body;
3789*4882a593Smuzhiyun } mlan_ds_11n_tx_bf_cfg, *pmlan_ds_11n_tx_bf_cfg;
3790*4882a593Smuzhiyun 
3791*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_amsdu_aggr_ctrl for
3792*4882a593Smuzhiyun  * MLAN_OID_11N_AMSDU_AGGR_CTRL*/
3793*4882a593Smuzhiyun typedef struct _mlan_ds_11n_amsdu_aggr_ctrl {
3794*4882a593Smuzhiyun 	/** Enable/Disable */
3795*4882a593Smuzhiyun 	t_u16 enable;
3796*4882a593Smuzhiyun 	/** Current AMSDU size valid */
3797*4882a593Smuzhiyun 	t_u16 curr_buf_size;
3798*4882a593Smuzhiyun } mlan_ds_11n_amsdu_aggr_ctrl, *pmlan_ds_11n_amsdu_aggr_ctrl;
3799*4882a593Smuzhiyun 
3800*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_aggr_prio_tbl
3801*4882a593Smuzhiyun  *  for MLAN_OID_11N_CFG_AGGR_PRIO_TBL
3802*4882a593Smuzhiyun  */
3803*4882a593Smuzhiyun typedef struct _mlan_ds_11n_aggr_prio_tbl {
3804*4882a593Smuzhiyun 	/** ampdu priority table */
3805*4882a593Smuzhiyun 	t_u8 ampdu[MAX_NUM_TID];
3806*4882a593Smuzhiyun 	/** amsdu priority table */
3807*4882a593Smuzhiyun 	t_u8 amsdu[MAX_NUM_TID];
3808*4882a593Smuzhiyun } mlan_ds_11n_aggr_prio_tbl, *pmlan_ds_11n_aggr_prio_tbl;
3809*4882a593Smuzhiyun 
3810*4882a593Smuzhiyun /** DelBA All TIDs */
3811*4882a593Smuzhiyun #define DELBA_ALL_TIDS 0xff
3812*4882a593Smuzhiyun /** DelBA Tx */
3813*4882a593Smuzhiyun #define DELBA_TX MBIT(0)
3814*4882a593Smuzhiyun /** DelBA Rx */
3815*4882a593Smuzhiyun #define DELBA_RX MBIT(1)
3816*4882a593Smuzhiyun 
3817*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_delba for MLAN_OID_11N_CFG_DELBA */
3818*4882a593Smuzhiyun typedef struct _mlan_ds_11n_delba {
3819*4882a593Smuzhiyun 	/** TID */
3820*4882a593Smuzhiyun 	t_u8 tid;
3821*4882a593Smuzhiyun 	/** Peer MAC address */
3822*4882a593Smuzhiyun 	t_u8 peer_mac_addr[MLAN_MAC_ADDR_LENGTH];
3823*4882a593Smuzhiyun 	/** Direction (Tx: bit 0, Rx: bit 1) */
3824*4882a593Smuzhiyun 	t_u8 direction;
3825*4882a593Smuzhiyun } mlan_ds_11n_delba, *pmlan_ds_11n_delba;
3826*4882a593Smuzhiyun 
3827*4882a593Smuzhiyun /** Type definition of mlan_ds_delba for MLAN_OID_11N_CFG_REJECT_ADDBA_REQ */
3828*4882a593Smuzhiyun typedef struct _mlan_ds_reject_addba_req {
3829*4882a593Smuzhiyun 	/** Bit0    : host sleep activated
3830*4882a593Smuzhiyun 	 *  Bit1    : auto reconnect enabled
3831*4882a593Smuzhiyun 	 *  Others  : reserved
3832*4882a593Smuzhiyun 	 */
3833*4882a593Smuzhiyun 	t_u32 conditions;
3834*4882a593Smuzhiyun } mlan_ds_reject_addba_req, *pmlan_ds_reject_addba_req;
3835*4882a593Smuzhiyun 
3836*4882a593Smuzhiyun /** Type definition of mlan_ds_ibss_ampdu_param */
3837*4882a593Smuzhiyun typedef struct _mlan_ds_ibss_ampdu_param {
3838*4882a593Smuzhiyun 	/** ampdu priority table */
3839*4882a593Smuzhiyun 	t_u8 ampdu[MAX_NUM_TID];
3840*4882a593Smuzhiyun 	/** rx amdpdu setting */
3841*4882a593Smuzhiyun 	t_u8 addba_reject[MAX_NUM_TID];
3842*4882a593Smuzhiyun } mlan_ds_ibss_ampdu_param, *pmlan_ds_ibss_ampdu_param;
3843*4882a593Smuzhiyun 
3844*4882a593Smuzhiyun /** Type definition of mlan_ds_11n_cfg for MLAN_IOCTL_11N_CFG */
3845*4882a593Smuzhiyun typedef struct _mlan_ds_11n_cfg {
3846*4882a593Smuzhiyun 	/** Sub-command */
3847*4882a593Smuzhiyun 	t_u32 sub_command;
3848*4882a593Smuzhiyun 	/** 802.11n configuration parameter */
3849*4882a593Smuzhiyun 	union {
3850*4882a593Smuzhiyun 		/** Tx param for 11n for MLAN_OID_11N_CFG_TX */
3851*4882a593Smuzhiyun 		mlan_ds_11n_tx_cfg tx_cfg;
3852*4882a593Smuzhiyun 		/** Aggr priority table for MLAN_OID_11N_CFG_AGGR_PRIO_TBL */
3853*4882a593Smuzhiyun 		mlan_ds_11n_aggr_prio_tbl aggr_prio_tbl;
3854*4882a593Smuzhiyun 		/** Add BA param for MLAN_OID_11N_CFG_ADDBA_PARAM */
3855*4882a593Smuzhiyun 		mlan_ds_11n_addba_param addba_param;
3856*4882a593Smuzhiyun 		/** Add BA Reject paramters for MLAN_OID_11N_CFG_ADDBA_REJECT */
3857*4882a593Smuzhiyun 		t_u8 addba_reject[MAX_NUM_TID];
3858*4882a593Smuzhiyun 		/** Tx buf size for MLAN_OID_11N_CFG_MAX_TX_BUF_SIZE */
3859*4882a593Smuzhiyun 		t_u32 tx_buf_size;
3860*4882a593Smuzhiyun 		/** HT cap info configuration for MLAN_OID_11N_HTCAP_CFG */
3861*4882a593Smuzhiyun 		mlan_ds_11n_htcap_cfg htcap_cfg;
3862*4882a593Smuzhiyun 		/** Tx param for 11n for MLAN_OID_11N_AMSDU_AGGR_CTRL */
3863*4882a593Smuzhiyun 		mlan_ds_11n_amsdu_aggr_ctrl amsdu_aggr_ctrl;
3864*4882a593Smuzhiyun 		/** Supported MCS Set field */
3865*4882a593Smuzhiyun 		t_u8 supported_mcs_set[NUM_MCS_FIELD];
3866*4882a593Smuzhiyun 		/** Transmit Beamforming Capabilities field */
3867*4882a593Smuzhiyun 		t_u32 tx_bf_cap;
3868*4882a593Smuzhiyun 		/** Transmit Beamforming configuration */
3869*4882a593Smuzhiyun 		mlan_ds_11n_tx_bf_cfg tx_bf;
3870*4882a593Smuzhiyun 		/** HT stream configuration */
3871*4882a593Smuzhiyun 		t_u32 stream_cfg;
3872*4882a593Smuzhiyun 		/** DelBA for MLAN_OID_11N_CFG_DELBA */
3873*4882a593Smuzhiyun 		mlan_ds_11n_delba del_ba;
3874*4882a593Smuzhiyun 		/** Reject Addba Req for MLAN_OID_11N_CFG_REJECT_ADDBA_REQ */
3875*4882a593Smuzhiyun 		mlan_ds_reject_addba_req reject_addba_req;
3876*4882a593Smuzhiyun 		/** Control coex RX window size configuration */
3877*4882a593Smuzhiyun 		t_u32 coex_rx_winsize;
3878*4882a593Smuzhiyun 		/** Control TX AMPDU configuration */
3879*4882a593Smuzhiyun 		t_u32 txaggrctrl;
3880*4882a593Smuzhiyun 		/** aggrprirotity table for MLAN_OID_11N_CFG_IBSS_AMPDU_PARAM */
3881*4882a593Smuzhiyun 		mlan_ds_ibss_ampdu_param ibss_ampdu;
3882*4882a593Smuzhiyun 		/** Minimum BA Threshold for MLAN_OID_11N_CFG_MIN_BA_THRESHOLD
3883*4882a593Smuzhiyun 		 */
3884*4882a593Smuzhiyun 		t_u8 min_ba_threshold;
3885*4882a593Smuzhiyun 	} param;
3886*4882a593Smuzhiyun } mlan_ds_11n_cfg, *pmlan_ds_11n_cfg;
3887*4882a593Smuzhiyun 
3888*4882a593Smuzhiyun #define NUM_MCS_SUPP 20
3889*4882a593Smuzhiyun #define VHT_MCS_SET_LEN 8
3890*4882a593Smuzhiyun 
3891*4882a593Smuzhiyun /** Type definition of mlan_ds_11ac_vhtcap_cfg for MLAN_OID_11AC_VHTCAP_CFG */
3892*4882a593Smuzhiyun typedef struct _mlan_ds_11ac_vhtcap_cfg {
3893*4882a593Smuzhiyun 	/** HT Capability information */
3894*4882a593Smuzhiyun 	t_u32 vhtcap;
3895*4882a593Smuzhiyun 	/** Band selection */
3896*4882a593Smuzhiyun 	t_u32 misc_cfg;
3897*4882a593Smuzhiyun 	/** Hardware HT cap information required */
3898*4882a593Smuzhiyun 	t_u32 hw_cap_req;
3899*4882a593Smuzhiyun } mlan_ds_11ac_vhtcap_cfg, *pmlan_ds_11ac_vhtcap_cfg;
3900*4882a593Smuzhiyun 
3901*4882a593Smuzhiyun /** Type definition of mlan_ds_11ac_tx_cfg for MLAN_OID_11AC_CFG_TX */
3902*4882a593Smuzhiyun typedef struct _mlan_ds_11ac_tx_cfg {
3903*4882a593Smuzhiyun 	/** Band selection */
3904*4882a593Smuzhiyun 	t_u8 band_cfg;
3905*4882a593Smuzhiyun 	/** misc configuration */
3906*4882a593Smuzhiyun 	t_u8 misc_cfg;
3907*4882a593Smuzhiyun 	/** HTTxCap */
3908*4882a593Smuzhiyun 	t_u16 vhttxcap;
3909*4882a593Smuzhiyun 	/** HTTxInfo */
3910*4882a593Smuzhiyun 	t_u16 vhttxinfo;
3911*4882a593Smuzhiyun } mlan_ds_11ac_tx_cfg, *pmlan_ds_11ac_tx_cfg;
3912*4882a593Smuzhiyun 
3913*4882a593Smuzhiyun /** Tx */
3914*4882a593Smuzhiyun #define MLAN_RADIO_TX MBIT(0)
3915*4882a593Smuzhiyun /** Rx */
3916*4882a593Smuzhiyun #define MLAN_RADIO_RX MBIT(1)
3917*4882a593Smuzhiyun /** Tx & Rx */
3918*4882a593Smuzhiyun #define MLAN_RADIO_TXRX (MLAN_RADIO_TX | MLAN_RADIO_RX)
3919*4882a593Smuzhiyun 
3920*4882a593Smuzhiyun /** Type definition of mlan_ds_11ac_tx_cfg for MLAN_OID_11AC_CFG */
3921*4882a593Smuzhiyun typedef struct _mlan_ds_11ac_vht_cfg {
3922*4882a593Smuzhiyun 	/** Band selection (1: 2.4G, 2: 5 G, 3: both 2.4G and 5G) */
3923*4882a593Smuzhiyun 	t_u32 band;
3924*4882a593Smuzhiyun 	/** TxRx (1: Tx, 2: Rx, 3: both Tx and Rx) */
3925*4882a593Smuzhiyun 	t_u32 txrx;
3926*4882a593Smuzhiyun 	/** BW CFG (0: 11N CFG, 1: vhtcap) */
3927*4882a593Smuzhiyun 	t_u32 bwcfg;
3928*4882a593Smuzhiyun 	/** VHT capabilities. */
3929*4882a593Smuzhiyun 	t_u32 vht_cap_info;
3930*4882a593Smuzhiyun 	/** VHT Tx mcs */
3931*4882a593Smuzhiyun 	t_u32 vht_tx_mcs;
3932*4882a593Smuzhiyun 	/** VHT Rx mcs */
3933*4882a593Smuzhiyun 	t_u32 vht_rx_mcs;
3934*4882a593Smuzhiyun 	/** VHT rx max rate */
3935*4882a593Smuzhiyun 	t_u16 vht_rx_max_rate;
3936*4882a593Smuzhiyun 	/** VHT max tx rate */
3937*4882a593Smuzhiyun 	t_u16 vht_tx_max_rate;
3938*4882a593Smuzhiyun 	/** Skip usr 11ac mcs cfg */
3939*4882a593Smuzhiyun 	t_bool skip_usr_11ac_mcs_cfg;
3940*4882a593Smuzhiyun } mlan_ds_11ac_vht_cfg, *pmlan_ds_11ac_vht_cfg;
3941*4882a593Smuzhiyun 
3942*4882a593Smuzhiyun /** Type definition of mlan_ds_11ac_tx_cfg for MLAN_OID_11AC_CFG */
3943*4882a593Smuzhiyun typedef struct _mlan_ds_11ac_opermode_cfg {
3944*4882a593Smuzhiyun 	/** channel width: 1-20MHz, 2-40MHz, 3-80MHz, 4-160MHz or 80+80MHz */
3945*4882a593Smuzhiyun 	t_u8 bw;
3946*4882a593Smuzhiyun 	/** Rx NSS */
3947*4882a593Smuzhiyun 	t_u8 nss;
3948*4882a593Smuzhiyun } mlan_ds_11ac_opermode_cfg, *pmlan_ds_11ac_opermode_cfg;
3949*4882a593Smuzhiyun 
3950*4882a593Smuzhiyun /** Type definition of mlan_ds_11ac_cfg for MLAN_IOCTL_11AC_CFG */
3951*4882a593Smuzhiyun typedef struct _mlan_ds_11ac_cfg {
3952*4882a593Smuzhiyun 	/** Sub-command */
3953*4882a593Smuzhiyun 	t_u32 sub_command;
3954*4882a593Smuzhiyun 	/** 802.11n configuration parameter */
3955*4882a593Smuzhiyun 	union {
3956*4882a593Smuzhiyun 		/** VHT configuration for MLAN_OID_11AC_VHT_CFG */
3957*4882a593Smuzhiyun 		mlan_ds_11ac_vht_cfg vht_cfg;
3958*4882a593Smuzhiyun 		/** Supported MCS Set field */
3959*4882a593Smuzhiyun 		t_u8 supported_mcs_set[NUM_MCS_SUPP];
3960*4882a593Smuzhiyun 		/** Oper mode configuration for MLAN_OID_11AC_OPERMODE_CFG */
3961*4882a593Smuzhiyun 		mlan_ds_11ac_opermode_cfg opermode_cfg;
3962*4882a593Smuzhiyun 	} param;
3963*4882a593Smuzhiyun } mlan_ds_11ac_cfg, *pmlan_ds_11ac_cfg;
3964*4882a593Smuzhiyun 
3965*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_he_capa for MLAN_OID_11AX_HE_CFG */
3966*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_11ax_he_capa {
3967*4882a593Smuzhiyun 	/** tlv id of he capability */
3968*4882a593Smuzhiyun 	t_u16 id;
3969*4882a593Smuzhiyun 	/** length of the payload */
3970*4882a593Smuzhiyun 	t_u16 len;
3971*4882a593Smuzhiyun 	/** extension id */
3972*4882a593Smuzhiyun 	t_u8 ext_id;
3973*4882a593Smuzhiyun 	/** he mac capability info */
3974*4882a593Smuzhiyun 	t_u8 he_mac_cap[6];
3975*4882a593Smuzhiyun 	/** he phy capability info */
3976*4882a593Smuzhiyun 	t_u8 he_phy_cap[11];
3977*4882a593Smuzhiyun 	/** he txrx mcs support for 80MHz */
3978*4882a593Smuzhiyun 	t_u8 he_txrx_mcs_support[4];
3979*4882a593Smuzhiyun 	/** val for txrx mcs 160Mhz or 80+80, and PPE thresholds */
3980*4882a593Smuzhiyun 	t_u8 val[28];
3981*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_11ax_he_capa, *pmlan_ds_11ax_he_capa;
3982*4882a593Smuzhiyun 
3983*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_he_cfg for MLAN_OID_11AX_HE_CFG */
3984*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_he_cfg {
3985*4882a593Smuzhiyun 	/** band, BIT0:2.4G, BIT1:5G BIT2:6G*/
3986*4882a593Smuzhiyun 	t_u8 band;
3987*4882a593Smuzhiyun 	/** mlan_ds_11ax_he_capa */
3988*4882a593Smuzhiyun 	mlan_ds_11ax_he_capa he_cap;
3989*4882a593Smuzhiyun } mlan_ds_11ax_he_cfg, *pmlan_ds_11ax_he_cfg;
3990*4882a593Smuzhiyun /** Type definition of mlan_ds_11as_cfg for MLAN_IOCTL_11AX_CFG */
3991*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_cfg {
3992*4882a593Smuzhiyun 	/** Sub-command */
3993*4882a593Smuzhiyun 	t_u32 sub_command;
3994*4882a593Smuzhiyun 	/** 802.11n configuration parameter */
3995*4882a593Smuzhiyun 	union {
3996*4882a593Smuzhiyun 		/** HE configuration for MLAN_OID_11AX_HE_CFG */
3997*4882a593Smuzhiyun 		mlan_ds_11ax_he_cfg he_cfg;
3998*4882a593Smuzhiyun 	} param;
3999*4882a593Smuzhiyun } mlan_ds_11ax_cfg, *pmlan_ds_11ax_cfg;
4000*4882a593Smuzhiyun 
4001*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_SR_OBSS_PD_OFFSET 1
4002*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_SR_ENABLE 2
4003*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_BEAM_CHANGE 3
4004*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_HTC_ENABLE 4
4005*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_TXOP_RTS 5
4006*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_TX_OMI 6
4007*4882a593Smuzhiyun #define MLAN_11AXCMD_CFG_ID_OBSSNBRU_TOLTIME 7
4008*4882a593Smuzhiyun 
4009*4882a593Smuzhiyun #define MLAN_11AXCMD_SR_SUBID 0x102
4010*4882a593Smuzhiyun #define MLAN_11AXCMD_BEAM_SUBID 0x103
4011*4882a593Smuzhiyun #define MLAN_11AXCMD_HTC_SUBID 0x104
4012*4882a593Smuzhiyun #define MLAN_11AXCMD_TXOMI_SUBID 0x105
4013*4882a593Smuzhiyun #define MLAN_11AXCMD_OBSS_TOLTIME_SUBID 0x106
4014*4882a593Smuzhiyun #define MLAN_11AXCMD_TXOPRTS_SUBID 0x108
4015*4882a593Smuzhiyun 
4016*4882a593Smuzhiyun #define MLAN_11AX_TWT_SETUP_SUBID 0x114
4017*4882a593Smuzhiyun #define MLAN_11AX_TWT_TEARDOWN_SUBID 0x115
4018*4882a593Smuzhiyun 
4019*4882a593Smuzhiyun #define MRVL_DOT11AX_ENABLE_SR_TLV_ID (PROPRIETARY_TLV_BASE_ID + 322)
4020*4882a593Smuzhiyun #define MRVL_DOT11AX_OBSS_PD_OFFSET_TLV_ID (PROPRIETARY_TLV_BASE_ID + 323)
4021*4882a593Smuzhiyun 
4022*4882a593Smuzhiyun /** Type definition of mlan_11axcmdcfg_obss_pd_offset for MLAN_OID_11AX_CMD_CFG
4023*4882a593Smuzhiyun  */
4024*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_11axcmdcfg_obss_pd_offset {
4025*4882a593Smuzhiyun 	/** <NON_SRG_OffSET, SRG_OFFSET> */
4026*4882a593Smuzhiyun 	t_u8 offset[2];
4027*4882a593Smuzhiyun } MLAN_PACK_END mlan_11axcmdcfg_obss_pd_offset;
4028*4882a593Smuzhiyun 
4029*4882a593Smuzhiyun /** Type definition of mlan_11axcmdcfg_sr_control for MLAN_OID_11AX_CMD_CFG */
4030*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_11axcmdcfg_sr_control {
4031*4882a593Smuzhiyun 	/** 1 enable, 0 disable */
4032*4882a593Smuzhiyun 	t_u8 control;
4033*4882a593Smuzhiyun } MLAN_PACK_END mlan_11axcmdcfg_sr_control;
4034*4882a593Smuzhiyun 
4035*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_sr_cmd for MLAN_OID_11AX_CMD_CFG */
4036*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_ds_11ax_sr_cmd {
4037*4882a593Smuzhiyun 	/** type*/
4038*4882a593Smuzhiyun 	t_u16 type;
4039*4882a593Smuzhiyun 	/** length of TLV */
4040*4882a593Smuzhiyun 	t_u16 len;
4041*4882a593Smuzhiyun 	/** value */
4042*4882a593Smuzhiyun 	union {
4043*4882a593Smuzhiyun 		mlan_11axcmdcfg_obss_pd_offset obss_pd_offset;
4044*4882a593Smuzhiyun 		mlan_11axcmdcfg_sr_control sr_control;
4045*4882a593Smuzhiyun 	} param;
4046*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_11ax_sr_cmd, *pmlan_ds_11ax_sr_cmd;
4047*4882a593Smuzhiyun 
4048*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_beam_cmd for MLAN_OID_11AX_CMD_CFG */
4049*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_beam_cmd {
4050*4882a593Smuzhiyun 	/** command value: 1 is disable, 0 is enable*/
4051*4882a593Smuzhiyun 	t_u8 value;
4052*4882a593Smuzhiyun } mlan_ds_11ax_beam_cmd, *pmlan_ds_11ax_beam_cmd;
4053*4882a593Smuzhiyun 
4054*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_htc_cmd for MLAN_OID_11AX_CMD_CFG */
4055*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_htc_cmd {
4056*4882a593Smuzhiyun 	/** command value: 1 is enable, 0 is disable*/
4057*4882a593Smuzhiyun 	t_u8 value;
4058*4882a593Smuzhiyun } mlan_ds_11ax_htc_cmd, *pmlan_ds_11ax_htc_cmd;
4059*4882a593Smuzhiyun 
4060*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_htc_cmd for MLAN_OID_11AX_CMD_CFG */
4061*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_txop_cmd {
4062*4882a593Smuzhiyun 	/** Two byte rts threshold value of which only 10 bits, bit 0 to bit 9
4063*4882a593Smuzhiyun 	 * are valid */
4064*4882a593Smuzhiyun 	t_u16 rts_thres;
4065*4882a593Smuzhiyun } mlan_ds_11ax_txop_cmd, *pmlan_ds_11ax_txop_cmd;
4066*4882a593Smuzhiyun 
4067*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_htc_cmd for MLAN_OID_11AX_CMD_CFG */
4068*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_txomi_cmd {
4069*4882a593Smuzhiyun 	/* 11ax spec 9.2.4.6a.2 OM Control 12 bits. Bit 0 to bit 11 */
4070*4882a593Smuzhiyun 	t_u16 omi;
4071*4882a593Smuzhiyun } mlan_ds_11ax_txomi_cmd, *pmlan_ds_11ax_txomi_cmd;
4072*4882a593Smuzhiyun 
4073*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_toltime_cmd for MLAN_OID_11AX_CMD_CFG */
4074*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_toltime_cmd {
4075*4882a593Smuzhiyun 	/* OBSS Narrow Bandwidth RU Tolerance Time */
4076*4882a593Smuzhiyun 	t_u32 tol_time;
4077*4882a593Smuzhiyun } mlan_ds_11ax_toltime_cmd, *pmlan_ds_11ax_toltime_cmd;
4078*4882a593Smuzhiyun 
4079*4882a593Smuzhiyun /** Type definition of mlan_ds_11ax_cmd_cfg for MLAN_OID_11AX_CMD_CFG */
4080*4882a593Smuzhiyun typedef struct _mlan_ds_11ax_cmd_cfg {
4081*4882a593Smuzhiyun 	/** Sub-command */
4082*4882a593Smuzhiyun 	t_u32 sub_command;
4083*4882a593Smuzhiyun 	/** Sub-id */
4084*4882a593Smuzhiyun 	t_u32 sub_id;
4085*4882a593Smuzhiyun 	/** 802.11n configuration parameter */
4086*4882a593Smuzhiyun 	union {
4087*4882a593Smuzhiyun 		/** SR configuration for MLAN_11AXCMD_SR_SUBID */
4088*4882a593Smuzhiyun 		mlan_ds_11ax_sr_cmd sr_cfg;
4089*4882a593Smuzhiyun 		/** Beam configuration for MLAN_11AXCMD_BEAM_SUBID */
4090*4882a593Smuzhiyun 		mlan_ds_11ax_beam_cmd beam_cfg;
4091*4882a593Smuzhiyun 		/** HTC configuration for MLAN_11AXCMD_HTC_SUBID */
4092*4882a593Smuzhiyun 		mlan_ds_11ax_htc_cmd htc_cfg;
4093*4882a593Smuzhiyun 		/** txop RTS configuration for MLAN_11AXCMD_TXOPRTS_SUBID */
4094*4882a593Smuzhiyun 		mlan_ds_11ax_txop_cmd txop_cfg;
4095*4882a593Smuzhiyun 		/** tx omi configuration for MLAN_11AXCMD_TXOMI_SUBID */
4096*4882a593Smuzhiyun 		mlan_ds_11ax_txomi_cmd txomi_cfg;
4097*4882a593Smuzhiyun 		/** OBSS tolerance time configuration for
4098*4882a593Smuzhiyun 		 * MLAN_11AXCMD_TOLTIME_SUBID */
4099*4882a593Smuzhiyun 		mlan_ds_11ax_toltime_cmd toltime_cfg;
4100*4882a593Smuzhiyun 	} param;
4101*4882a593Smuzhiyun } mlan_ds_11ax_cmd_cfg, *pmlan_ds_11ax_cmd_cfg;
4102*4882a593Smuzhiyun 
4103*4882a593Smuzhiyun /** Type definition of mlan_ds_twt_setup for MLAN_OID_11AX_TWT_CFG */
4104*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_ds_twt_setup {
4105*4882a593Smuzhiyun 	/** Implicit, 0: TWT session is explicit, 1: Session is implicit */
4106*4882a593Smuzhiyun 	t_u8 implicit;
4107*4882a593Smuzhiyun 	/** Announced, 0: Unannounced, 1: Announced TWT */
4108*4882a593Smuzhiyun 	t_u8 announced;
4109*4882a593Smuzhiyun 	/** Trigger Enabled, 0: Non-Trigger enabled, 1: Trigger enabled TWT */
4110*4882a593Smuzhiyun 	t_u8 trigger_enabled;
4111*4882a593Smuzhiyun 	/** TWT Information Disabled, 0: TWT info enabled, 1: TWT info disabled
4112*4882a593Smuzhiyun 	 */
4113*4882a593Smuzhiyun 	t_u8 twt_info_disabled;
4114*4882a593Smuzhiyun 	/** Negotiation Type, 0: Future Individual TWT SP start time, 1: Next
4115*4882a593Smuzhiyun 	 * Wake TBTT time */
4116*4882a593Smuzhiyun 	t_u8 negotiation_type;
4117*4882a593Smuzhiyun 	/** TWT Wakeup Duration, time after which the TWT requesting STA can
4118*4882a593Smuzhiyun 	 * transition to doze state */
4119*4882a593Smuzhiyun 	t_u8 twt_wakeup_duration;
4120*4882a593Smuzhiyun 	/** Flow Identifier. Range: [0-7]*/
4121*4882a593Smuzhiyun 	t_u8 flow_identifier;
4122*4882a593Smuzhiyun 	/** Hard Constraint, 0: FW can tweak the TWT setup parameters if it is
4123*4882a593Smuzhiyun 	 *rejected by AP.
4124*4882a593Smuzhiyun 	 ** 1: Firmware should not tweak any parameters. */
4125*4882a593Smuzhiyun 	t_u8 hard_constraint;
4126*4882a593Smuzhiyun 	/** TWT Exponent, Range: [0-63] */
4127*4882a593Smuzhiyun 	t_u8 twt_exponent;
4128*4882a593Smuzhiyun 	/** TWT Mantissa Range: [0-sizeof(UINT16)] */
4129*4882a593Smuzhiyun 	t_u16 twt_mantissa;
4130*4882a593Smuzhiyun 	/** TWT Request Type, 0: REQUEST_TWT, 1: SUGGEST_TWT*/
4131*4882a593Smuzhiyun 	t_u8 twt_request;
4132*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_twt_setup, *pmlan_ds_twt_setup;
4133*4882a593Smuzhiyun 
4134*4882a593Smuzhiyun /** Type definition of mlan_ds_twt_teardown for MLAN_OID_11AX_TWT_CFG */
4135*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_ds_twt_teardown {
4136*4882a593Smuzhiyun 	/** TWT Flow Identifier. Range: [0-7] */
4137*4882a593Smuzhiyun 	t_u8 flow_identifier;
4138*4882a593Smuzhiyun 	/** Negotiation Type. 0: Future Individual TWT SP start time, 1: Next
4139*4882a593Smuzhiyun 	 * Wake TBTT time */
4140*4882a593Smuzhiyun 	t_u8 negotiation_type;
4141*4882a593Smuzhiyun 	/** Tear down all TWT. 1: To teardown all TWT, 0 otherwise */
4142*4882a593Smuzhiyun 	t_u8 teardown_all_twt;
4143*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_twt_teardown, *pmlan_ds_twt_teardown;
4144*4882a593Smuzhiyun 
4145*4882a593Smuzhiyun /** Type definition of mlan_ds_twtcfg for MLAN_OID_11AX_TWT_CFG */
4146*4882a593Smuzhiyun typedef struct MLAN_PACK_START _mlan_ds_twtcfg {
4147*4882a593Smuzhiyun 	/** Sub-command */
4148*4882a593Smuzhiyun 	t_u32 sub_command;
4149*4882a593Smuzhiyun 	/** Sub-id */
4150*4882a593Smuzhiyun 	t_u32 sub_id;
4151*4882a593Smuzhiyun 	/** TWT Setup/Teardown configuration parameter */
4152*4882a593Smuzhiyun 	union {
4153*4882a593Smuzhiyun 		/** TWT Setup config for Sub ID: MLAN_11AX_TWT_SETUP_SUBID */
4154*4882a593Smuzhiyun 		mlan_ds_twt_setup twt_setup;
4155*4882a593Smuzhiyun 		/** TWT Teardown config for Sub ID: MLAN_11AX_TWT_TEARDOWN_SUBID
4156*4882a593Smuzhiyun 		 */
4157*4882a593Smuzhiyun 		mlan_ds_twt_teardown twt_teardown;
4158*4882a593Smuzhiyun 	} param;
4159*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_twtcfg, *pmlan_ds_twtcfg;
4160*4882a593Smuzhiyun 
4161*4882a593Smuzhiyun /** Country code length */
4162*4882a593Smuzhiyun #define COUNTRY_CODE_LEN 3
4163*4882a593Smuzhiyun 
4164*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4165*4882a593Smuzhiyun /** 802.11d Configuration Group */
4166*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4167*4882a593Smuzhiyun /** Maximum subbands for 11d */
4168*4882a593Smuzhiyun #define MRVDRV_MAX_SUBBAND_802_11D 83
4169*4882a593Smuzhiyun 
4170*4882a593Smuzhiyun /** Data structure for subband set */
4171*4882a593Smuzhiyun typedef struct _mlan_ds_subband_set_t {
4172*4882a593Smuzhiyun 	/** First channel */
4173*4882a593Smuzhiyun 	t_u8 first_chan;
4174*4882a593Smuzhiyun 	/** Number of channels */
4175*4882a593Smuzhiyun 	t_u8 no_of_chan;
4176*4882a593Smuzhiyun 	/** Maximum Tx power in dBm */
4177*4882a593Smuzhiyun 	t_u8 max_tx_pwr;
4178*4882a593Smuzhiyun } mlan_ds_subband_set_t;
4179*4882a593Smuzhiyun 
4180*4882a593Smuzhiyun #define NXP_DFS_UNSET 0
4181*4882a593Smuzhiyun #define NXP_DFS_FCC 1
4182*4882a593Smuzhiyun #define NXP_DFS_ETSI 2
4183*4882a593Smuzhiyun #define NXP_DFS_JP 3
4184*4882a593Smuzhiyun #define NXP_DFS_UNKNOWN 0xFF
4185*4882a593Smuzhiyun /** Domain regulatory information */
4186*4882a593Smuzhiyun typedef struct _mlan_ds_11d_domain_info {
4187*4882a593Smuzhiyun 	/** DFS region code */
4188*4882a593Smuzhiyun 	t_u8 dfs_region;
4189*4882a593Smuzhiyun 	/** Country Code */
4190*4882a593Smuzhiyun 	t_u8 country_code[COUNTRY_CODE_LEN];
4191*4882a593Smuzhiyun 	/** Band that channels in sub_band belong to */
4192*4882a593Smuzhiyun 	t_u16 band;
4193*4882a593Smuzhiyun 	/** No. of subband in below */
4194*4882a593Smuzhiyun 	t_u8 no_of_sub_band;
4195*4882a593Smuzhiyun 	/** Subband data to send/last sent */
4196*4882a593Smuzhiyun 	mlan_ds_subband_set_t sub_band[MRVDRV_MAX_SUBBAND_802_11D];
4197*4882a593Smuzhiyun } mlan_ds_11d_domain_info;
4198*4882a593Smuzhiyun 
4199*4882a593Smuzhiyun /** Type definition of mlan_ds_11d_cfg for MLAN_IOCTL_11D_CFG */
4200*4882a593Smuzhiyun typedef struct _mlan_ds_11d_cfg {
4201*4882a593Smuzhiyun 	/** Sub-command */
4202*4882a593Smuzhiyun 	t_u32 sub_command;
4203*4882a593Smuzhiyun 	/** 802.11d configuration parameter */
4204*4882a593Smuzhiyun 	union {
4205*4882a593Smuzhiyun #ifdef STA_SUPPORT
4206*4882a593Smuzhiyun 		/** Enable for MLAN_OID_11D_CFG_ENABLE */
4207*4882a593Smuzhiyun 		t_u32 enable_11d;
4208*4882a593Smuzhiyun #endif /* STA_SUPPORT */
4209*4882a593Smuzhiyun 		/** Domain info for MLAN_OID_11D_DOMAIN_INFO_EXT */
4210*4882a593Smuzhiyun 		mlan_ds_11d_domain_info domain_info;
4211*4882a593Smuzhiyun #ifdef UAP_SUPPORT
4212*4882a593Smuzhiyun 		/** tlv data for MLAN_OID_11D_DOMAIN_INFO */
4213*4882a593Smuzhiyun 		t_u8 domain_tlv[MAX_IE_SIZE];
4214*4882a593Smuzhiyun #endif /* UAP_SUPPORT */
4215*4882a593Smuzhiyun 	} param;
4216*4882a593Smuzhiyun } mlan_ds_11d_cfg, *pmlan_ds_11d_cfg;
4217*4882a593Smuzhiyun 
4218*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4219*4882a593Smuzhiyun /** Register Memory Access Group */
4220*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4221*4882a593Smuzhiyun /** Enumeration for CSU target device type */
4222*4882a593Smuzhiyun enum _mlan_csu_target_type {
4223*4882a593Smuzhiyun 	MLAN_CSU_TARGET_CAU = 1,
4224*4882a593Smuzhiyun 	MLAN_CSU_TARGET_PSU,
4225*4882a593Smuzhiyun };
4226*4882a593Smuzhiyun 
4227*4882a593Smuzhiyun /** Enumeration for register type */
4228*4882a593Smuzhiyun enum _mlan_reg_type {
4229*4882a593Smuzhiyun 	MLAN_REG_MAC = 1,
4230*4882a593Smuzhiyun 	MLAN_REG_BBP,
4231*4882a593Smuzhiyun 	MLAN_REG_RF,
4232*4882a593Smuzhiyun 	MLAN_REG_CAU = 5,
4233*4882a593Smuzhiyun 	MLAN_REG_PSU = 6,
4234*4882a593Smuzhiyun 	MLAN_REG_BCA = 7,
4235*4882a593Smuzhiyun #if defined(PCIE9098) || defined(SD9098) || defined(USB9098) ||                \
4236*4882a593Smuzhiyun 	defined(PCIE9097) || defined(USB9097) || defined(SDNW62X) ||           \
4237*4882a593Smuzhiyun 	defined(PCIENW62X) || defined(USBNW62X) || defined(SD9097) ||          \
4238*4882a593Smuzhiyun 	defined(SD9177)
4239*4882a593Smuzhiyun 	MLAN_REG_CIU = 8,
4240*4882a593Smuzhiyun #endif
4241*4882a593Smuzhiyun #if defined(PCIE9098) || defined(SD9098) || defined(USB9098) ||                \
4242*4882a593Smuzhiyun 	defined(PCIE9097) || defined(USB9097) || defined(SDNW62X) ||           \
4243*4882a593Smuzhiyun 	defined(PCIENW62X) || defined(USBNW62X) || defined(SD9097)
4244*4882a593Smuzhiyun 	MLAN_REG_MAC2 = 0x81,
4245*4882a593Smuzhiyun 	MLAN_REG_BBP2 = 0x82,
4246*4882a593Smuzhiyun 	MLAN_REG_RF2 = 0x83,
4247*4882a593Smuzhiyun 	MLAN_REG_BCA2 = 0x87
4248*4882a593Smuzhiyun #endif
4249*4882a593Smuzhiyun };
4250*4882a593Smuzhiyun 
4251*4882a593Smuzhiyun /** Type definition of mlan_ds_reg_rw for MLAN_OID_REG_RW */
4252*4882a593Smuzhiyun typedef struct _mlan_ds_reg_rw {
4253*4882a593Smuzhiyun 	/** Register type */
4254*4882a593Smuzhiyun 	t_u32 type;
4255*4882a593Smuzhiyun 	/** Offset */
4256*4882a593Smuzhiyun 	t_u32 offset;
4257*4882a593Smuzhiyun 	/** Value */
4258*4882a593Smuzhiyun 	t_u32 value;
4259*4882a593Smuzhiyun } mlan_ds_reg_rw;
4260*4882a593Smuzhiyun 
4261*4882a593Smuzhiyun /** Maximum EEPROM data */
4262*4882a593Smuzhiyun #define MAX_EEPROM_DATA 256
4263*4882a593Smuzhiyun 
4264*4882a593Smuzhiyun /** Type definition of mlan_ds_read_eeprom for MLAN_OID_EEPROM_RD */
4265*4882a593Smuzhiyun typedef struct _mlan_ds_read_eeprom {
4266*4882a593Smuzhiyun 	/** Multiples of 4 */
4267*4882a593Smuzhiyun 	t_u16 offset;
4268*4882a593Smuzhiyun 	/** Number of bytes */
4269*4882a593Smuzhiyun 	t_u16 byte_count;
4270*4882a593Smuzhiyun 	/** Value */
4271*4882a593Smuzhiyun 	t_u8 value[MAX_EEPROM_DATA];
4272*4882a593Smuzhiyun } mlan_ds_read_eeprom;
4273*4882a593Smuzhiyun 
4274*4882a593Smuzhiyun /** Type definition of mlan_ds_mem_rw for MLAN_OID_MEM_RW */
4275*4882a593Smuzhiyun typedef struct _mlan_ds_mem_rw {
4276*4882a593Smuzhiyun 	/** Address */
4277*4882a593Smuzhiyun 	t_u32 addr;
4278*4882a593Smuzhiyun 	/** Value */
4279*4882a593Smuzhiyun 	t_u32 value;
4280*4882a593Smuzhiyun } mlan_ds_mem_rw;
4281*4882a593Smuzhiyun 
4282*4882a593Smuzhiyun /** Type definition of mlan_ds_reg_mem for MLAN_IOCTL_REG_MEM */
4283*4882a593Smuzhiyun typedef struct _mlan_ds_reg_mem {
4284*4882a593Smuzhiyun 	/** Sub-command */
4285*4882a593Smuzhiyun 	t_u32 sub_command;
4286*4882a593Smuzhiyun 	/** Register memory access parameter */
4287*4882a593Smuzhiyun 	union {
4288*4882a593Smuzhiyun 		/** Register access for MLAN_OID_REG_RW */
4289*4882a593Smuzhiyun 		mlan_ds_reg_rw reg_rw;
4290*4882a593Smuzhiyun 		/** EEPROM access for MLAN_OID_EEPROM_RD */
4291*4882a593Smuzhiyun 		mlan_ds_read_eeprom rd_eeprom;
4292*4882a593Smuzhiyun 		/** Memory access for MLAN_OID_MEM_RW */
4293*4882a593Smuzhiyun 		mlan_ds_mem_rw mem_rw;
4294*4882a593Smuzhiyun 	} param;
4295*4882a593Smuzhiyun } mlan_ds_reg_mem, *pmlan_ds_reg_mem;
4296*4882a593Smuzhiyun 
4297*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4298*4882a593Smuzhiyun /** Multi-Radio Configuration Group */
4299*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4300*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4301*4882a593Smuzhiyun /** 802.11h Configuration Group */
4302*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4303*4882a593Smuzhiyun /** Type definition of mlan_ds_11h_dfs_testing for MLAN_OID_11H_DFS_TESTING */
4304*4882a593Smuzhiyun typedef struct _mlan_ds_11h_dfs_testing {
4305*4882a593Smuzhiyun 	/** User-configured CAC period in milliseconds, 0 to use default */
4306*4882a593Smuzhiyun 	t_u32 usr_cac_period_msec;
4307*4882a593Smuzhiyun 	/** User-configured NOP period in seconds, 0 to use default */
4308*4882a593Smuzhiyun 	t_u16 usr_nop_period_sec;
4309*4882a593Smuzhiyun 	/** User-configured skip channel change, 0 to disable */
4310*4882a593Smuzhiyun 	t_u8 usr_no_chan_change;
4311*4882a593Smuzhiyun 	/** User-configured fixed channel to change to, 0 to use random channel
4312*4882a593Smuzhiyun 	 */
4313*4882a593Smuzhiyun 	t_u8 usr_fixed_new_chan;
4314*4882a593Smuzhiyun 	/** User-configured cac restart */
4315*4882a593Smuzhiyun 	t_u8 usr_cac_restart;
4316*4882a593Smuzhiyun } mlan_ds_11h_dfs_testing, *pmlan_ds_11h_dfs_testing;
4317*4882a593Smuzhiyun 
4318*4882a593Smuzhiyun /** Type definition of mlan_ds_11h_dfs_testing for MLAN_OID_11H_CHAN_NOP_INFO */
4319*4882a593Smuzhiyun typedef struct _mlan_ds_11h_chan_nop_info {
4320*4882a593Smuzhiyun 	/** current channel */
4321*4882a593Smuzhiyun 	t_u8 curr_chan;
4322*4882a593Smuzhiyun 	/** channel_width */
4323*4882a593Smuzhiyun 	t_u8 chan_width;
4324*4882a593Smuzhiyun 	/** check new channel flag */
4325*4882a593Smuzhiyun 	t_u8 check_new_chan;
4326*4882a593Smuzhiyun 	/** flag for chan under nop */
4327*4882a593Smuzhiyun 	t_bool chan_under_nop;
4328*4882a593Smuzhiyun 	/** chan_ban_info for new channel */
4329*4882a593Smuzhiyun 	chan_band_info new_chan;
4330*4882a593Smuzhiyun } mlan_ds_11h_chan_nop_info, *pmlan_ds_11h_chan_nop_info;
4331*4882a593Smuzhiyun 
4332*4882a593Smuzhiyun /** Type definition of mlan_ds_11h_nop_chan_list for MLAN_OID_11H_NOP_CHAN_LIST
4333*4882a593Smuzhiyun  */
4334*4882a593Smuzhiyun typedef struct _mlan_ds_11h_nop_chan_list {
4335*4882a593Smuzhiyun 	/** number of nop channel */
4336*4882a593Smuzhiyun 	t_u8 num_chan;
4337*4882a593Smuzhiyun 	/** chan list array */
4338*4882a593Smuzhiyun 	t_u8 chan_list[20];
4339*4882a593Smuzhiyun } mlan_ds_11h_nop_chan_list, *pmlan_ds_11h_nop_chan_list;
4340*4882a593Smuzhiyun 
4341*4882a593Smuzhiyun typedef struct _mlan_ds_11h_chan_rep_req {
4342*4882a593Smuzhiyun 	t_u16 startFreq;
4343*4882a593Smuzhiyun 	Band_Config_t bandcfg;
4344*4882a593Smuzhiyun 	t_u8 chanNum;
4345*4882a593Smuzhiyun 	t_u32 millisec_dwell_time; /**< Channel dwell time in milliseconds */
4346*4882a593Smuzhiyun 	t_u8 host_based;
4347*4882a593Smuzhiyun } mlan_ds_11h_chan_rep_req;
4348*4882a593Smuzhiyun 
4349*4882a593Smuzhiyun /** channel dfs state for MLAN_OID_11H_CHAN_DFS_STATE */
4350*4882a593Smuzhiyun typedef struct _mlan_ds_11h_chan_dfs_state {
4351*4882a593Smuzhiyun 	/** channel */
4352*4882a593Smuzhiyun 	t_u8 channel;
4353*4882a593Smuzhiyun 	/** is dfs channel */
4354*4882a593Smuzhiyun 	t_u8 dfs_required;
4355*4882a593Smuzhiyun 	/** dfs state */
4356*4882a593Smuzhiyun 	dfs_state_t dfs_state;
4357*4882a593Smuzhiyun } mlan_ds_11h_chan_dfs_state;
4358*4882a593Smuzhiyun 
4359*4882a593Smuzhiyun typedef struct _mlan_ds_11h_dfs_w53_cfg {
4360*4882a593Smuzhiyun 	/** dfs w53 cfg */
4361*4882a593Smuzhiyun 	t_u8 dfs53cfg;
4362*4882a593Smuzhiyun } mlan_ds_11h_dfs_w53_cfg;
4363*4882a593Smuzhiyun 
4364*4882a593Smuzhiyun /** Type definition of mlan_ds_11h_cfg for MLAN_IOCTL_11H_CFG */
4365*4882a593Smuzhiyun typedef struct _mlan_ds_11h_cfg {
4366*4882a593Smuzhiyun 	/** Sub-command */
4367*4882a593Smuzhiyun 	t_u32 sub_command;
4368*4882a593Smuzhiyun 	union {
4369*4882a593Smuzhiyun 		/** Local power constraint for
4370*4882a593Smuzhiyun 		 * MLAN_OID_11H_LOCAL_POWER_CONSTRAINT */
4371*4882a593Smuzhiyun 		t_s8 usr_local_power_constraint;
4372*4882a593Smuzhiyun 		/** User-configuation for MLAN_OID_11H_DFS_TESTING */
4373*4882a593Smuzhiyun 		mlan_ds_11h_dfs_testing dfs_testing;
4374*4882a593Smuzhiyun 		/** channel NOP information for MLAN_OID_11H_CHAN_NOP_INFO */
4375*4882a593Smuzhiyun 		mlan_ds_11h_chan_nop_info ch_nop_info;
4376*4882a593Smuzhiyun 		/** NOP channel list for MLAN_OID_11H_NOP_CHAN_LIST */
4377*4882a593Smuzhiyun 		mlan_ds_11h_nop_chan_list nop_chan_list;
4378*4882a593Smuzhiyun 		/** channel report req for MLAN_OID_11H_CHAN_REPORT_REQUEST */
4379*4882a593Smuzhiyun 		mlan_ds_11h_chan_rep_req chan_rpt_req;
4380*4882a593Smuzhiyun 		/** channel switch count for MLAN_OID_11H_CHAN_SWITCH_COUNT*/
4381*4882a593Smuzhiyun 		t_s8 cs_count;
4382*4882a593Smuzhiyun 		/** channel dfs state for MLAN_OID_11H_CHAN_DFS_STATE */
4383*4882a593Smuzhiyun 		mlan_ds_11h_chan_dfs_state ch_dfs_state;
4384*4882a593Smuzhiyun 		mlan_ds_11h_dfs_w53_cfg dfs_w53_cfg;
4385*4882a593Smuzhiyun 		/** dfs_mode for MLAN_OID_11H_DFS_MODE */
4386*4882a593Smuzhiyun 		t_u8 dfs_mode;
4387*4882a593Smuzhiyun 	} param;
4388*4882a593Smuzhiyun } mlan_ds_11h_cfg, *pmlan_ds_11h_cfg;
4389*4882a593Smuzhiyun 
4390*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4391*4882a593Smuzhiyun /** Miscellaneous Configuration Group */
4392*4882a593Smuzhiyun /*-----------------------------------------------------------------*/
4393*4882a593Smuzhiyun 
4394*4882a593Smuzhiyun /** CMD buffer size */
4395*4882a593Smuzhiyun #define MLAN_SIZE_OF_CMD_BUFFER (3 * 1024)
4396*4882a593Smuzhiyun 
4397*4882a593Smuzhiyun /** LDO Internal */
4398*4882a593Smuzhiyun #define LDO_INTERNAL 0
4399*4882a593Smuzhiyun /** LDO External */
4400*4882a593Smuzhiyun #define LDO_EXTERNAL 1
4401*4882a593Smuzhiyun 
4402*4882a593Smuzhiyun /** Enumeration for IE type */
4403*4882a593Smuzhiyun enum _mlan_ie_type {
4404*4882a593Smuzhiyun 	MLAN_IE_TYPE_GEN_IE = 0,
4405*4882a593Smuzhiyun #ifdef STA_SUPPORT
4406*4882a593Smuzhiyun 	MLAN_IE_TYPE_ARP_FILTER,
4407*4882a593Smuzhiyun #endif /* STA_SUPPORT */
4408*4882a593Smuzhiyun };
4409*4882a593Smuzhiyun 
4410*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_gen_ie for MLAN_OID_MISC_GEN_IE */
4411*4882a593Smuzhiyun typedef struct _mlan_ds_misc_gen_ie {
4412*4882a593Smuzhiyun 	/** IE type */
4413*4882a593Smuzhiyun 	t_u32 type;
4414*4882a593Smuzhiyun 	/** IE length */
4415*4882a593Smuzhiyun 	t_u32 len;
4416*4882a593Smuzhiyun 	/** IE buffer */
4417*4882a593Smuzhiyun 	t_u8 ie_data[MAX_IE_SIZE];
4418*4882a593Smuzhiyun } mlan_ds_misc_gen_ie;
4419*4882a593Smuzhiyun 
4420*4882a593Smuzhiyun #ifdef SDIO
4421*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_sdio_mpa_ctrl
4422*4882a593Smuzhiyun  *  for MLAN_OID_MISC_SDIO_MPA_CTRL
4423*4882a593Smuzhiyun  */
4424*4882a593Smuzhiyun typedef struct _mlan_ds_misc_sdio_mpa_ctrl {
4425*4882a593Smuzhiyun 	/** SDIO MP-A TX enable/disable */
4426*4882a593Smuzhiyun 	t_u16 tx_enable;
4427*4882a593Smuzhiyun 	/** SDIO MP-A RX enable/disable */
4428*4882a593Smuzhiyun 	t_u16 rx_enable;
4429*4882a593Smuzhiyun 	/** SDIO MP-A TX buf size */
4430*4882a593Smuzhiyun 	t_u16 tx_buf_size;
4431*4882a593Smuzhiyun 	/** SDIO MP-A RX buf size */
4432*4882a593Smuzhiyun 	t_u16 rx_buf_size;
4433*4882a593Smuzhiyun 	/** SDIO MP-A TX Max Ports */
4434*4882a593Smuzhiyun 	t_u16 tx_max_ports;
4435*4882a593Smuzhiyun 	/** SDIO MP-A RX Max Ports */
4436*4882a593Smuzhiyun 	t_u16 rx_max_ports;
4437*4882a593Smuzhiyun } mlan_ds_misc_sdio_mpa_ctrl;
4438*4882a593Smuzhiyun #endif
4439*4882a593Smuzhiyun 
4440*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_cmd for MLAN_OID_MISC_HOST_CMD */
4441*4882a593Smuzhiyun typedef struct _mlan_ds_misc_cmd {
4442*4882a593Smuzhiyun 	/** Command length */
4443*4882a593Smuzhiyun 	t_u32 len;
4444*4882a593Smuzhiyun 	/** Command buffer */
4445*4882a593Smuzhiyun 	t_u8 cmd[MRVDRV_SIZE_OF_CMD_BUFFER];
4446*4882a593Smuzhiyun } mlan_ds_misc_cmd;
4447*4882a593Smuzhiyun 
4448*4882a593Smuzhiyun /** Maximum number of system clocks */
4449*4882a593Smuzhiyun #define MLAN_MAX_CLK_NUM 16
4450*4882a593Smuzhiyun 
4451*4882a593Smuzhiyun /** Clock type : Configurable */
4452*4882a593Smuzhiyun #define MLAN_CLK_CONFIGURABLE 0
4453*4882a593Smuzhiyun /** Clock type : Supported */
4454*4882a593Smuzhiyun #define MLAN_CLK_SUPPORTED 1
4455*4882a593Smuzhiyun 
4456*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_sys_clock for MLAN_OID_MISC_SYS_CLOCK */
4457*4882a593Smuzhiyun typedef struct _mlan_ds_misc_sys_clock {
4458*4882a593Smuzhiyun 	/** Current system clock */
4459*4882a593Smuzhiyun 	t_u16 cur_sys_clk;
4460*4882a593Smuzhiyun 	/** Clock type */
4461*4882a593Smuzhiyun 	t_u16 sys_clk_type;
4462*4882a593Smuzhiyun 	/** Number of clocks */
4463*4882a593Smuzhiyun 	t_u16 sys_clk_num;
4464*4882a593Smuzhiyun 	/** System clocks */
4465*4882a593Smuzhiyun 	t_u16 sys_clk[MLAN_MAX_CLK_NUM];
4466*4882a593Smuzhiyun } mlan_ds_misc_sys_clock;
4467*4882a593Smuzhiyun 
4468*4882a593Smuzhiyun /** Enumeration for function init/shutdown */
4469*4882a593Smuzhiyun enum _mlan_func_cmd {
4470*4882a593Smuzhiyun 	MLAN_FUNC_INIT = 1,
4471*4882a593Smuzhiyun 	MLAN_FUNC_SHUTDOWN,
4472*4882a593Smuzhiyun };
4473*4882a593Smuzhiyun 
4474*4882a593Smuzhiyun /** Net monitor filter: management frame */
4475*4882a593Smuzhiyun #define MLAN_NETMON_MANAGEMENT_FRAME MBIT(0)
4476*4882a593Smuzhiyun /** Net monitor filter: control frame */
4477*4882a593Smuzhiyun #define MLAN_NETMON_CONTROL_FRAME MBIT(1)
4478*4882a593Smuzhiyun /** Net monitor filter: data frame */
4479*4882a593Smuzhiyun #define MLAN_NETMON_DATA_FRAME MBIT(2)
4480*4882a593Smuzhiyun 
4481*4882a593Smuzhiyun typedef struct _mlan_ds_misc_net_monitor {
4482*4882a593Smuzhiyun 	/** Enable/disable network monitor */
4483*4882a593Smuzhiyun 	t_u32 enable_net_mon;
4484*4882a593Smuzhiyun 	/** Set net monitor filer flag */
4485*4882a593Smuzhiyun 	t_u32 filter_flag;
4486*4882a593Smuzhiyun 	/** Radio type */
4487*4882a593Smuzhiyun 	t_u32 band;
4488*4882a593Smuzhiyun 	/** Channel */
4489*4882a593Smuzhiyun 	t_u32 channel;
4490*4882a593Smuzhiyun 	/** Secondary channel bandwidth */
4491*4882a593Smuzhiyun 	t_u32 chan_bandwidth;
4492*4882a593Smuzhiyun } mlan_ds_misc_net_monitor;
4493*4882a593Smuzhiyun 
4494*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_tx_datapause
4495*4882a593Smuzhiyun  * for MLAN_OID_MISC_TX_DATAPAUSE
4496*4882a593Smuzhiyun  */
4497*4882a593Smuzhiyun typedef struct _mlan_ds_misc_tx_datapause {
4498*4882a593Smuzhiyun 	/** Tx data pause flag */
4499*4882a593Smuzhiyun 	t_u16 tx_pause;
4500*4882a593Smuzhiyun 	/** Max number of Tx buffers for all PS clients */
4501*4882a593Smuzhiyun 	t_u16 tx_buf_cnt;
4502*4882a593Smuzhiyun } mlan_ds_misc_tx_datapause;
4503*4882a593Smuzhiyun 
4504*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_rx_abort_cfg
4505*4882a593Smuzhiyun  * for MLAN_OID_MISC_RX_ABORT_CFG
4506*4882a593Smuzhiyun  */
4507*4882a593Smuzhiyun typedef struct _mlan_ds_misc_rx_abort_cfg {
4508*4882a593Smuzhiyun 	/** enable/disable rx abort */
4509*4882a593Smuzhiyun 	t_u8 enable;
4510*4882a593Smuzhiyun 	/** Rx weak RSSI pkt threshold */
4511*4882a593Smuzhiyun 	t_s8 rssi_threshold;
4512*4882a593Smuzhiyun } mlan_ds_misc_rx_abort_cfg;
4513*4882a593Smuzhiyun 
4514*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_rx_abort_cfg_ext
4515*4882a593Smuzhiyun  * for MLAN_OID_MISC_RX_ABORT_CFG_EXT
4516*4882a593Smuzhiyun  */
4517*4882a593Smuzhiyun typedef struct _mlan_ds_misc_rx_abort_cfg_ext {
4518*4882a593Smuzhiyun 	/** enable/disable dynamic rx abort */
4519*4882a593Smuzhiyun 	t_u8 enable;
4520*4882a593Smuzhiyun 	/** rssi margin */
4521*4882a593Smuzhiyun 	t_s8 rssi_margin;
4522*4882a593Smuzhiyun 	/** specify ceil rssi threshold */
4523*4882a593Smuzhiyun 	t_s8 ceil_rssi_threshold;
4524*4882a593Smuzhiyun } mlan_ds_misc_rx_abort_cfg_ext;
4525*4882a593Smuzhiyun 
4526*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_rx_abort_cfg_ext
4527*4882a593Smuzhiyun  * for MLAN_OID_MISC_TX_AMDPU_PROT_MODE
4528*4882a593Smuzhiyun  */
4529*4882a593Smuzhiyun typedef struct _mlan_ds_misc_tx_ampdu_prot_mode {
4530*4882a593Smuzhiyun 	/** set prot mode */
4531*4882a593Smuzhiyun 	t_u16 mode;
4532*4882a593Smuzhiyun } mlan_ds_misc_tx_ampdu_prot_mode;
4533*4882a593Smuzhiyun 
4534*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_dot11mc_unassoc_ftm_cfg
4535*4882a593Smuzhiyun  * for MLAN_OID_MISC_DOT11MC_UNASSOC_FTM_CFG
4536*4882a593Smuzhiyun  */
4537*4882a593Smuzhiyun typedef struct _mlan_ds_misc_dot11mc_unassoc_ftm_cfg {
4538*4882a593Smuzhiyun 	/** set the state */
4539*4882a593Smuzhiyun 	t_u16 state;
4540*4882a593Smuzhiyun } mlan_ds_misc_dot11mc_unassoc_ftm_cfg;
4541*4882a593Smuzhiyun 
4542*4882a593Smuzhiyun #define RATEADAPT_ALGO_LEGACY 0
4543*4882a593Smuzhiyun #define RATEADAPT_ALGO_SR 1
4544*4882a593Smuzhiyun 
4545*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_rate_adapt_cfg
4546*4882a593Smuzhiyun  * for MLAN_OID_MISC_RATE_ADAPT_CFG
4547*4882a593Smuzhiyun  */
4548*4882a593Smuzhiyun typedef struct _mlan_ds_misc_rate_adapt_cfg {
4549*4882a593Smuzhiyun 	/** SR Rateadapt */
4550*4882a593Smuzhiyun 	t_u8 sr_rateadapt;
4551*4882a593Smuzhiyun 	/** set low threshold */
4552*4882a593Smuzhiyun 	t_u8 ra_low_thresh;
4553*4882a593Smuzhiyun 	/** set high threshold */
4554*4882a593Smuzhiyun 	t_u8 ra_high_thresh;
4555*4882a593Smuzhiyun 	/** set interval */
4556*4882a593Smuzhiyun 	t_u16 ra_interval;
4557*4882a593Smuzhiyun } mlan_ds_misc_rate_adapt_cfg;
4558*4882a593Smuzhiyun 
4559*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_cck_desense_cfg
4560*4882a593Smuzhiyun  * for MLAN_OID_MISC_CCK_DESENSE_CFG
4561*4882a593Smuzhiyun  */
4562*4882a593Smuzhiyun typedef struct _mlan_ds_misc_cck_desense_cfg {
4563*4882a593Smuzhiyun 	/** cck desense mode: 0:disable 1:normal 2:dynamic */
4564*4882a593Smuzhiyun 	t_u16 mode;
4565*4882a593Smuzhiyun 	/** specify rssi margin */
4566*4882a593Smuzhiyun 	t_s8 margin;
4567*4882a593Smuzhiyun 	/** specify ceil rssi threshold */
4568*4882a593Smuzhiyun 	t_s8 ceil_thresh;
4569*4882a593Smuzhiyun 	/** cck desense "on" interval count */
4570*4882a593Smuzhiyun 	t_u8 num_on_intervals;
4571*4882a593Smuzhiyun 	/** cck desense "off" interval count */
4572*4882a593Smuzhiyun 	t_u8 num_off_intervals;
4573*4882a593Smuzhiyun } mlan_ds_misc_cck_desense_cfg;
4574*4882a593Smuzhiyun 
4575*4882a593Smuzhiyun /** IP address length */
4576*4882a593Smuzhiyun #define IPADDR_LEN (16)
4577*4882a593Smuzhiyun /** Max number of ip */
4578*4882a593Smuzhiyun #define MAX_IPADDR (4)
4579*4882a593Smuzhiyun /** IP address type - NONE*/
4580*4882a593Smuzhiyun #define IPADDR_TYPE_NONE (0)
4581*4882a593Smuzhiyun /** IP address type - IPv4*/
4582*4882a593Smuzhiyun #define IPADDR_TYPE_IPV4 (1)
4583*4882a593Smuzhiyun /** IP operation remove */
4584*4882a593Smuzhiyun #define MLAN_IPADDR_OP_IP_REMOVE (0)
4585*4882a593Smuzhiyun /** IP operation ARP filter */
4586*4882a593Smuzhiyun #define MLAN_IPADDR_OP_ARP_FILTER MBIT(0)
4587*4882a593Smuzhiyun /** IP operation ARP response */
4588*4882a593Smuzhiyun #define MLAN_IPADDR_OP_AUTO_ARP_RESP MBIT(1)
4589*4882a593Smuzhiyun /** Enable opcode bit for MDNS & NS when device enter into suspend **/
4590*4882a593Smuzhiyun #define MLAN_OP_ADD_MDNS MBIT(2)
4591*4882a593Smuzhiyun #define MLAN_OP_ADD_IPV6_NS MBIT(3)
4592*4882a593Smuzhiyun 
4593*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_ipaddr_cfg for MLAN_OID_MISC_IP_ADDR */
4594*4882a593Smuzhiyun typedef struct _mlan_ds_misc_ipaddr_cfg {
4595*4882a593Smuzhiyun 	/** Operation code */
4596*4882a593Smuzhiyun 	t_u32 op_code;
4597*4882a593Smuzhiyun 	/** IP address type */
4598*4882a593Smuzhiyun 	t_u32 ip_addr_type;
4599*4882a593Smuzhiyun 	/** Number of IP */
4600*4882a593Smuzhiyun 	t_u32 ip_addr_num;
4601*4882a593Smuzhiyun 	/** IP address */
4602*4882a593Smuzhiyun 	t_u8 ip_addr[MAX_IPADDR][IPADDR_LEN];
4603*4882a593Smuzhiyun } mlan_ds_misc_ipaddr_cfg;
4604*4882a593Smuzhiyun 
4605*4882a593Smuzhiyun /** Type definnition of mlan_ds_misc_ipv6_ra_offload for
4606*4882a593Smuzhiyun  * MLAN_OID_MISC_IPV6_RA_OFFLOAD*/
4607*4882a593Smuzhiyun typedef struct _mlan_ds_misc_ipv6_ra_offload {
4608*4882a593Smuzhiyun 	/** 0: disable; 1: enable*/
4609*4882a593Smuzhiyun 	t_u8 enable;
4610*4882a593Smuzhiyun 	t_u8 ipv6_addr[16];
4611*4882a593Smuzhiyun } mlan_ds_misc_ipv6_ra_offload;
4612*4882a593Smuzhiyun 
4613*4882a593Smuzhiyun /* MEF configuration disable */
4614*4882a593Smuzhiyun #define MEF_CFG_DISABLE 0
4615*4882a593Smuzhiyun /* MEF configuration Rx filter enable */
4616*4882a593Smuzhiyun #define MEF_CFG_RX_FILTER_ENABLE 1
4617*4882a593Smuzhiyun /* MEF configuration auto ARP response */
4618*4882a593Smuzhiyun #define MEF_CFG_AUTO_ARP_RESP 2
4619*4882a593Smuzhiyun /* MEF configuration host command */
4620*4882a593Smuzhiyun #define MEF_CFG_HOSTCMD 0xFFFF
4621*4882a593Smuzhiyun 
4622*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_mef_cfg for MLAN_OID_MISC_MEF_CFG */
4623*4882a593Smuzhiyun typedef struct _mlan_ds_misc_mef_cfg {
4624*4882a593Smuzhiyun 	/** Sub-ID for operation */
4625*4882a593Smuzhiyun 	t_u32 sub_id;
4626*4882a593Smuzhiyun 	/** Parameter according to sub-ID */
4627*4882a593Smuzhiyun 	union {
4628*4882a593Smuzhiyun 		/** MEF command buffer for MEF_CFG_HOSTCMD */
4629*4882a593Smuzhiyun 		mlan_ds_misc_cmd cmd_buf;
4630*4882a593Smuzhiyun 	} param;
4631*4882a593Smuzhiyun } mlan_ds_misc_mef_cfg;
4632*4882a593Smuzhiyun 
4633*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_cfp_code for MLAN_OID_MISC_CFP_CODE */
4634*4882a593Smuzhiyun typedef struct _mlan_ds_misc_cfp_code {
4635*4882a593Smuzhiyun 	/** CFP table code for 2.4GHz */
4636*4882a593Smuzhiyun 	t_u32 cfp_code_bg;
4637*4882a593Smuzhiyun 	/** CFP table code for 5GHz */
4638*4882a593Smuzhiyun 	t_u32 cfp_code_a;
4639*4882a593Smuzhiyun } mlan_ds_misc_cfp_code;
4640*4882a593Smuzhiyun 
4641*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_arb_cfg
4642*4882a593Smuzhiyun  * for MLAN_OID_MISC_ARB_CFG
4643*4882a593Smuzhiyun  */
4644*4882a593Smuzhiyun typedef struct _mlan_ds_misc_arb_cfg {
4645*4882a593Smuzhiyun 	/** arb mode 0-4 */
4646*4882a593Smuzhiyun 	t_u32 arb_mode;
4647*4882a593Smuzhiyun } mlan_ds_misc_arb_cfg;
4648*4882a593Smuzhiyun 
4649*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_tp_state
4650*4882a593Smuzhiyun  *  for MLAN_OID_MISC_TP_STATE
4651*4882a593Smuzhiyun  */
4652*4882a593Smuzhiyun typedef struct _mlan_ds_misc_tp_state {
4653*4882a593Smuzhiyun 	/** TP account mode 0-disable 1-enable */
4654*4882a593Smuzhiyun 	t_u32 on;
4655*4882a593Smuzhiyun 	/** Packet drop point */
4656*4882a593Smuzhiyun 	t_u32 drop_point;
4657*4882a593Smuzhiyun } mlan_ds_misc_tp_state;
4658*4882a593Smuzhiyun 
4659*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_country_code
4660*4882a593Smuzhiyun  *  for MLAN_OID_MISC_COUNTRY_CODE
4661*4882a593Smuzhiyun  */
4662*4882a593Smuzhiyun typedef struct _mlan_ds_misc_country_code {
4663*4882a593Smuzhiyun 	/** Country Code */
4664*4882a593Smuzhiyun 	t_u8 country_code[COUNTRY_CODE_LEN];
4665*4882a593Smuzhiyun } mlan_ds_misc_country_code;
4666*4882a593Smuzhiyun 
4667*4882a593Smuzhiyun /** action for set */
4668*4882a593Smuzhiyun #define SUBSCRIBE_EVT_ACT_BITWISE_SET 0x0002
4669*4882a593Smuzhiyun /** action for clear */
4670*4882a593Smuzhiyun #define SUBSCRIBE_EVT_ACT_BITWISE_CLR 0x0003
4671*4882a593Smuzhiyun /** BITMAP for subscribe event rssi low */
4672*4882a593Smuzhiyun #define SUBSCRIBE_EVT_RSSI_LOW MBIT(0)
4673*4882a593Smuzhiyun /** BITMAP for subscribe event snr low */
4674*4882a593Smuzhiyun #define SUBSCRIBE_EVT_SNR_LOW MBIT(1)
4675*4882a593Smuzhiyun /** BITMAP for subscribe event max fail */
4676*4882a593Smuzhiyun #define SUBSCRIBE_EVT_MAX_FAIL MBIT(2)
4677*4882a593Smuzhiyun /** BITMAP for subscribe event beacon missed */
4678*4882a593Smuzhiyun #define SUBSCRIBE_EVT_BEACON_MISSED MBIT(3)
4679*4882a593Smuzhiyun /** BITMAP for subscribe event rssi high */
4680*4882a593Smuzhiyun #define SUBSCRIBE_EVT_RSSI_HIGH MBIT(4)
4681*4882a593Smuzhiyun /** BITMAP for subscribe event snr high */
4682*4882a593Smuzhiyun #define SUBSCRIBE_EVT_SNR_HIGH MBIT(5)
4683*4882a593Smuzhiyun /** BITMAP for subscribe event data rssi low */
4684*4882a593Smuzhiyun #define SUBSCRIBE_EVT_DATA_RSSI_LOW MBIT(6)
4685*4882a593Smuzhiyun /** BITMAP for subscribe event data snr low */
4686*4882a593Smuzhiyun #define SUBSCRIBE_EVT_DATA_SNR_LOW MBIT(7)
4687*4882a593Smuzhiyun /** BITMAP for subscribe event data rssi high */
4688*4882a593Smuzhiyun #define SUBSCRIBE_EVT_DATA_RSSI_HIGH MBIT(8)
4689*4882a593Smuzhiyun /** BITMAP for subscribe event data snr high */
4690*4882a593Smuzhiyun #define SUBSCRIBE_EVT_DATA_SNR_HIGH MBIT(9)
4691*4882a593Smuzhiyun /** BITMAP for subscribe event link quality */
4692*4882a593Smuzhiyun #define SUBSCRIBE_EVT_LINK_QUALITY MBIT(10)
4693*4882a593Smuzhiyun /** BITMAP for subscribe event pre_beacon_lost */
4694*4882a593Smuzhiyun #define SUBSCRIBE_EVT_PRE_BEACON_LOST MBIT(11)
4695*4882a593Smuzhiyun /** default PRE_BEACON_MISS_COUNT */
4696*4882a593Smuzhiyun #define DEFAULT_PRE_BEACON_MISS 30
4697*4882a593Smuzhiyun 
4698*4882a593Smuzhiyun /** Type definition of mlan_ds_subscribe_evt for MLAN_OID_MISC_CFP_CODE */
4699*4882a593Smuzhiyun typedef struct _mlan_ds_subscribe_evt {
4700*4882a593Smuzhiyun 	/** evt action */
4701*4882a593Smuzhiyun 	t_u16 evt_action;
4702*4882a593Smuzhiyun 	/** bitmap for subscribe event */
4703*4882a593Smuzhiyun 	t_u16 evt_bitmap;
4704*4882a593Smuzhiyun 	/** Absolute value of RSSI threshold value (dBm) */
4705*4882a593Smuzhiyun 	t_u8 low_rssi;
4706*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4707*4882a593Smuzhiyun 	 * N -- report only happend > N consecutive times
4708*4882a593Smuzhiyun 	 */
4709*4882a593Smuzhiyun 	t_u8 low_rssi_freq;
4710*4882a593Smuzhiyun 	/** SNR threshold value (dB) */
4711*4882a593Smuzhiyun 	t_u8 low_snr;
4712*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4713*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4714*4882a593Smuzhiyun 	 */
4715*4882a593Smuzhiyun 	t_u8 low_snr_freq;
4716*4882a593Smuzhiyun 	/** Failure count threshold */
4717*4882a593Smuzhiyun 	t_u8 failure_count;
4718*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4719*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4720*4882a593Smuzhiyun 	 */
4721*4882a593Smuzhiyun 	t_u8 failure_count_freq;
4722*4882a593Smuzhiyun 	/** num of missed beacons */
4723*4882a593Smuzhiyun 	t_u8 beacon_miss;
4724*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4725*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4726*4882a593Smuzhiyun 	 */
4727*4882a593Smuzhiyun 	t_u8 beacon_miss_freq;
4728*4882a593Smuzhiyun 	/** Absolute value of RSSI threshold value (dBm) */
4729*4882a593Smuzhiyun 	t_u8 high_rssi;
4730*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4731*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4732*4882a593Smuzhiyun 	 */
4733*4882a593Smuzhiyun 	t_u8 high_rssi_freq;
4734*4882a593Smuzhiyun 	/** SNR threshold value (dB) */
4735*4882a593Smuzhiyun 	t_u8 high_snr;
4736*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4737*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4738*4882a593Smuzhiyun 	 */
4739*4882a593Smuzhiyun 	t_u8 high_snr_freq;
4740*4882a593Smuzhiyun 	/** Absolute value of data RSSI threshold value (dBm) */
4741*4882a593Smuzhiyun 	t_u8 data_low_rssi;
4742*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4743*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4744*4882a593Smuzhiyun 	 */
4745*4882a593Smuzhiyun 	t_u8 data_low_rssi_freq;
4746*4882a593Smuzhiyun 	/** Absolute value of data SNR threshold value (dBm) */
4747*4882a593Smuzhiyun 	t_u8 data_low_snr;
4748*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4749*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4750*4882a593Smuzhiyun 	 */
4751*4882a593Smuzhiyun 	t_u8 data_low_snr_freq;
4752*4882a593Smuzhiyun 	/** Absolute value of data RSSI threshold value (dBm) */
4753*4882a593Smuzhiyun 	t_u8 data_high_rssi;
4754*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4755*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4756*4882a593Smuzhiyun 	 */
4757*4882a593Smuzhiyun 	t_u8 data_high_rssi_freq;
4758*4882a593Smuzhiyun 	/** Absolute value of data SNR threshold value (dBm) */
4759*4882a593Smuzhiyun 	t_u8 data_high_snr;
4760*4882a593Smuzhiyun 	/** 0--report once, 1--report everytime happen,
4761*4882a593Smuzhiyun 	 *  N -- report only happend > N consecutive times
4762*4882a593Smuzhiyun 	 */
4763*4882a593Smuzhiyun 	t_u8 data_high_snr_freq;
4764*4882a593Smuzhiyun 	/* Link SNR threshold (dB)*/
4765*4882a593Smuzhiyun 	t_u16 link_snr;
4766*4882a593Smuzhiyun 	/* Link SNR frequency */
4767*4882a593Smuzhiyun 	t_u16 link_snr_freq;
4768*4882a593Smuzhiyun 	/* Second minimum rate value as per the rate table below */
4769*4882a593Smuzhiyun 	t_u16 link_rate;
4770*4882a593Smuzhiyun 	/* Second minimum rate frequency */
4771*4882a593Smuzhiyun 	t_u16 link_rate_freq;
4772*4882a593Smuzhiyun 	/* Tx latency value (us) */
4773*4882a593Smuzhiyun 	t_u16 link_tx_latency;
4774*4882a593Smuzhiyun 	/* Tx latency frequency */
4775*4882a593Smuzhiyun 	t_u16 link_tx_lantency_freq;
4776*4882a593Smuzhiyun 	/* Number of pre missed beacons */
4777*4882a593Smuzhiyun 	t_u8 pre_beacon_miss;
4778*4882a593Smuzhiyun } mlan_ds_subscribe_evt;
4779*4882a593Smuzhiyun 
4780*4882a593Smuzhiyun /** Max OTP user data length */
4781*4882a593Smuzhiyun #define MAX_OTP_USER_DATA_LEN 252
4782*4882a593Smuzhiyun 
4783*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_otp_user_data
4784*4882a593Smuzhiyun  * for MLAN_OID_MISC_OTP_USER_DATA
4785*4882a593Smuzhiyun  */
4786*4882a593Smuzhiyun typedef struct _mlan_ds_misc_otp_user_data {
4787*4882a593Smuzhiyun 	/** Reserved */
4788*4882a593Smuzhiyun 	t_u16 reserved;
4789*4882a593Smuzhiyun 	/** OTP user data length */
4790*4882a593Smuzhiyun 	t_u16 user_data_length;
4791*4882a593Smuzhiyun 	/** User data buffer */
4792*4882a593Smuzhiyun 	t_u8 user_data[MAX_OTP_USER_DATA_LEN];
4793*4882a593Smuzhiyun } mlan_ds_misc_otp_user_data;
4794*4882a593Smuzhiyun 
4795*4882a593Smuzhiyun /** Type definition of mlan_ds_fw_reconnect for MLAN_OID_MISC_AUTO_ASSOC */
4796*4882a593Smuzhiyun typedef struct _mlan_ds_fw_reconnect {
4797*4882a593Smuzhiyun 	/* fw auto re-connect counter */
4798*4882a593Smuzhiyun 	t_u8 fw_reconn_counter;
4799*4882a593Smuzhiyun 	/* fw auto re-connect interval */
4800*4882a593Smuzhiyun 	t_u8 fw_reconn_interval;
4801*4882a593Smuzhiyun 	/* fw auto re-connect flags */
4802*4882a593Smuzhiyun 	t_u16 fw_reconn_flags;
4803*4882a593Smuzhiyun } mlan_ds_fw_reconnect;
4804*4882a593Smuzhiyun 
4805*4882a593Smuzhiyun typedef struct _aggr_ctrl_cfg {
4806*4882a593Smuzhiyun 	/** Enable */
4807*4882a593Smuzhiyun 	t_u16 enable;
4808*4882a593Smuzhiyun 	/** Aggregation alignment */
4809*4882a593Smuzhiyun 	t_u16 aggr_align;
4810*4882a593Smuzhiyun 	/** Aggregation max size */
4811*4882a593Smuzhiyun 	t_u16 aggr_max_size;
4812*4882a593Smuzhiyun 	/** Aggregation max packet number */
4813*4882a593Smuzhiyun 	t_u16 aggr_max_num;
4814*4882a593Smuzhiyun 	/** Aggrgation timeout, in microseconds */
4815*4882a593Smuzhiyun 	t_u16 aggr_tmo;
4816*4882a593Smuzhiyun } aggr_ctrl_cfg;
4817*4882a593Smuzhiyun 
4818*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_aggr_ctrl
4819*4882a593Smuzhiyun  *  for MLAN_OID_MISC_AGGR_CTRL
4820*4882a593Smuzhiyun  */
4821*4882a593Smuzhiyun typedef struct _mlan_ds_misc_aggr_ctrl {
4822*4882a593Smuzhiyun 	/** Tx aggregation control */
4823*4882a593Smuzhiyun 	aggr_ctrl_cfg tx;
4824*4882a593Smuzhiyun } mlan_ds_misc_aggr_ctrl;
4825*4882a593Smuzhiyun 
4826*4882a593Smuzhiyun #ifdef USB
4827*4882a593Smuzhiyun typedef struct _usb_aggr_ctrl_cfg {
4828*4882a593Smuzhiyun 	/** Enable */
4829*4882a593Smuzhiyun 	t_u16 enable;
4830*4882a593Smuzhiyun 	/** Aggregation mode */
4831*4882a593Smuzhiyun 	t_u16 aggr_mode;
4832*4882a593Smuzhiyun 	/** Aggregation alignment */
4833*4882a593Smuzhiyun 	t_u16 aggr_align;
4834*4882a593Smuzhiyun 	/** Aggregation max packet/size */
4835*4882a593Smuzhiyun 	t_u16 aggr_max;
4836*4882a593Smuzhiyun 	/** Aggrgation timeout, in microseconds */
4837*4882a593Smuzhiyun 	t_u16 aggr_tmo;
4838*4882a593Smuzhiyun } usb_aggr_ctrl_cfg;
4839*4882a593Smuzhiyun 
4840*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_usb_aggr_ctrl
4841*4882a593Smuzhiyun  *  for MLAN_OID_MISC_USB_AGGR_CTRL
4842*4882a593Smuzhiyun  */
4843*4882a593Smuzhiyun typedef struct _mlan_ds_misc_usb_aggr_ctrl {
4844*4882a593Smuzhiyun 	/** Tx aggregation control */
4845*4882a593Smuzhiyun 	usb_aggr_ctrl_cfg tx_aggr_ctrl;
4846*4882a593Smuzhiyun 	/** Rx deaggregation control */
4847*4882a593Smuzhiyun 	usb_aggr_ctrl_cfg rx_deaggr_ctrl;
4848*4882a593Smuzhiyun } mlan_ds_misc_usb_aggr_ctrl;
4849*4882a593Smuzhiyun #endif
4850*4882a593Smuzhiyun 
4851*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
4852*4882a593Smuzhiyun /** flag for NOA */
4853*4882a593Smuzhiyun #define WIFI_DIRECT_NOA 1
4854*4882a593Smuzhiyun /** flag for OPP_PS */
4855*4882a593Smuzhiyun #define WIFI_DIRECT_OPP_PS 2
4856*4882a593Smuzhiyun /** Type definition of mlan_ds_wifi_direct_config
4857*4882a593Smuzhiyun  *  for MLAN_OID_MISC_WIFI_DIRECT_CONFIG
4858*4882a593Smuzhiyun  */
4859*4882a593Smuzhiyun typedef struct _mlan_ds_wifi_direct_config {
4860*4882a593Smuzhiyun 	/** flags for NOA/OPP_PS */
4861*4882a593Smuzhiyun 	t_u8 flags;
4862*4882a593Smuzhiyun 	/** NoA enable/disable */
4863*4882a593Smuzhiyun 	t_u8 noa_enable;
4864*4882a593Smuzhiyun 	/** index */
4865*4882a593Smuzhiyun 	t_u16 index;
4866*4882a593Smuzhiyun 	/** NoA count */
4867*4882a593Smuzhiyun 	t_u8 noa_count;
4868*4882a593Smuzhiyun 	/** NoA duration */
4869*4882a593Smuzhiyun 	t_u32 noa_duration;
4870*4882a593Smuzhiyun 	/** NoA interval */
4871*4882a593Smuzhiyun 	t_u32 noa_interval;
4872*4882a593Smuzhiyun 	/** opp ps enable/disable */
4873*4882a593Smuzhiyun 	t_u8 opp_ps_enable;
4874*4882a593Smuzhiyun 	/** CT window value */
4875*4882a593Smuzhiyun 	t_u8 ct_window;
4876*4882a593Smuzhiyun } mlan_ds_wifi_direct_config;
4877*4882a593Smuzhiyun #endif
4878*4882a593Smuzhiyun 
4879*4882a593Smuzhiyun /** Type definition of mlan_ds_gpio_tsf_latch */
4880*4882a593Smuzhiyun typedef struct _mlan_ds_gpio_tsf_latch {
4881*4882a593Smuzhiyun 	/**clock sync Mode */
4882*4882a593Smuzhiyun 	t_u8 clock_sync_mode;
4883*4882a593Smuzhiyun 	/**clock sync Role */
4884*4882a593Smuzhiyun 	t_u8 clock_sync_Role;
4885*4882a593Smuzhiyun 	/**clock sync GPIO Pin Number */
4886*4882a593Smuzhiyun 	t_u8 clock_sync_gpio_pin_number;
4887*4882a593Smuzhiyun 	/**clock sync GPIO Level or Toggle */
4888*4882a593Smuzhiyun 	t_u8 clock_sync_gpio_level_toggle;
4889*4882a593Smuzhiyun 	/**clock sync GPIO Pulse Width */
4890*4882a593Smuzhiyun 	t_u16 clock_sync_gpio_pulse_width;
4891*4882a593Smuzhiyun } mlan_ds_gpio_tsf_latch;
4892*4882a593Smuzhiyun 
4893*4882a593Smuzhiyun /** Type definition of mlan_ds_tsf_info */
4894*4882a593Smuzhiyun typedef struct _mlan_ds_tsf_info {
4895*4882a593Smuzhiyun 	/**get tsf info format */
4896*4882a593Smuzhiyun 	t_u16 tsf_format;
4897*4882a593Smuzhiyun 	/**tsf info */
4898*4882a593Smuzhiyun 	t_u16 tsf_info;
4899*4882a593Smuzhiyun 	/**tsf */
4900*4882a593Smuzhiyun 	t_u64 tsf;
4901*4882a593Smuzhiyun 	/**Positive or negative offset in microsecond from Beacon TSF to GPIO
4902*4882a593Smuzhiyun 	 * toggle TSF  */
4903*4882a593Smuzhiyun 	t_s32 tsf_offset;
4904*4882a593Smuzhiyun } mlan_ds_tsf_info;
4905*4882a593Smuzhiyun 
4906*4882a593Smuzhiyun #if defined(STA_SUPPORT)
4907*4882a593Smuzhiyun typedef struct _mlan_ds_misc_pmfcfg {
4908*4882a593Smuzhiyun 	/** Management Frame Protection Capable */
4909*4882a593Smuzhiyun 	t_u8 mfpc;
4910*4882a593Smuzhiyun 	/** Management Frame Protection Required */
4911*4882a593Smuzhiyun 	t_u8 mfpr;
4912*4882a593Smuzhiyun } mlan_ds_misc_pmfcfg;
4913*4882a593Smuzhiyun #endif
4914*4882a593Smuzhiyun 
4915*4882a593Smuzhiyun #define MAX_SSID_NUM 16
4916*4882a593Smuzhiyun #define MAX_AP_LIST 8
4917*4882a593Smuzhiyun #define RETRY_UNLIMITED_TIME 0xFF
4918*4882a593Smuzhiyun 
4919*4882a593Smuzhiyun #define FW_ROAM_ENABLE MBIT(0)
4920*4882a593Smuzhiyun #define FW_ROAM_TRIGGER_COND MBIT(1)
4921*4882a593Smuzhiyun #define FW_ROAM_BSSID MBIT(2)
4922*4882a593Smuzhiyun #define FW_ROAM_SSID MBIT(3)
4923*4882a593Smuzhiyun #define FW_ROAM_RETRY_COUNT MBIT(4)
4924*4882a593Smuzhiyun #define FW_ROAM_RSSI_PARA MBIT(5)
4925*4882a593Smuzhiyun #define FW_ROAM_BAND_RSSI MBIT(6)
4926*4882a593Smuzhiyun #define FW_ROAM_BGSCAN_PARAM MBIT(7)
4927*4882a593Smuzhiyun #define FW_ROAM_EES_PARAM MBIT(8)
4928*4882a593Smuzhiyun #define FW_ROAM_BCN_MISS_THRESHOLD MBIT(9)
4929*4882a593Smuzhiyun #define FW_ROAM_PRE_BCN_MISS_THRESHOLD MBIT(10)
4930*4882a593Smuzhiyun #define FW_ROAM_BLACKLIST MBIT(11)
4931*4882a593Smuzhiyun #define FW_ROAM_REPEAT_CNT MBIT(12)
4932*4882a593Smuzhiyun 
4933*4882a593Smuzhiyun /*Roam offload configuration for auto reconnection when suspend and resume*/
4934*4882a593Smuzhiyun typedef enum _roam_offload_config_mode {
4935*4882a593Smuzhiyun 	ROAM_OFFLOAD_ENABLE = 1,
4936*4882a593Smuzhiyun 	ROAM_OFFLOAD_SUSPEND_CFG,
4937*4882a593Smuzhiyun 	ROAM_OFFLOAD_RESUME_CFG,
4938*4882a593Smuzhiyun 	ROAM_OFFLOAD_PARAM_CFG,
4939*4882a593Smuzhiyun } roam_offload_config_mode;
4940*4882a593Smuzhiyun 
4941*4882a593Smuzhiyun typedef enum _roam_offload_set_mode {
4942*4882a593Smuzhiyun 	ROAM_OFFLOAD_DISABLE = 0,
4943*4882a593Smuzhiyun 	ROAM_OFFLOAD_WITH_APLIST,
4944*4882a593Smuzhiyun 	ROAM_OFFLOAD_WITHOUT_APLIST,
4945*4882a593Smuzhiyun 	ROAM_OFFLOAD_WITH_BSSID,
4946*4882a593Smuzhiyun 	ROAM_OFFLOAD_WITH_SSID,
4947*4882a593Smuzhiyun 	AUTO_RECONNECT,
4948*4882a593Smuzhiyun } roam_offload_set_mode;
4949*4882a593Smuzhiyun 
4950*4882a593Smuzhiyun typedef enum _roam_offload_trigger_mode {
4951*4882a593Smuzhiyun 	NO_TRIGGER = 0x00,
4952*4882a593Smuzhiyun 	RSSI_LOW_TRIGGER = 0x01,
4953*4882a593Smuzhiyun 	PRE_BEACON_LOST_TRIGGER = 0x02,
4954*4882a593Smuzhiyun 	LINK_LOST_TRIGGER = 0x04,
4955*4882a593Smuzhiyun 	DEAUTH_WITH_EXT_AP_TRIGGER = 0x08,
4956*4882a593Smuzhiyun } roam_offload_trigger_mode;
4957*4882a593Smuzhiyun 
4958*4882a593Smuzhiyun /** mlan_ds_misc_ees_cfg structure */
4959*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_ees_cfg {
4960*4882a593Smuzhiyun 	/* EES mode*/
4961*4882a593Smuzhiyun 	t_u16 ees_mode;
4962*4882a593Smuzhiyun 	/* EES report condition*/
4963*4882a593Smuzhiyun 	t_u16 ees_rpt_condition;
4964*4882a593Smuzhiyun 	/* High scan period(milliseconds)*/
4965*4882a593Smuzhiyun 	t_u16 high_scan_period;
4966*4882a593Smuzhiyun 	/* High scan count*/
4967*4882a593Smuzhiyun 	t_u16 high_scan_count;
4968*4882a593Smuzhiyun 	/* Middle scan period(milliseconds)*/
4969*4882a593Smuzhiyun 	t_u16 mid_scan_period;
4970*4882a593Smuzhiyun 	/* Middle scan count*/
4971*4882a593Smuzhiyun 	t_u16 mid_scan_count;
4972*4882a593Smuzhiyun 	/* Low scan period(milliseconds)*/
4973*4882a593Smuzhiyun 	t_u16 low_scan_period;
4974*4882a593Smuzhiyun 	/* Low scan count*/
4975*4882a593Smuzhiyun 	t_u16 low_scan_count;
4976*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_ees_cfg;
4977*4882a593Smuzhiyun 
4978*4882a593Smuzhiyun /** mlan_ds_misc_bgscan_cfg structure */
4979*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_bgscan_cfg {
4980*4882a593Smuzhiyun 	/* BSS Type  0x1-bss independent, 0x2-bss infrastructure, 0x3-bss any*/
4981*4882a593Smuzhiyun 	t_u8 bss_type;
4982*4882a593Smuzhiyun 	/* Number of channels scanned for each scan*/
4983*4882a593Smuzhiyun 	t_u8 channels_per_scan;
4984*4882a593Smuzhiyun 	/* Interval between consective scans*/
4985*4882a593Smuzhiyun 	t_u32 scan_interval;
4986*4882a593Smuzhiyun 	/* Conditons to trigger report to host*/
4987*4882a593Smuzhiyun 	t_u32 bg_rpt_condition;
4988*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_bgscan_cfg;
4989*4882a593Smuzhiyun 
4990*4882a593Smuzhiyun /** mlan_ds_misc_band_rssi structure */
4991*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_band_rssi {
4992*4882a593Smuzhiyun 	/* RSSI hysteresis*/
4993*4882a593Smuzhiyun 	t_u8 rssi_hysteresis;
4994*4882a593Smuzhiyun 	/*  Preferred channel band for fw roaming
4995*4882a593Smuzhiyun 	 *  0:2.4G band; 1: 5G band; 2:4G band; 0xFF:band not set(invalid)
4996*4882a593Smuzhiyun 	 */
4997*4882a593Smuzhiyun 	t_u8 band_preferred;
4998*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_band_rssi;
4999*4882a593Smuzhiyun 
5000*4882a593Smuzhiyun /** mlan_ds_misc_ssid_list structure */
5001*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_ssid_list {
5002*4882a593Smuzhiyun 	/* SSID number*/
5003*4882a593Smuzhiyun 	t_u8 ssid_num;
5004*4882a593Smuzhiyun 	/* SSID for fw roaming/auto_reconnect*/
5005*4882a593Smuzhiyun 	mlan_802_11_ssid ssids[MAX_SSID_NUM];
5006*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_ssid_list;
5007*4882a593Smuzhiyun 
5008*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_roam_offload_aplist {
5009*4882a593Smuzhiyun 	/** Number of AP**/
5010*4882a593Smuzhiyun 	t_u8 ap_num;
5011*4882a593Smuzhiyun 	/** AP mac addrs**/
5012*4882a593Smuzhiyun 	t_u8 ap_mac[MAX_AP_LIST][MLAN_MAC_ADDR_LENGTH];
5013*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_roam_offload_aplist;
5014*4882a593Smuzhiyun 
5015*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_roam_offload_para_rssi {
5016*4882a593Smuzhiyun 	/** Setting flag**/
5017*4882a593Smuzhiyun 	t_u8 set_flag;
5018*4882a593Smuzhiyun 	/** Max value of RSSI threshold**/
5019*4882a593Smuzhiyun 	t_u8 max_rssi;
5020*4882a593Smuzhiyun 	/** Min value of RSSI threshold**/
5021*4882a593Smuzhiyun 	t_u8 min_rssi;
5022*4882a593Smuzhiyun 	/** Adjusting step value of RSSI threshold**/
5023*4882a593Smuzhiyun 	t_u8 step_rssi;
5024*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_roam_offload_para_rssi;
5025*4882a593Smuzhiyun 
5026*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_roam_offload {
5027*4882a593Smuzhiyun 	/** Enable roam offload**/
5028*4882a593Smuzhiyun 	t_u8 enable;
5029*4882a593Smuzhiyun 	/** User set passphrase**/
5030*4882a593Smuzhiyun 	t_u8 userset_passphrase;
5031*4882a593Smuzhiyun 	/* Condition to trigger roaming
5032*4882a593Smuzhiyun 	 * Bit0 : RSSI low trigger
5033*4882a593Smuzhiyun 	 * Bit1 : Pre-beacon lost trigger
5034*4882a593Smuzhiyun 	 * Bit2 : Link Lost trigger
5035*4882a593Smuzhiyun 	 * Bit3 : Deauth by ext-AP trigger
5036*4882a593Smuzhiyun 	 * Bit4 ~ Bit15 : Reserved
5037*4882a593Smuzhiyun 	 * value 0 : no trigger
5038*4882a593Smuzhiyun 	 * value 0xff : invalid
5039*4882a593Smuzhiyun 	 */
5040*4882a593Smuzhiyun 	t_u16 trigger_condition;
5041*4882a593Smuzhiyun 	/** AP list**/
5042*4882a593Smuzhiyun 	mlan_ds_misc_roam_offload_aplist aplist;
5043*4882a593Smuzhiyun 	/*Roam offload configuration mode for auto connection when suspend and
5044*4882a593Smuzhiyun 	 * resume*/
5045*4882a593Smuzhiyun 	roam_offload_config_mode config_mode;
5046*4882a593Smuzhiyun 	/** Retry count**/
5047*4882a593Smuzhiyun 	t_u8 retry_count;
5048*4882a593Smuzhiyun 	/** RSSI para**/
5049*4882a593Smuzhiyun 	mlan_ds_misc_roam_offload_para_rssi para_rssi;
5050*4882a593Smuzhiyun 	/** BSSID of reconnection**/
5051*4882a593Smuzhiyun 	mlan_802_11_mac_addr bssid_reconnect;
5052*4882a593Smuzhiyun 	/* SSID List(White list)*/
5053*4882a593Smuzhiyun 	mlan_ds_misc_ssid_list ssid_list;
5054*4882a593Smuzhiyun 	/* Black list(BSSID list)*/
5055*4882a593Smuzhiyun 	mlan_ds_misc_roam_offload_aplist black_list;
5056*4882a593Smuzhiyun 	/* BAND and RSSI_HYSTERESIS set flag*/
5057*4882a593Smuzhiyun 	t_u8 band_rssi_flag;
5058*4882a593Smuzhiyun 	mlan_ds_misc_band_rssi band_rssi;
5059*4882a593Smuzhiyun 
5060*4882a593Smuzhiyun 	/* BGSCAN params set flag*/
5061*4882a593Smuzhiyun 	t_u8 bgscan_set_flag;
5062*4882a593Smuzhiyun 	mlan_ds_misc_bgscan_cfg bgscan_cfg;
5063*4882a593Smuzhiyun 
5064*4882a593Smuzhiyun 	/* EES mode params set flag*/
5065*4882a593Smuzhiyun 	t_u8 ees_param_set_flag;
5066*4882a593Smuzhiyun 	mlan_ds_misc_ees_cfg ees_cfg;
5067*4882a593Smuzhiyun 
5068*4882a593Smuzhiyun 	/* Beacon miss threshold*/
5069*4882a593Smuzhiyun 	t_u8 bcn_miss_threshold;
5070*4882a593Smuzhiyun 
5071*4882a593Smuzhiyun 	/* Beacon miss threshold*/
5072*4882a593Smuzhiyun 	t_u8 pre_bcn_miss_threshold;
5073*4882a593Smuzhiyun 
5074*4882a593Smuzhiyun 	/* Scan repeat count*/
5075*4882a593Smuzhiyun 	t_u16 repeat_count;
5076*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_roam_offload;
5077*4882a593Smuzhiyun 
5078*4882a593Smuzhiyun /**Action ID for TDLS disable link*/
5079*4882a593Smuzhiyun #define WLAN_TDLS_DISABLE_LINK 0x00
5080*4882a593Smuzhiyun /**Action ID for TDLS enable link*/
5081*4882a593Smuzhiyun #define WLAN_TDLS_ENABLE_LINK 0x01
5082*4882a593Smuzhiyun /**Action ID for TDLS create link*/
5083*4882a593Smuzhiyun #define WLAN_TDLS_CREATE_LINK 0x02
5084*4882a593Smuzhiyun /**Action ID for TDLS config link*/
5085*4882a593Smuzhiyun #define WLAN_TDLS_CONFIG_LINK 0x03
5086*4882a593Smuzhiyun /*reason code*/
5087*4882a593Smuzhiyun #define MLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED 26
5088*4882a593Smuzhiyun /** TDLS operation buffer */
5089*4882a593Smuzhiyun typedef struct _mlan_ds_misc_tdls_oper {
5090*4882a593Smuzhiyun 	/** TDLS Action */
5091*4882a593Smuzhiyun 	t_u16 tdls_action;
5092*4882a593Smuzhiyun 	/** TDLS peer address */
5093*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
5094*4882a593Smuzhiyun 	/** peer capability */
5095*4882a593Smuzhiyun 	t_u16 capability;
5096*4882a593Smuzhiyun 	/** peer qos info */
5097*4882a593Smuzhiyun 	t_u8 qos_info;
5098*4882a593Smuzhiyun 	/** peer extend capability */
5099*4882a593Smuzhiyun 	t_u8 *ext_capab;
5100*4882a593Smuzhiyun 	/** extend capability len */
5101*4882a593Smuzhiyun 	t_u8 ext_capab_len;
5102*4882a593Smuzhiyun 	/** support rates */
5103*4882a593Smuzhiyun 	t_u8 *supported_rates;
5104*4882a593Smuzhiyun 	/** supported rates len */
5105*4882a593Smuzhiyun 	t_u8 supported_rates_len;
5106*4882a593Smuzhiyun 	/** peer ht_cap */
5107*4882a593Smuzhiyun 	t_u8 *ht_capa;
5108*4882a593Smuzhiyun 	/** peer vht capability */
5109*4882a593Smuzhiyun 	t_u8 *vht_cap;
5110*4882a593Smuzhiyun } mlan_ds_misc_tdls_oper;
5111*4882a593Smuzhiyun 
5112*4882a593Smuzhiyun /** flag for TDLS extcap */
5113*4882a593Smuzhiyun #define TDLS_IE_FLAGS_EXTCAP 0x0001
5114*4882a593Smuzhiyun /** flag for TDLS HTCAP */
5115*4882a593Smuzhiyun #define TDLS_IE_FLAGS_HTCAP 0x0002
5116*4882a593Smuzhiyun /** flag for TDLS HTINFO */
5117*4882a593Smuzhiyun #define TDLS_IE_FLAGS_HTINFO 0x0004
5118*4882a593Smuzhiyun /** flag for TDLS VHTCAP */
5119*4882a593Smuzhiyun #define TDLS_IE_FLAGS_VHTCAP 0x0008
5120*4882a593Smuzhiyun /** flag for TDLS VHTOPRAT */
5121*4882a593Smuzhiyun #define TDLS_IE_FLAGS_VHTOPRAT 0x0010
5122*4882a593Smuzhiyun /** flag for TDLS AID inof */
5123*4882a593Smuzhiyun #define TDLS_IE_FLAGS_AID 0x0020
5124*4882a593Smuzhiyun /** flag for TDLS Supported channels and regulatory class IE*/
5125*4882a593Smuzhiyun #define TDLS_IE_FLAGS_SUPP_CS_IE 0x0040
5126*4882a593Smuzhiyun /** flag for TDLS Qos info */
5127*4882a593Smuzhiyun #define TDLS_IE_FLAGS_QOS_INFO 0x0080
5128*4882a593Smuzhiyun /** flag for TDLS SETUP */
5129*4882a593Smuzhiyun #define TDLS_IE_FLAGS_SETUP 0x0100
5130*4882a593Smuzhiyun #define TDLS_IE_FLAGS_HECAP 0x0200
5131*4882a593Smuzhiyun #define TDLS_IE_FLAGS_HEOP 0x0400
5132*4882a593Smuzhiyun 
5133*4882a593Smuzhiyun /** TDLS ie buffer */
5134*4882a593Smuzhiyun typedef struct _mlan_ds_misc_tdls_ies {
5135*4882a593Smuzhiyun 	/** TDLS peer address */
5136*4882a593Smuzhiyun 	t_u8 peer_mac[MLAN_MAC_ADDR_LENGTH];
5137*4882a593Smuzhiyun 	/** flags for request IEs */
5138*4882a593Smuzhiyun 	t_u16 flags;
5139*4882a593Smuzhiyun 	/** Qos info */
5140*4882a593Smuzhiyun 	t_u8 QosInfo;
5141*4882a593Smuzhiyun 	/** Extended Capabilities IE */
5142*4882a593Smuzhiyun 	t_u8 ext_cap[IEEE_MAX_IE_SIZE];
5143*4882a593Smuzhiyun 	/** HT Capabilities IE */
5144*4882a593Smuzhiyun 	t_u8 ht_cap[IEEE_MAX_IE_SIZE];
5145*4882a593Smuzhiyun 	/** HT Information IE */
5146*4882a593Smuzhiyun 	t_u8 ht_info[IEEE_MAX_IE_SIZE];
5147*4882a593Smuzhiyun 	/** VHT Capabilities IE */
5148*4882a593Smuzhiyun 	t_u8 vht_cap[IEEE_MAX_IE_SIZE];
5149*4882a593Smuzhiyun 	/** VHT Operations IE */
5150*4882a593Smuzhiyun 	t_u8 vht_oprat[IEEE_MAX_IE_SIZE];
5151*4882a593Smuzhiyun 	/** aid Info */
5152*4882a593Smuzhiyun 	t_u8 aid_info[IEEE_MAX_IE_SIZE];
5153*4882a593Smuzhiyun 	/** HE Capabilities IE */
5154*4882a593Smuzhiyun 	t_u8 he_cap[IEEE_MAX_IE_SIZE];
5155*4882a593Smuzhiyun 	/** HE Operation IE */
5156*4882a593Smuzhiyun 	t_u8 he_op[IEEE_MAX_IE_SIZE];
5157*4882a593Smuzhiyun 	/** supported channels */
5158*4882a593Smuzhiyun 	t_u8 supp_chan[IEEE_MAX_IE_SIZE];
5159*4882a593Smuzhiyun 	/** supported regulatory class */
5160*4882a593Smuzhiyun 	t_u8 regulatory_class[IEEE_MAX_IE_SIZE];
5161*4882a593Smuzhiyun } mlan_ds_misc_tdls_ies;
5162*4882a593Smuzhiyun 
5163*4882a593Smuzhiyun #ifdef RX_PACKET_COALESCE
5164*4882a593Smuzhiyun typedef struct _mlan_ds_misc_rx_packet_coalesce {
5165*4882a593Smuzhiyun 	/** packet threshold */
5166*4882a593Smuzhiyun 	t_u32 packet_threshold;
5167*4882a593Smuzhiyun 	/** timeout value */
5168*4882a593Smuzhiyun 	t_u16 delay;
5169*4882a593Smuzhiyun } mlan_ds_misc_rx_packet_coalesce;
5170*4882a593Smuzhiyun #endif
5171*4882a593Smuzhiyun 
5172*4882a593Smuzhiyun typedef struct _mlan_ds_misc_dfs_repeater {
5173*4882a593Smuzhiyun 	/** Set or Get */
5174*4882a593Smuzhiyun 	t_u16 action;
5175*4882a593Smuzhiyun 	/** 1 on or 0 off */
5176*4882a593Smuzhiyun 	t_u16 mode;
5177*4882a593Smuzhiyun } mlan_ds_misc_dfs_repeater;
5178*4882a593Smuzhiyun 
5179*4882a593Smuzhiyun #define WOWLAN_MAX_PATTERN_LEN 20
5180*4882a593Smuzhiyun #define WOWLAN_MAX_OFFSET_LEN 50
5181*4882a593Smuzhiyun #define MAX_NUM_FILTERS 10
5182*4882a593Smuzhiyun #define MEF_MODE_HOST_SLEEP (1 << 0)
5183*4882a593Smuzhiyun #define MEF_MODE_NON_HOST_SLEEP (1 << 1)
5184*4882a593Smuzhiyun #define MEF_ACTION_WAKE (1 << 0)
5185*4882a593Smuzhiyun #define MEF_ACTION_ALLOW (1 << 1)
5186*4882a593Smuzhiyun #define MEF_ACTION_ALLOW_AND_WAKEUP_HOST 3
5187*4882a593Smuzhiyun #define MEF_AUTO_ARP 0x10
5188*4882a593Smuzhiyun #define MEF_AUTO_PING 0x20
5189*4882a593Smuzhiyun #define MEF_NS_RESP 0x40
5190*4882a593Smuzhiyun #define MEF_MAGIC_PKT 0x80
5191*4882a593Smuzhiyun #define CRITERIA_BROADCAST BIT(0)
5192*4882a593Smuzhiyun #define CRITERIA_UNICAST BIT(1)
5193*4882a593Smuzhiyun #define CRITERIA_MULTICAST BIT(3)
5194*4882a593Smuzhiyun 
5195*4882a593Smuzhiyun #define MAX_NUM_ENTRIES 8
5196*4882a593Smuzhiyun #define MAX_NUM_BYTE_SEQ 6
5197*4882a593Smuzhiyun #define MAX_NUM_MASK_SEQ 6
5198*4882a593Smuzhiyun 
5199*4882a593Smuzhiyun #define OPERAND_DNUM 1
5200*4882a593Smuzhiyun #define OPERAND_BYTE_SEQ 2
5201*4882a593Smuzhiyun 
5202*4882a593Smuzhiyun #define MAX_OPERAND 0x40
5203*4882a593Smuzhiyun #define TYPE_BYTE_EQ (MAX_OPERAND + 1)
5204*4882a593Smuzhiyun #define TYPE_DNUM_EQ (MAX_OPERAND + 2)
5205*4882a593Smuzhiyun #define TYPE_BIT_EQ (MAX_OPERAND + 3)
5206*4882a593Smuzhiyun 
5207*4882a593Smuzhiyun #define RPN_TYPE_AND (MAX_OPERAND + 4)
5208*4882a593Smuzhiyun #define RPN_TYPE_OR (MAX_OPERAND + 5)
5209*4882a593Smuzhiyun 
5210*4882a593Smuzhiyun #define ICMP_OF_IP_PROTOCOL 0x01
5211*4882a593Smuzhiyun #define TCP_OF_IP_PROTOCOL 0x06
5212*4882a593Smuzhiyun #define UDP_OF_IP_PROTOCOL 0x11
5213*4882a593Smuzhiyun 
5214*4882a593Smuzhiyun #define IPV4_PKT_OFFSET 20
5215*4882a593Smuzhiyun #define IP_PROTOCOL_OFFSET 31
5216*4882a593Smuzhiyun #define PORT_PROTOCOL_OFFSET 44
5217*4882a593Smuzhiyun 
5218*4882a593Smuzhiyun #define FILLING_TYPE MBIT(0)
5219*4882a593Smuzhiyun #define FILLING_PATTERN MBIT(1)
5220*4882a593Smuzhiyun #define FILLING_OFFSET MBIT(2)
5221*4882a593Smuzhiyun #define FILLING_NUM_BYTES MBIT(3)
5222*4882a593Smuzhiyun #define FILLING_REPEAT MBIT(4)
5223*4882a593Smuzhiyun #define FILLING_BYTE_SEQ MBIT(5)
5224*4882a593Smuzhiyun #define FILLING_MASK_SEQ MBIT(6)
5225*4882a593Smuzhiyun 
5226*4882a593Smuzhiyun /** Type definition of filter_item
5227*4882a593Smuzhiyun  *  Support three match methods:
5228*4882a593Smuzhiyun  *  <1>Byte comparison type=0x41
5229*4882a593Smuzhiyun  *  <2>Decimal comparison type=0x42
5230*4882a593Smuzhiyun  *  <3>Bit comparison type=0x43
5231*4882a593Smuzhiyun  */
5232*4882a593Smuzhiyun typedef struct _mef_filter_t {
5233*4882a593Smuzhiyun 	/** flag*/
5234*4882a593Smuzhiyun 	t_u32 fill_flag;
5235*4882a593Smuzhiyun 	/** BYTE 0X41; Decimal 0X42; Bit 0x43*/
5236*4882a593Smuzhiyun 	t_u16 type;
5237*4882a593Smuzhiyun 	/** value*/
5238*4882a593Smuzhiyun 	t_u32 pattern;
5239*4882a593Smuzhiyun 	/** offset*/
5240*4882a593Smuzhiyun 	t_u16 offset;
5241*4882a593Smuzhiyun 	/** number of bytes*/
5242*4882a593Smuzhiyun 	t_u16 num_bytes;
5243*4882a593Smuzhiyun 	/** repeat*/
5244*4882a593Smuzhiyun 	t_u16 repeat;
5245*4882a593Smuzhiyun 	/** byte number*/
5246*4882a593Smuzhiyun 	t_u8 num_byte_seq;
5247*4882a593Smuzhiyun 	/** array*/
5248*4882a593Smuzhiyun 	t_u8 byte_seq[MAX_NUM_BYTE_SEQ];
5249*4882a593Smuzhiyun 	/** mask numbers*/
5250*4882a593Smuzhiyun 	t_u8 num_mask_seq;
5251*4882a593Smuzhiyun 	/** array*/
5252*4882a593Smuzhiyun 	t_u8 mask_seq[MAX_NUM_MASK_SEQ];
5253*4882a593Smuzhiyun } mef_filter_t;
5254*4882a593Smuzhiyun 
5255*4882a593Smuzhiyun typedef struct _mef_entry_t {
5256*4882a593Smuzhiyun 	/** mode: bit0--hostsleep mode; bit1--non hostsleep mode */
5257*4882a593Smuzhiyun 	t_u8 mode;
5258*4882a593Smuzhiyun 	/** action: 0--discard and not wake host;
5259*4882a593Smuzhiyun 		    1--discard and wake host;
5260*4882a593Smuzhiyun 		    3--allow and wake host;*/
5261*4882a593Smuzhiyun 	t_u8 action;
5262*4882a593Smuzhiyun 	/** filter number */
5263*4882a593Smuzhiyun 	t_u8 filter_num;
5264*4882a593Smuzhiyun 	/** filter array*/
5265*4882a593Smuzhiyun 	mef_filter_t filter_item[MAX_NUM_FILTERS];
5266*4882a593Smuzhiyun 	/** rpn array*/
5267*4882a593Smuzhiyun 	t_u8 rpn[MAX_NUM_FILTERS];
5268*4882a593Smuzhiyun } mef_entry_t;
5269*4882a593Smuzhiyun 
5270*4882a593Smuzhiyun /** Type definition of mlan_ds_nvflt_mef_entry
5271*4882a593Smuzhiyun  *for MLAN_OID_MISC_MEF_FLT_CFG
5272*4882a593Smuzhiyun  */
5273*4882a593Smuzhiyun typedef struct _mlan_ds_misc_mef_flt_cfg {
5274*4882a593Smuzhiyun 	/** Type of action*/
5275*4882a593Smuzhiyun 	int mef_act_type;
5276*4882a593Smuzhiyun 	/** Operation code*/
5277*4882a593Smuzhiyun 	t_u32 op_code;
5278*4882a593Smuzhiyun 	/** NV Filter Criteria*/
5279*4882a593Smuzhiyun 	t_u32 criteria;
5280*4882a593Smuzhiyun 	/** NV MEF entry*/
5281*4882a593Smuzhiyun 	mef_entry_t mef_entry;
5282*4882a593Smuzhiyun } mlan_ds_misc_mef_flt_cfg;
5283*4882a593Smuzhiyun 
5284*4882a593Smuzhiyun /** Enumeration for action type*/
5285*4882a593Smuzhiyun enum _mlan_act_mef_act_type {
5286*4882a593Smuzhiyun 	MEF_ACT_ADD = 1,
5287*4882a593Smuzhiyun 	MEF_ACT_ENABLE,
5288*4882a593Smuzhiyun 	MEF_ACT_DISABLE,
5289*4882a593Smuzhiyun 	MEF_ACT_CANCEL,
5290*4882a593Smuzhiyun 	MEF_ACT_AUTOARP,
5291*4882a593Smuzhiyun 	MEF_ACT_WOWLAN,
5292*4882a593Smuzhiyun 	MEF_ACT_IPV6_NS,
5293*4882a593Smuzhiyun };
5294*4882a593Smuzhiyun 
5295*4882a593Smuzhiyun typedef struct _mlan_ds_sensor_temp {
5296*4882a593Smuzhiyun 	t_u32 temperature;
5297*4882a593Smuzhiyun } mlan_ds_sensor_temp;
5298*4882a593Smuzhiyun 
5299*4882a593Smuzhiyun #define MLAN_KCK_LEN 16
5300*4882a593Smuzhiyun #define MLAN_KEK_LEN 16
5301*4882a593Smuzhiyun #define MLAN_REPLAY_CTR_LEN 8
5302*4882a593Smuzhiyun /** mlan_ds_misc_gtk_rekey_data */
5303*4882a593Smuzhiyun typedef struct _mlan_ds_misc_gtk_rekey_data {
5304*4882a593Smuzhiyun 	/** key encryption key */
5305*4882a593Smuzhiyun 	t_u8 kek[MLAN_KEK_LEN];
5306*4882a593Smuzhiyun 	/** key confirmation key */
5307*4882a593Smuzhiyun 	t_u8 kck[MLAN_KCK_LEN];
5308*4882a593Smuzhiyun 	/** replay counter */
5309*4882a593Smuzhiyun 	t_u8 replay_ctr[MLAN_REPLAY_CTR_LEN];
5310*4882a593Smuzhiyun } mlan_ds_misc_gtk_rekey_data;
5311*4882a593Smuzhiyun typedef struct _mlan_ds_bw_chan_oper {
5312*4882a593Smuzhiyun 	/* bandwidth 20:20M 40:40M 80:80M*/
5313*4882a593Smuzhiyun 	t_u8 bandwidth;
5314*4882a593Smuzhiyun 	/* channel number */
5315*4882a593Smuzhiyun 	t_u8 channel;
5316*4882a593Smuzhiyun 	/* Non-global operating class */
5317*4882a593Smuzhiyun 	t_u8 oper_class;
5318*4882a593Smuzhiyun } mlan_ds_bw_chan_oper;
5319*4882a593Smuzhiyun 
5320*4882a593Smuzhiyun typedef struct _mlan_ds_ind_rst_cfg {
5321*4882a593Smuzhiyun 	/** Set or Get */
5322*4882a593Smuzhiyun 	t_u16 action;
5323*4882a593Smuzhiyun 	/** oob mode enable/ disable */
5324*4882a593Smuzhiyun 	t_u8 ir_mode;
5325*4882a593Smuzhiyun 	/** gpio pin */
5326*4882a593Smuzhiyun 	t_u8 gpio_pin;
5327*4882a593Smuzhiyun } mlan_ds_ind_rst_cfg;
5328*4882a593Smuzhiyun 
5329*4882a593Smuzhiyun #define MKEEP_ALIVE_IP_PKT_MAX 256
5330*4882a593Smuzhiyun typedef struct _mlan_ds_misc_keep_alive {
5331*4882a593Smuzhiyun 	t_u8 mkeep_alive_id;
5332*4882a593Smuzhiyun 	t_u8 enable;
5333*4882a593Smuzhiyun 	/** enable/disable tcp reset*/
5334*4882a593Smuzhiyun 	t_u8 reset;
5335*4882a593Smuzhiyun 	/**True means saved in driver, false means not saved or download*/
5336*4882a593Smuzhiyun 	t_u8 cached;
5337*4882a593Smuzhiyun 	t_u32 send_interval;
5338*4882a593Smuzhiyun 	t_u16 retry_interval;
5339*4882a593Smuzhiyun 	t_u16 retry_count;
5340*4882a593Smuzhiyun 	t_u8 dst_mac[MLAN_MAC_ADDR_LENGTH];
5341*4882a593Smuzhiyun 	t_u8 src_mac[MLAN_MAC_ADDR_LENGTH];
5342*4882a593Smuzhiyun 	t_u16 pkt_len;
5343*4882a593Smuzhiyun 	t_u8 packet[MKEEP_ALIVE_IP_PKT_MAX];
5344*4882a593Smuzhiyun 	/** Ethernet type */
5345*4882a593Smuzhiyun 	t_u16 ether_type;
5346*4882a593Smuzhiyun } mlan_ds_misc_keep_alive, *pmlan_ds_misc_keep_alive;
5347*4882a593Smuzhiyun 
5348*4882a593Smuzhiyun /** TX and RX histogram statistic parameters*/
5349*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_misc_tx_rx_histogram {
5350*4882a593Smuzhiyun 	/** Enable or disable get tx/rx histogram statistic */
5351*4882a593Smuzhiyun 	t_u8 enable;
5352*4882a593Smuzhiyun 	/** Choose to get TX, RX or both histogram statistic */
5353*4882a593Smuzhiyun 	t_u16 action;
5354*4882a593Smuzhiyun 	/** Size of Tx/Rx info */
5355*4882a593Smuzhiyun 	t_u16 size;
5356*4882a593Smuzhiyun 	/** Store Tx/Rx info */
5357*4882a593Smuzhiyun 	t_u8 value[1];
5358*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_misc_tx_rx_histogram;
5359*4882a593Smuzhiyun 
5360*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_cw_mode_ctrl {
5361*4882a593Smuzhiyun 	/** Mode of Operation 0: Disable 1: Tx Continuous Packet 2: Tx
5362*4882a593Smuzhiyun 	 * Continuous Wave */
5363*4882a593Smuzhiyun 	t_u8 mode;
5364*4882a593Smuzhiyun 	/*channel*/
5365*4882a593Smuzhiyun 	t_u8 channel;
5366*4882a593Smuzhiyun 	/* channel info*/
5367*4882a593Smuzhiyun 	t_u8 chanInfo;
5368*4882a593Smuzhiyun 	/** Tx Power level in dBm */
5369*4882a593Smuzhiyun 	t_u16 txPower;
5370*4882a593Smuzhiyun 	/** Packet Length */
5371*4882a593Smuzhiyun 	t_u16 pktLength;
5372*4882a593Smuzhiyun 	/** bit rate Info */
5373*4882a593Smuzhiyun 	t_u32 rateInfo;
5374*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_cw_mode_ctrl;
5375*4882a593Smuzhiyun 
5376*4882a593Smuzhiyun #define RX_PKT_INFO MBIT(1)
5377*4882a593Smuzhiyun /** Struct for per-packet configuration */
5378*4882a593Smuzhiyun typedef struct _mlan_per_pkt_cfg {
5379*4882a593Smuzhiyun 	/** Type ID*/
5380*4882a593Smuzhiyun 	t_u16 type;
5381*4882a593Smuzhiyun 	/** Length of payload*/
5382*4882a593Smuzhiyun 	t_u16 len;
5383*4882a593Smuzhiyun 	/**  Tx/Rx per-packet control */
5384*4882a593Smuzhiyun 	t_u8 tx_rx_control;
5385*4882a593Smuzhiyun 	/** Number of ethernet types in ether_type array */
5386*4882a593Smuzhiyun 	t_u8 proto_type_num;
5387*4882a593Smuzhiyun 	/** Array of ether_type for per-packet control */
5388*4882a593Smuzhiyun 	t_u16 ether_type[];
5389*4882a593Smuzhiyun } mlan_per_pkt_cfg;
5390*4882a593Smuzhiyun 
5391*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_robustcoex_params for MLAN_IOCTL_MISC_CFG */
5392*4882a593Smuzhiyun typedef struct _mlan_ds_misc_robustcoex_params {
5393*4882a593Smuzhiyun 	t_u16 method;
5394*4882a593Smuzhiyun 	/** enable/disable robustcoex gpio cfg */
5395*4882a593Smuzhiyun 	t_u8 enable;
5396*4882a593Smuzhiyun 	/** Number of GPIO */
5397*4882a593Smuzhiyun 	t_u8 gpio_num;
5398*4882a593Smuzhiyun 	/** Polarity of GPIO */
5399*4882a593Smuzhiyun 	t_u8 gpio_polarity;
5400*4882a593Smuzhiyun } mlan_ds_misc_robustcoex_params;
5401*4882a593Smuzhiyun 
5402*4882a593Smuzhiyun #if defined(PCIE)
5403*4882a593Smuzhiyun typedef struct _mlan_ds_ssu_params {
5404*4882a593Smuzhiyun 	t_u32 nskip;
5405*4882a593Smuzhiyun 	t_u32 nsel;
5406*4882a593Smuzhiyun 	t_u32 adcdownsample;
5407*4882a593Smuzhiyun 	t_u32 mask_adc_pkt;
5408*4882a593Smuzhiyun 	t_u32 out_16bits;
5409*4882a593Smuzhiyun 	t_u32 spec_pwr_enable;
5410*4882a593Smuzhiyun 	t_u32 rate_deduction;
5411*4882a593Smuzhiyun 	t_u32 n_pkt_avg;
5412*4882a593Smuzhiyun } mlan_ds_ssu_params;
5413*4882a593Smuzhiyun #endif
5414*4882a593Smuzhiyun 
5415*4882a593Smuzhiyun #define CSI_FILTER_MAX 16
5416*4882a593Smuzhiyun /** Structure of CSI filters */
5417*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_csi_filter_t {
5418*4882a593Smuzhiyun 	/** Source address of the packet to receive */
5419*4882a593Smuzhiyun 	t_u8 mac_addr[MLAN_MAC_ADDR_LENGTH];
5420*4882a593Smuzhiyun 	/** Pakcet type of the interested CSI */
5421*4882a593Smuzhiyun 	t_u8 pkt_type;
5422*4882a593Smuzhiyun 	/* Packet subtype of the interested CSI */
5423*4882a593Smuzhiyun 	t_u8 subtype;
5424*4882a593Smuzhiyun 	/* Other filter flags */
5425*4882a593Smuzhiyun 	t_u8 flags;
5426*4882a593Smuzhiyun } MLAN_PACK_END mlan_csi_filter_t;
5427*4882a593Smuzhiyun /** Structure of CSI parameters */
5428*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_csi_params {
5429*4882a593Smuzhiyun 	/** CSI enable flag. 1: enable, 0: disable */
5430*4882a593Smuzhiyun 	t_u16 csi_enable;
5431*4882a593Smuzhiyun 	/** Header ID*/
5432*4882a593Smuzhiyun 	t_u32 head_id;
5433*4882a593Smuzhiyun 	/** Tail ID */
5434*4882a593Smuzhiyun 	t_u32 tail_id;
5435*4882a593Smuzhiyun 	/** Number of CSI filters */
5436*4882a593Smuzhiyun 	t_u8 csi_filter_cnt;
5437*4882a593Smuzhiyun 	/** Chip ID */
5438*4882a593Smuzhiyun 	t_u8 chip_id;
5439*4882a593Smuzhiyun 	/** CSI filters */
5440*4882a593Smuzhiyun 	mlan_csi_filter_t csi_filter[CSI_FILTER_MAX];
5441*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_csi_params;
5442*4882a593Smuzhiyun 
5443*4882a593Smuzhiyun typedef MLAN_PACK_START struct _mlan_ds_hal_phy_cfg_params {
5444*4882a593Smuzhiyun 	/** 11b pwr spectral density mask enable/disable */
5445*4882a593Smuzhiyun 	t_u8 dot11b_psd_mask_cfg;
5446*4882a593Smuzhiyun 	/** reserved fields for future hal/phy cfg use */
5447*4882a593Smuzhiyun 	t_u8 reserved[7];
5448*4882a593Smuzhiyun } MLAN_PACK_END mlan_ds_hal_phy_cfg_params;
5449*4882a593Smuzhiyun 
5450*4882a593Smuzhiyun #define MAX_NUM_MAC 2
5451*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_mapping_policy */
5452*4882a593Smuzhiyun typedef struct _mlan_ds_misc_mapping_policy {
5453*4882a593Smuzhiyun 	/** Enable/disable dynamic mapping */
5454*4882a593Smuzhiyun 	t_u16 subcmd;
5455*4882a593Smuzhiyun 	/** Mapping policy */
5456*4882a593Smuzhiyun 	t_u8 mapping_policy;
5457*4882a593Smuzhiyun } mlan_ds_misc_mapping_policy, *pmlan_ds_misc_mapping_policy;
5458*4882a593Smuzhiyun 
5459*4882a593Smuzhiyun typedef struct _dmcsChanStatus_t {
5460*4882a593Smuzhiyun 	/** Channel number */
5461*4882a593Smuzhiyun 	t_u8 channel;
5462*4882a593Smuzhiyun 	/** Number of ap on this channel */
5463*4882a593Smuzhiyun 	t_u8 ap_count;
5464*4882a593Smuzhiyun 	/** Number of sta on this channel */
5465*4882a593Smuzhiyun 	t_u8 sta_count;
5466*4882a593Smuzhiyun } dmcsChanStatus_t, *pdmcsChanStatus_t;
5467*4882a593Smuzhiyun 
5468*4882a593Smuzhiyun typedef struct _dmcsStatus_t {
5469*4882a593Smuzhiyun 	/** Radio ID */
5470*4882a593Smuzhiyun 	t_u8 radio_id;
5471*4882a593Smuzhiyun 	/** Running mode
5472*4882a593Smuzhiyun 	** 0 - Idle
5473*4882a593Smuzhiyun 	** 1 - DBC
5474*4882a593Smuzhiyun 	** 2 - DRCS
5475*4882a593Smuzhiyun 	*/
5476*4882a593Smuzhiyun 	t_u8 running_mode;
5477*4882a593Smuzhiyun 	/** Current channel status */
5478*4882a593Smuzhiyun 	dmcsChanStatus_t chan_status[2];
5479*4882a593Smuzhiyun } dmcsStatus_t, *pdmcsStatus_t;
5480*4882a593Smuzhiyun 
5481*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_dmcs_status */
5482*4882a593Smuzhiyun typedef struct _mlan_ds_misc_dmcs_status {
5483*4882a593Smuzhiyun 	t_u8 mapping_policy;
5484*4882a593Smuzhiyun 	dmcsStatus_t radio_status[MAX_NUM_MAC];
5485*4882a593Smuzhiyun } mlan_ds_misc_dmcs_status, *pmlan_ds_misc_dmcs_status;
5486*4882a593Smuzhiyun 
5487*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_chan_trpc_cfg for
5488*4882a593Smuzhiyun  * MLAN_OID_MISC_GET_CHAN_TRPC_CFG */
5489*4882a593Smuzhiyun typedef struct _mlan_ds_misc_chan_trpc_cfg {
5490*4882a593Smuzhiyun 	/** sub_band */
5491*4882a593Smuzhiyun 	t_u16 sub_band;
5492*4882a593Smuzhiyun 	/** length */
5493*4882a593Smuzhiyun 	t_u16 length;
5494*4882a593Smuzhiyun 	/** buf */
5495*4882a593Smuzhiyun 	t_u8 trpc_buf[2048];
5496*4882a593Smuzhiyun } mlan_ds_misc_chan_trpc_cfg;
5497*4882a593Smuzhiyun 
5498*4882a593Smuzhiyun #define MFG_CMD_SET_TEST_MODE 1
5499*4882a593Smuzhiyun #define MFG_CMD_UNSET_TEST_MODE 0
5500*4882a593Smuzhiyun #define MFG_CMD_TX_ANT 0x1004
5501*4882a593Smuzhiyun #define MFG_CMD_RX_ANT 0x1005
5502*4882a593Smuzhiyun #define MFG_CMD_TX_CONT 0x1009
5503*4882a593Smuzhiyun #define MFG_CMD_RF_CHAN 0x100A
5504*4882a593Smuzhiyun #define MFG_CMD_CLR_RX_ERR 0x1010
5505*4882a593Smuzhiyun #define MFG_CMD_TX_FRAME 0x1021
5506*4882a593Smuzhiyun #define MFG_CMD_RFPWR 0x1033
5507*4882a593Smuzhiyun #define MFG_CMD_RF_BAND_AG 0x1034
5508*4882a593Smuzhiyun #define MFG_CMD_RF_CHANNELBW 0x1044
5509*4882a593Smuzhiyun #define MFG_CMD_RADIO_MODE_CFG 0x1211
5510*4882a593Smuzhiyun #define MFG_CMD_CONFIG_MAC_HE_TB_TX 0x110A
5511*4882a593Smuzhiyun /** MFG CMD generic cfg */
5512*4882a593Smuzhiyun struct MLAN_PACK_START mfg_cmd_generic_cfg {
5513*4882a593Smuzhiyun 	/** MFG command code */
5514*4882a593Smuzhiyun 	t_u32 mfg_cmd;
5515*4882a593Smuzhiyun 	/** Action */
5516*4882a593Smuzhiyun 	t_u16 action;
5517*4882a593Smuzhiyun 	/** Device ID */
5518*4882a593Smuzhiyun 	t_u16 device_id;
5519*4882a593Smuzhiyun 	/** MFG Error code */
5520*4882a593Smuzhiyun 	t_u32 error;
5521*4882a593Smuzhiyun 	/** value 1 */
5522*4882a593Smuzhiyun 	t_u32 data1;
5523*4882a593Smuzhiyun 	/** value 2 */
5524*4882a593Smuzhiyun 	t_u32 data2;
5525*4882a593Smuzhiyun 	/** value 3 */
5526*4882a593Smuzhiyun 	t_u32 data3;
5527*4882a593Smuzhiyun } MLAN_PACK_END;
5528*4882a593Smuzhiyun 
5529*4882a593Smuzhiyun /** MFG CMD Tx Frame 2 */
5530*4882a593Smuzhiyun struct MLAN_PACK_START mfg_cmd_tx_frame2 {
5531*4882a593Smuzhiyun 	/** MFG command code */
5532*4882a593Smuzhiyun 	t_u32 mfg_cmd;
5533*4882a593Smuzhiyun 	/** Action */
5534*4882a593Smuzhiyun 	t_u16 action;
5535*4882a593Smuzhiyun 	/** Device ID */
5536*4882a593Smuzhiyun 	t_u16 device_id;
5537*4882a593Smuzhiyun 	/** MFG Error code */
5538*4882a593Smuzhiyun 	t_u32 error;
5539*4882a593Smuzhiyun 	/** enable */
5540*4882a593Smuzhiyun 	t_u32 enable;
5541*4882a593Smuzhiyun 	/** data_rate */
5542*4882a593Smuzhiyun 	t_u32 data_rate;
5543*4882a593Smuzhiyun 	/** frame pattern */
5544*4882a593Smuzhiyun 	t_u32 frame_pattern;
5545*4882a593Smuzhiyun 	/** frame length */
5546*4882a593Smuzhiyun 	t_u32 frame_length;
5547*4882a593Smuzhiyun 	/** BSSID */
5548*4882a593Smuzhiyun 	t_u8 bssid[MLAN_MAC_ADDR_LENGTH];
5549*4882a593Smuzhiyun 	/** Adjust burst sifs */
5550*4882a593Smuzhiyun 	t_u16 adjust_burst_sifs;
5551*4882a593Smuzhiyun 	/** Burst sifs in us*/
5552*4882a593Smuzhiyun 	t_u32 burst_sifs_in_us;
5553*4882a593Smuzhiyun 	/** short preamble */
5554*4882a593Smuzhiyun 	t_u32 short_preamble;
5555*4882a593Smuzhiyun 	/** active sub channel */
5556*4882a593Smuzhiyun 	t_u32 act_sub_ch;
5557*4882a593Smuzhiyun 	/** short GI */
5558*4882a593Smuzhiyun 	t_u32 short_gi;
5559*4882a593Smuzhiyun 	/** Adv coding */
5560*4882a593Smuzhiyun 	t_u32 adv_coding;
5561*4882a593Smuzhiyun 	/** Tx beamforming */
5562*4882a593Smuzhiyun 	t_u32 tx_bf;
5563*4882a593Smuzhiyun 	/** HT Greenfield Mode*/
5564*4882a593Smuzhiyun 	t_u32 gf_mode;
5565*4882a593Smuzhiyun 	/** STBC */
5566*4882a593Smuzhiyun 	t_u32 stbc;
5567*4882a593Smuzhiyun 	/** power id */
5568*4882a593Smuzhiyun 	t_u32 rsvd[2];
5569*4882a593Smuzhiyun 	/** NumPkt */
5570*4882a593Smuzhiyun 	t_u32 NumPkt;
5571*4882a593Smuzhiyun 	/** MaxPE */
5572*4882a593Smuzhiyun 	t_u32 MaxPE;
5573*4882a593Smuzhiyun 	/** BeamChange */
5574*4882a593Smuzhiyun 	t_u32 BeamChange;
5575*4882a593Smuzhiyun 	/** Dcm */
5576*4882a593Smuzhiyun 	t_u32 Dcm;
5577*4882a593Smuzhiyun 	/** Doppler */
5578*4882a593Smuzhiyun 	t_u32 Doppler;
5579*4882a593Smuzhiyun 	/** MidP */
5580*4882a593Smuzhiyun 	t_u32 MidP;
5581*4882a593Smuzhiyun 	/** QNum */
5582*4882a593Smuzhiyun 	t_u32 QNum;
5583*4882a593Smuzhiyun 
5584*4882a593Smuzhiyun } MLAN_PACK_END;
5585*4882a593Smuzhiyun 
5586*4882a593Smuzhiyun /* MFG CMD Tx Continuous */
5587*4882a593Smuzhiyun struct MLAN_PACK_START mfg_cmd_tx_cont {
5588*4882a593Smuzhiyun 	/** MFG command code */
5589*4882a593Smuzhiyun 	t_u32 mfg_cmd;
5590*4882a593Smuzhiyun 	/** Action */
5591*4882a593Smuzhiyun 	t_u16 action;
5592*4882a593Smuzhiyun 	/** Device ID */
5593*4882a593Smuzhiyun 	t_u16 device_id;
5594*4882a593Smuzhiyun 	/** MFG Error code */
5595*4882a593Smuzhiyun 	t_u32 error;
5596*4882a593Smuzhiyun 	/** enable Tx*/
5597*4882a593Smuzhiyun 	t_u32 enable_tx;
5598*4882a593Smuzhiyun 	/** Continuous Wave mode */
5599*4882a593Smuzhiyun 	t_u32 cw_mode;
5600*4882a593Smuzhiyun 	/** payload pattern */
5601*4882a593Smuzhiyun 	t_u32 payload_pattern;
5602*4882a593Smuzhiyun 	/** CS Mode */
5603*4882a593Smuzhiyun 	t_u32 cs_mode;
5604*4882a593Smuzhiyun 	/** active sub channel */
5605*4882a593Smuzhiyun 	t_u32 act_sub_ch;
5606*4882a593Smuzhiyun 	/** Tx rate */
5607*4882a593Smuzhiyun 	t_u32 tx_rate;
5608*4882a593Smuzhiyun 	/** power id */
5609*4882a593Smuzhiyun 	t_u32 rsvd;
5610*4882a593Smuzhiyun } MLAN_PACK_END;
5611*4882a593Smuzhiyun 
5612*4882a593Smuzhiyun struct MLAN_PACK_START mfg_Cmd_HE_TBTx_t {
5613*4882a593Smuzhiyun 	/** MFG command code */
5614*4882a593Smuzhiyun 	t_u32 mfg_cmd;
5615*4882a593Smuzhiyun 	/** Action */
5616*4882a593Smuzhiyun 	t_u16 action;
5617*4882a593Smuzhiyun 	/** Device ID */
5618*4882a593Smuzhiyun 	t_u16 device_id;
5619*4882a593Smuzhiyun 	/** MFG Error code */
5620*4882a593Smuzhiyun 	t_u32 error;
5621*4882a593Smuzhiyun 	/** Enable Tx */
5622*4882a593Smuzhiyun 	t_u16 enable;
5623*4882a593Smuzhiyun 	/** Q num */
5624*4882a593Smuzhiyun 	t_u16 qnum;
5625*4882a593Smuzhiyun 	/** AID */
5626*4882a593Smuzhiyun 	t_u16 aid;
5627*4882a593Smuzhiyun 	/** AXQ Mu Timer */
5628*4882a593Smuzhiyun 	t_u16 axq_mu_timer;
5629*4882a593Smuzhiyun 	/** Tx Power */
5630*4882a593Smuzhiyun 	t_u16 tx_power;
5631*4882a593Smuzhiyun } MLAN_PACK_END;
5632*4882a593Smuzhiyun 
5633*4882a593Smuzhiyun typedef struct _mlan_ds_misc_chnrgpwr_cfg {
5634*4882a593Smuzhiyun 	/** length */
5635*4882a593Smuzhiyun 	t_u16 length;
5636*4882a593Smuzhiyun 	/** chnrgpwr buf */
5637*4882a593Smuzhiyun 	t_u8 chnrgpwr_buf[2048];
5638*4882a593Smuzhiyun } mlan_ds_misc_chnrgpwr_cfg;
5639*4882a593Smuzhiyun 
5640*4882a593Smuzhiyun /** dfs chan list for MLAN_OID_MISC_CFP_TABLE */
5641*4882a593Smuzhiyun typedef struct _mlan_ds_misc_cfp_tbl {
5642*4882a593Smuzhiyun 	/** band */
5643*4882a593Smuzhiyun 	t_u8 band;
5644*4882a593Smuzhiyun 	/** num chan */
5645*4882a593Smuzhiyun 	t_u8 num_chan;
5646*4882a593Smuzhiyun 	/** cfp table */
5647*4882a593Smuzhiyun 	chan_freq_power_t cfp_tbl[];
5648*4882a593Smuzhiyun } mlan_ds_misc_cfp_tbl;
5649*4882a593Smuzhiyun 
5650*4882a593Smuzhiyun /** mlan_ds_mc_aggr_cfg for MLAN_OID_MISC_MC_AGGR_CFG */
5651*4882a593Smuzhiyun typedef struct _mlan_ds_mc_aggr_cfg {
5652*4882a593Smuzhiyun 	/** action */
5653*4882a593Smuzhiyun 	t_u8 action;
5654*4882a593Smuzhiyun 	/* 1 enable, 0 disable
5655*4882a593Smuzhiyun 	 * bit 0 MC aggregation
5656*4882a593Smuzhiyun 	 * bit 1 packet expiry
5657*4882a593Smuzhiyun 	 * bit 2 CTS2Self
5658*4882a593Smuzhiyun 	 * bit 3 CTS2Self duration offset*/
5659*4882a593Smuzhiyun 	t_u8 enable_bitmap;
5660*4882a593Smuzhiyun 	/* 1 valid, 0 invalid
5661*4882a593Smuzhiyun 	 * bit 0 MC aggregation
5662*4882a593Smuzhiyun 	 * bit 1 packet expiry
5663*4882a593Smuzhiyun 	 * bit 2 CTS2Self
5664*4882a593Smuzhiyun 	 * bit 3 CTS2Self duration offset*/
5665*4882a593Smuzhiyun 	t_u8 mask_bitmap;
5666*4882a593Smuzhiyun 	/** CTS2Self duration offset */
5667*4882a593Smuzhiyun 	t_u16 cts2self_offset;
5668*4882a593Smuzhiyun } mlan_ds_mc_aggr_cfg;
5669*4882a593Smuzhiyun 
5670*4882a593Smuzhiyun /** mlan_ds_stats */
5671*4882a593Smuzhiyun typedef struct _mlan_ds_stats {
5672*4882a593Smuzhiyun 	/** action */
5673*4882a593Smuzhiyun 	t_u16 action;
5674*4882a593Smuzhiyun 	/** tlv len */
5675*4882a593Smuzhiyun 	t_u16 tlv_len;
5676*4882a593Smuzhiyun 	/** TLV buffer */
5677*4882a593Smuzhiyun 	t_u8 tlv_buf[1];
5678*4882a593Smuzhiyun } mlan_ds_stats;
5679*4882a593Smuzhiyun 
5680*4882a593Smuzhiyun typedef struct _mlan_ds_ch_load {
5681*4882a593Smuzhiyun 	/** action */
5682*4882a593Smuzhiyun 	t_u8 action;
5683*4882a593Smuzhiyun 	t_u16 ch_load_param;
5684*4882a593Smuzhiyun 	t_s16 noise;
5685*4882a593Smuzhiyun 	t_u16 rx_quality;
5686*4882a593Smuzhiyun 	t_u16 duration;
5687*4882a593Smuzhiyun } mlan_ds_ch_load;
5688*4882a593Smuzhiyun 
5689*4882a593Smuzhiyun /** Type definition of mlan_ds_misc_cfg for MLAN_IOCTL_MISC_CFG */
5690*4882a593Smuzhiyun typedef struct _mlan_ds_misc_cfg {
5691*4882a593Smuzhiyun 	/** Sub-command */
5692*4882a593Smuzhiyun 	t_u32 sub_command;
5693*4882a593Smuzhiyun 	/** Miscellaneous configuration parameter */
5694*4882a593Smuzhiyun 	union {
5695*4882a593Smuzhiyun 		/** Generic IE for MLAN_OID_MISC_GEN_IE */
5696*4882a593Smuzhiyun 		mlan_ds_misc_gen_ie gen_ie;
5697*4882a593Smuzhiyun 		/** Region code for MLAN_OID_MISC_REGION */
5698*4882a593Smuzhiyun 		t_u32 region_code;
5699*4882a593Smuzhiyun #ifdef SDIO
5700*4882a593Smuzhiyun 		/** SDIO MP-A Ctrl command for MLAN_OID_MISC_SDIO_MPA_CTRL */
5701*4882a593Smuzhiyun 		mlan_ds_misc_sdio_mpa_ctrl mpa_ctrl;
5702*4882a593Smuzhiyun #endif
5703*4882a593Smuzhiyun 		/** Hostcmd for MLAN_OID_MISC_HOST_CMD */
5704*4882a593Smuzhiyun 		mlan_ds_misc_cmd hostcmd;
5705*4882a593Smuzhiyun 		/** System clock for MLAN_OID_MISC_SYS_CLOCK */
5706*4882a593Smuzhiyun 		mlan_ds_misc_sys_clock sys_clock;
5707*4882a593Smuzhiyun 		/** WWS set/get for MLAN_OID_MISC_WWS */
5708*4882a593Smuzhiyun 		t_u32 wws_cfg;
5709*4882a593Smuzhiyun 		/** Get associate response for MLAN_OID_MISC_ASSOC_RSP */
5710*4882a593Smuzhiyun 		mlan_ds_misc_assoc_rsp assoc_resp;
5711*4882a593Smuzhiyun 		/** Get associate request for MLAN_OID_MISC_ASSOC_REQ */
5712*4882a593Smuzhiyun 		mlan_ds_misc_assoc_req assoc_req;
5713*4882a593Smuzhiyun 		/** Function init/shutdown for MLAN_OID_MISC_INIT_SHUTDOWN */
5714*4882a593Smuzhiyun 		t_u32 func_init_shutdown;
5715*4882a593Smuzhiyun 		/** Custom IE for MLAN_OID_MISC_CUSTOM_IE */
5716*4882a593Smuzhiyun 		mlan_ds_misc_custom_ie cust_ie;
5717*4882a593Smuzhiyun 		t_u16 tdls_idle_time;
5718*4882a593Smuzhiyun 		/** Config dynamic bandwidth*/
5719*4882a593Smuzhiyun 		t_u16 dyn_bw;
5720*4882a593Smuzhiyun 		/** TDLS configuration for MLAN_OID_MISC_TDLS_CONFIG */
5721*4882a593Smuzhiyun 		mlan_ds_misc_tdls_config tdls_config;
5722*4882a593Smuzhiyun 		/** TDLS operation for MLAN_OID_MISC_TDLS_OPER */
5723*4882a593Smuzhiyun 		mlan_ds_misc_tdls_oper tdls_oper;
5724*4882a593Smuzhiyun 		/** TDLS ies for  MLAN_OID_MISC_GET_TDLS_IES */
5725*4882a593Smuzhiyun 		mlan_ds_misc_tdls_ies tdls_ies;
5726*4882a593Smuzhiyun 		/**tdls cs off channel*/
5727*4882a593Smuzhiyun 		t_u8 tdls_cs_channel;
5728*4882a593Smuzhiyun 		/** Net monitor for MLAN_OID_MISC_NET_MONITOR */
5729*4882a593Smuzhiyun 		mlan_ds_misc_net_monitor net_mon;
5730*4882a593Smuzhiyun 		/** Tx data pause for MLAN_OID_MISC_TX_DATAPAUSE */
5731*4882a593Smuzhiyun 		mlan_ds_misc_tx_datapause tx_datapause;
5732*4882a593Smuzhiyun 		/** IP address configuration */
5733*4882a593Smuzhiyun 		mlan_ds_misc_ipaddr_cfg ipaddr_cfg;
5734*4882a593Smuzhiyun 		/** IPv6 Router Advertisement offload configuration */
5735*4882a593Smuzhiyun 		mlan_ds_misc_ipv6_ra_offload ipv6_ra_offload;
5736*4882a593Smuzhiyun 		/** MAC control for MLAN_OID_MISC_MAC_CONTROL */
5737*4882a593Smuzhiyun 		t_u32 mac_ctrl;
5738*4882a593Smuzhiyun 		/** MEF configuration for MLAN_OID_MISC_MEF_CFG */
5739*4882a593Smuzhiyun 		mlan_ds_misc_mef_cfg mef_cfg;
5740*4882a593Smuzhiyun 		/** CFP code for MLAN_OID_MISC_CFP_CODE */
5741*4882a593Smuzhiyun 		mlan_ds_misc_cfp_code cfp_code;
5742*4882a593Smuzhiyun 		/** Country code for MLAN_OID_MISC_COUNTRY_CODE */
5743*4882a593Smuzhiyun 		mlan_ds_misc_country_code country_code;
5744*4882a593Smuzhiyun 		/** Thermal reading for MLAN_OID_MISC_THERMAL */
5745*4882a593Smuzhiyun 		t_u32 thermal;
5746*4882a593Smuzhiyun 		/** Mgmt subtype mask for MLAN_OID_MISC_RX_MGMT_IND */
5747*4882a593Smuzhiyun 		t_u32 mgmt_subtype_mask;
5748*4882a593Smuzhiyun 		/** subscribe event for MLAN_OID_MISC_SUBSCRIBE_EVENT */
5749*4882a593Smuzhiyun 		mlan_ds_subscribe_evt subscribe_event;
5750*4882a593Smuzhiyun #ifdef DEBUG_LEVEL1
5751*4882a593Smuzhiyun 		/** Driver debug bit masks */
5752*4882a593Smuzhiyun 		t_u32 drvdbg;
5753*4882a593Smuzhiyun #endif
5754*4882a593Smuzhiyun 		/** Hotspot config param set */
5755*4882a593Smuzhiyun 		t_u32 hotspot_cfg;
5756*4882a593Smuzhiyun #ifdef STA_SUPPORT
5757*4882a593Smuzhiyun 		ExtCap_t ext_cap;
5758*4882a593Smuzhiyun #endif
5759*4882a593Smuzhiyun 		mlan_ds_misc_otp_user_data otp_user_data;
5760*4882a593Smuzhiyun 		/** fw re-connect cfg param set */
5761*4882a593Smuzhiyun 		mlan_ds_fw_reconnect fw_auto_reconnect;
5762*4882a593Smuzhiyun #ifdef USB
5763*4882a593Smuzhiyun 		/** USB aggregation parameters for MLAN_OID_MISC_USB_AGGR_CTRL
5764*4882a593Smuzhiyun 		 */
5765*4882a593Smuzhiyun 		mlan_ds_misc_usb_aggr_ctrl usb_aggr_params;
5766*4882a593Smuzhiyun #endif
5767*4882a593Smuzhiyun 		mlan_ds_misc_aggr_ctrl aggr_params;
5768*4882a593Smuzhiyun 		/** Tx control */
5769*4882a593Smuzhiyun 		t_u32 tx_control;
5770*4882a593Smuzhiyun #if defined(STA_SUPPORT)
5771*4882a593Smuzhiyun 		mlan_ds_misc_pmfcfg pmfcfg;
5772*4882a593Smuzhiyun #endif
5773*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
5774*4882a593Smuzhiyun 		mlan_ds_wifi_direct_config p2p_config;
5775*4882a593Smuzhiyun #endif
5776*4882a593Smuzhiyun 		mlan_ds_gpio_tsf_latch gpio_tsf_latch_config;
5777*4882a593Smuzhiyun 		mlan_ds_tsf_info tsf_info;
5778*4882a593Smuzhiyun 		mlan_ds_coalesce_cfg coalesce_cfg;
5779*4882a593Smuzhiyun 		t_u8 low_pwr_mode;
5780*4882a593Smuzhiyun 		/** MEF-FLT-CONFIG for MLAN_OID_MISC_NV_FLT_CFG */
5781*4882a593Smuzhiyun 		mlan_ds_misc_mef_flt_cfg mef_flt_cfg;
5782*4882a593Smuzhiyun 		mlan_ds_misc_dfs_repeater dfs_repeater;
5783*4882a593Smuzhiyun #ifdef RX_PACKET_COALESCE
5784*4882a593Smuzhiyun 		mlan_ds_misc_rx_packet_coalesce rx_coalesce;
5785*4882a593Smuzhiyun #endif
5786*4882a593Smuzhiyun 		/** FW reload flag */
5787*4882a593Smuzhiyun 		t_u8 fw_reload;
5788*4882a593Smuzhiyun 		mlan_ds_sensor_temp sensor_temp;
5789*4882a593Smuzhiyun 		/** GTK rekey data */
5790*4882a593Smuzhiyun 		mlan_ds_misc_gtk_rekey_data gtk_rekey;
5791*4882a593Smuzhiyun 		mlan_ds_bw_chan_oper bw_chan_oper;
5792*4882a593Smuzhiyun 		mlan_ds_ind_rst_cfg ind_rst_cfg;
5793*4882a593Smuzhiyun 		/** Roam offload */
5794*4882a593Smuzhiyun 		mlan_ds_misc_roam_offload roam_offload;
5795*4882a593Smuzhiyun 		t_u64 misc_tsf;
5796*4882a593Smuzhiyun 		mlan_ds_custom_reg_domain custom_reg_domain;
5797*4882a593Smuzhiyun 		mlan_ds_misc_keep_alive keep_alive;
5798*4882a593Smuzhiyun 		mlan_ds_misc_tx_rx_histogram tx_rx_histogram;
5799*4882a593Smuzhiyun 		mlan_ds_cw_mode_ctrl cwmode;
5800*4882a593Smuzhiyun 		/**  Tx/Rx per-packet control */
5801*4882a593Smuzhiyun 		t_u8 txrx_pkt_ctrl;
5802*4882a593Smuzhiyun 		mlan_ds_misc_robustcoex_params robustcoexparams;
5803*4882a593Smuzhiyun #if defined(PCIE)
5804*4882a593Smuzhiyun 		mlan_ds_ssu_params ssu_params;
5805*4882a593Smuzhiyun #endif
5806*4882a593Smuzhiyun 		mlan_ds_csi_params csi_params;
5807*4882a593Smuzhiyun 		/** boot sleep enable or disable */
5808*4882a593Smuzhiyun 		t_u16 boot_sleep;
5809*4882a593Smuzhiyun 		/** Mapping Policy */
5810*4882a593Smuzhiyun 		mlan_ds_misc_mapping_policy dmcs_policy;
5811*4882a593Smuzhiyun 		mlan_ds_misc_dmcs_status dmcs_status;
5812*4882a593Smuzhiyun 		mlan_ds_misc_rx_abort_cfg rx_abort_cfg;
5813*4882a593Smuzhiyun 		mlan_ds_misc_rx_abort_cfg_ext rx_abort_cfg_ext;
5814*4882a593Smuzhiyun 		mlan_ds_misc_tx_ampdu_prot_mode tx_ampdu_prot_mode;
5815*4882a593Smuzhiyun 		mlan_ds_misc_rate_adapt_cfg rate_adapt_cfg;
5816*4882a593Smuzhiyun 		mlan_ds_misc_cck_desense_cfg cck_desense_cfg;
5817*4882a593Smuzhiyun 		mlan_ds_misc_chan_trpc_cfg trpc_cfg;
5818*4882a593Smuzhiyun 		mlan_ds_misc_chnrgpwr_cfg rgchnpwr_cfg;
5819*4882a593Smuzhiyun 
5820*4882a593Smuzhiyun 		mlan_ds_band_steer_cfg band_steer_cfg;
5821*4882a593Smuzhiyun 		mlan_ds_beacon_stuck_param_cfg beacon_stuck_cfg;
5822*4882a593Smuzhiyun 		struct mfg_cmd_generic_cfg mfg_generic_cfg;
5823*4882a593Smuzhiyun 		struct mfg_cmd_tx_cont mfg_tx_cont;
5824*4882a593Smuzhiyun 		struct mfg_cmd_tx_frame2 mfg_tx_frame2;
5825*4882a593Smuzhiyun 		struct mfg_Cmd_HE_TBTx_t mfg_he_power;
5826*4882a593Smuzhiyun 		mlan_ds_misc_arb_cfg arb_cfg;
5827*4882a593Smuzhiyun 		mlan_ds_misc_cfp_tbl cfp;
5828*4882a593Smuzhiyun 		t_u8 range_ext_mode;
5829*4882a593Smuzhiyun 		mlan_ds_misc_dot11mc_unassoc_ftm_cfg dot11mc_unassoc_ftm_cfg;
5830*4882a593Smuzhiyun 		mlan_ds_misc_tp_state tp_state;
5831*4882a593Smuzhiyun 		mlan_ds_hal_phy_cfg_params hal_phy_cfg_params;
5832*4882a593Smuzhiyun 		mlan_ds_mc_aggr_cfg mc_aggr_cfg;
5833*4882a593Smuzhiyun 		mlan_ds_stats stats;
5834*4882a593Smuzhiyun #ifdef UAP_SUPPORT
5835*4882a593Smuzhiyun 		t_u8 wacp_mode;
5836*4882a593Smuzhiyun #endif
5837*4882a593Smuzhiyun 		t_u32 ips_ctrl;
5838*4882a593Smuzhiyun 		mlan_ds_ch_load ch_load;
5839*4882a593Smuzhiyun 	} param;
5840*4882a593Smuzhiyun } mlan_ds_misc_cfg, *pmlan_ds_misc_cfg;
5841*4882a593Smuzhiyun 
5842*4882a593Smuzhiyun /** Hotspot status enable */
5843*4882a593Smuzhiyun #define HOTSPOT_ENABLED MBIT(0)
5844*4882a593Smuzhiyun /** Hotspot status disable */
5845*4882a593Smuzhiyun #define HOTSPOT_DISABLED MFALSE
5846*4882a593Smuzhiyun /** Keep Hotspot2.0 compatible in mwu and wpa_supplicant */
5847*4882a593Smuzhiyun #define HOTSPOT_BY_SUPPLICANT MBIT(1)
5848*4882a593Smuzhiyun 
5849*4882a593Smuzhiyun /** Reason codes */
5850*4882a593Smuzhiyun #define MLAN_REASON_UNSPECIFIED 1
5851*4882a593Smuzhiyun #define MLAN_REASON_PREV_AUTH_NOT_VALID 2
5852*4882a593Smuzhiyun #define MLAN_REASON_DEAUTH_LEAVING 3
5853*4882a593Smuzhiyun #define MLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
5854*4882a593Smuzhiyun #define MLAN_REASON_DISASSOC_AP_BUSY 5
5855*4882a593Smuzhiyun #define MLAN_REASON_CLASS2_FRAME_FROM_NOAUTH_STA 6
5856*4882a593Smuzhiyun #define MLAN_REASON_CLASS3_FRAME_FROM_NOASSOC_STA 7
5857*4882a593Smuzhiyun #define MLAN_REASON_DISASSOC_STA_HAS_LEFT 8
5858*4882a593Smuzhiyun #define MLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
5859*4882a593Smuzhiyun #endif /* !_MLAN_IOCTL_H_ */
5860