xref: /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/net/micrel-ksz90x1.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunMicrel KSZ9021/KSZ9031 Gigabit Ethernet PHY
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunSome boards require special tuning values, particularly when it comes to
4*4882a593Smuzhiyunclock delays. You can specify clock delay values by adding
5*4882a593Smuzhiyunmicrel-specific properties to an Ethernet OF device node.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunNote that these settings are applied after any phy-specific fixup from
8*4882a593Smuzhiyunphy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
9*4882a593Smuzhiyunand therefore may overwrite them.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunKSZ9021:
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun  All skew control options are specified in picoseconds. The minimum
14*4882a593Smuzhiyun  value is 0, the maximum value is 1800, and it is incremented by 120ps
15*4882a593Smuzhiyun  steps.
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  Optional properties:
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun    - rxc-skew-ps : Skew control of RXC pad
20*4882a593Smuzhiyun    - rxdv-skew-ps : Skew control of RX CTL pad
21*4882a593Smuzhiyun    - txc-skew-ps : Skew control of TXC pad
22*4882a593Smuzhiyun    - txen-skew-ps : Skew control of TX CTL pad
23*4882a593Smuzhiyun    - rxd0-skew-ps : Skew control of RX data 0 pad
24*4882a593Smuzhiyun    - rxd1-skew-ps : Skew control of RX data 1 pad
25*4882a593Smuzhiyun    - rxd2-skew-ps : Skew control of RX data 2 pad
26*4882a593Smuzhiyun    - rxd3-skew-ps : Skew control of RX data 3 pad
27*4882a593Smuzhiyun    - txd0-skew-ps : Skew control of TX data 0 pad
28*4882a593Smuzhiyun    - txd1-skew-ps : Skew control of TX data 1 pad
29*4882a593Smuzhiyun    - txd2-skew-ps : Skew control of TX data 2 pad
30*4882a593Smuzhiyun    - txd3-skew-ps : Skew control of TX data 3 pad
31*4882a593Smuzhiyun
32*4882a593SmuzhiyunKSZ9031:
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  All skew control options are specified in picoseconds. The minimum
35*4882a593Smuzhiyun  value is 0, and the maximum is property-dependent. The increment
36*4882a593Smuzhiyun  step is 60ps.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  The KSZ9031 hardware supports a range of skew values from negative to
39*4882a593Smuzhiyun  positive, where the specific range is property dependent. All values
40*4882a593Smuzhiyun  specified in the devicetree are offset by the minimum value so they
41*4882a593Smuzhiyun  can be represented as positive integers in the devicetree since it's
42*4882a593Smuzhiyun  difficult to represent a negative number in the devictree.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  Pad Skew Value	Delay (ps)	Devicetree Value
47*4882a593Smuzhiyun  ------------------------------------------------------
48*4882a593Smuzhiyun  0_0000		-900ps		0
49*4882a593Smuzhiyun  0_0001		-840ps		60
50*4882a593Smuzhiyun  0_0010		-780ps		120
51*4882a593Smuzhiyun  0_0011		-720ps		180
52*4882a593Smuzhiyun  0_0100		-660ps		240
53*4882a593Smuzhiyun  0_0101		-600ps		300
54*4882a593Smuzhiyun  0_0110		-540ps		360
55*4882a593Smuzhiyun  0_0111		-480ps		420
56*4882a593Smuzhiyun  0_1000		-420ps		480
57*4882a593Smuzhiyun  0_1001		-360ps		540
58*4882a593Smuzhiyun  0_1010		-300ps		600
59*4882a593Smuzhiyun  0_1011		-240ps		660
60*4882a593Smuzhiyun  0_1100		-180ps		720
61*4882a593Smuzhiyun  0_1101		-120ps		780
62*4882a593Smuzhiyun  0_1110		-60ps		840
63*4882a593Smuzhiyun  0_1111		0ps		900
64*4882a593Smuzhiyun  1_0000		60ps		960
65*4882a593Smuzhiyun  1_0001		120ps		1020
66*4882a593Smuzhiyun  1_0010		180ps		1080
67*4882a593Smuzhiyun  1_0011		240ps		1140
68*4882a593Smuzhiyun  1_0100		300ps		1200
69*4882a593Smuzhiyun  1_0101		360ps		1260
70*4882a593Smuzhiyun  1_0110		420ps		1320
71*4882a593Smuzhiyun  1_0111		480ps		1380
72*4882a593Smuzhiyun  1_1000		540ps		1440
73*4882a593Smuzhiyun  1_1001		600ps		1500
74*4882a593Smuzhiyun  1_1010		660ps		1560
75*4882a593Smuzhiyun  1_1011		720ps		1620
76*4882a593Smuzhiyun  1_1100		780ps		1680
77*4882a593Smuzhiyun  1_1101		840ps		1740
78*4882a593Smuzhiyun  1_1110		900ps		1800
79*4882a593Smuzhiyun  1_1111		960ps		1860
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun  The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
82*4882a593Smuzhiyun  data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun  Pad Skew Value	Delay (ps)	Devicetree Value
85*4882a593Smuzhiyun  ------------------------------------------------------
86*4882a593Smuzhiyun  0000			-420ps		0
87*4882a593Smuzhiyun  0001			-360ps		60
88*4882a593Smuzhiyun  0010			-300ps		120
89*4882a593Smuzhiyun  0011			-240ps		180
90*4882a593Smuzhiyun  0100			-180ps		240
91*4882a593Smuzhiyun  0101			-120ps		300
92*4882a593Smuzhiyun  0110			-60ps		360
93*4882a593Smuzhiyun  0111			0ps		420
94*4882a593Smuzhiyun  1000			60ps		480
95*4882a593Smuzhiyun  1001			120ps		540
96*4882a593Smuzhiyun  1010			180ps		600
97*4882a593Smuzhiyun  1011			240ps		660
98*4882a593Smuzhiyun  1100			300ps		720
99*4882a593Smuzhiyun  1101			360ps		780
100*4882a593Smuzhiyun  1110			420ps		840
101*4882a593Smuzhiyun  1111			480ps		900
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun  Optional properties:
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun    Maximum value of 1860:
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun      - rxc-skew-ps : Skew control of RX clock pad
108*4882a593Smuzhiyun      - txc-skew-ps : Skew control of TX clock pad
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun    Maximum value of 900:
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun      - rxdv-skew-ps : Skew control of RX CTL pad
113*4882a593Smuzhiyun      - txen-skew-ps : Skew control of TX CTL pad
114*4882a593Smuzhiyun      - rxd0-skew-ps : Skew control of RX data 0 pad
115*4882a593Smuzhiyun      - rxd1-skew-ps : Skew control of RX data 1 pad
116*4882a593Smuzhiyun      - rxd2-skew-ps : Skew control of RX data 2 pad
117*4882a593Smuzhiyun      - rxd3-skew-ps : Skew control of RX data 3 pad
118*4882a593Smuzhiyun      - txd0-skew-ps : Skew control of TX data 0 pad
119*4882a593Smuzhiyun      - txd1-skew-ps : Skew control of TX data 1 pad
120*4882a593Smuzhiyun      - txd2-skew-ps : Skew control of TX data 2 pad
121*4882a593Smuzhiyun      - txd3-skew-ps : Skew control of TX data 3 pad
122*4882a593Smuzhiyun
123*4882a593SmuzhiyunExamples:
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	/* Attach to an Ethernet device with autodetected PHY */
126*4882a593Smuzhiyun	&enet {
127*4882a593Smuzhiyun		rxc-skew-ps = <1800>;
128*4882a593Smuzhiyun		rxdv-skew-ps = <0>;
129*4882a593Smuzhiyun		txc-skew-ps = <1800>;
130*4882a593Smuzhiyun		txen-skew-ps = <0>;
131*4882a593Smuzhiyun		status = "okay";
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	/* Attach to an explicitly-specified PHY */
135*4882a593Smuzhiyun	mdio {
136*4882a593Smuzhiyun		phy0: ethernet-phy@0 {
137*4882a593Smuzhiyun			rxc-skew-ps = <1800>;
138*4882a593Smuzhiyun			rxdv-skew-ps = <0>;
139*4882a593Smuzhiyun			txc-skew-ps = <1800>;
140*4882a593Smuzhiyun			txen-skew-ps = <0>;
141*4882a593Smuzhiyun			reg = <0>;
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun	ethernet@70000 {
145*4882a593Smuzhiyun		status = "okay";
146*4882a593Smuzhiyun		phy = <&phy0>;
147*4882a593Smuzhiyun		phy-mode = "rgmii-id";
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593SmuzhiyunReferences
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun  Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
153*4882a593Smuzhiyun  http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun  Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
156*4882a593Smuzhiyun  http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf
157*4882a593Smuzhiyun
158*4882a593SmuzhiyunNotes:
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun  Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
161*4882a593Smuzhiyun  was missing extended register 106 (transmit data pad skews), and
162*4882a593Smuzhiyun  incorrectly specified the ps per step as 200ps/step instead of
163*4882a593Smuzhiyun  120ps/step. The latest update to this document reflects the latest
164*4882a593Smuzhiyun  revision of the Micrel specification even though usage in the kernel
165*4882a593Smuzhiyun  still reflects that incorrect document.
166