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/rk3399_ARM-atf/.github/
H A Ddependabot.yml8 interval: "daily"
19 interval: "daily"
30 interval: "daily"
41 interval: "daily"
52 interval: "daily"
63 interval: "daily"
74 interval: "daily"
85 interval: "daily"
/rk3399_ARM-atf/plat/mediatek/drivers/thermal/src/
H A Dthermal_lvts.c284 * Period unit is a base for all interval delays in set_polling_speed()
285 * All interval delays must multiply it to convert a setting to time. in set_polling_speed()
286 * Filter interval delay is a delay between two samples of the same in set_polling_speed()
288 * Sensor interval delay is a delay between two samples of differnet in set_polling_speed()
290 * Group interval delay is a delay between different rounds. in set_polling_speed()
297 * Filter interval delay = 1 * Period unit = 118.149us in set_polling_speed()
298 * Sensor interval delay = 2 * Period unit = 236.298us in set_polling_speed()
299 * Group interval delay = 1 * Period unit = 118.149us in set_polling_speed()
302 * <--> Filter interval delay in set_polling_speed()
303 * <--> Sensor interval delay in set_polling_speed()
[all …]
/rk3399_ARM-atf/drivers/renesas/rcar/qos/E3/
H A Dqos_init_e3_v10.c96 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_e3_v10()
98 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_e3_v10()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2E/
H A Dqos_init_g2e_v10.c95 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2e_v10()
97 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_g2e_v10()
/rk3399_ARM-atf/plat/mediatek/drivers/rtc/
H A Drtc_common.c13 /* RTC busy status polling interval and retry count */
/rk3399_ARM-atf/drivers/renesas/rcar/qos/M3N/
H A Dqos_init_m3n_v10.c128 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3n_v10()
130 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3n_v10()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2N/
H A Dqos_init_g2n_v10.c127 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2n_v10()
129 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2n_v10()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/H3/
H A Dqos_init_h3n_v30.c145 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3n_v30()
147 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3n_v30()
H A Dqos_init_h3_v20.c141 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v20()
143 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v20()
H A Dqos_init_h3_v30.c151 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v30()
153 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v30()
/rk3399_ARM-atf/drivers/renesas/rcar/qos/M3/
H A Dqos_init_m3_v30.c138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v30()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v30()
H A Dqos_init_m3_v11.c138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v11()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v11()
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046ardb/
H A Dddr_init.c54 .interval = U(0x1FFE07FF),
99 .interval = U(0x1B6C06DB),
147 .interval = U(0x18600618),
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2M/
H A Dqos_init_g2m_v30.c135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v30()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v30()
H A Dqos_init_g2m_v11.c135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v11()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v11()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2H/
H A Dqos_init_g2h_v30.c136 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2h_v30()
138 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2h_v30()
/rk3399_ARM-atf/include/plat/marvell/armada/a8k/common/
H A Darmada_common.h76 * delay_ms: transition interval for the GPIO setting to take effect
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2160aqds/
H A Dddr_init.c63 .interval = U(0x30C00000),
114 .interval = U(0x2C2E0000),
165 .interval = U(0x279C0000),
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2162aqds/
H A Dddr_init.c63 .interval = U(0x30C00000),
114 .interval = U(0x2C2E0000),
165 .interval = U(0x279C0000),
/rk3399_ARM-atf/include/drivers/nxp/ddr/
H A Dddr.h60 unsigned int interval; member
H A Dimmap.h39 unsigned int sdram_interval; /* SDRAM Interval Configuration */
/rk3399_ARM-atf/plat/mediatek/drivers/pmic_wrap/
H A Dpmic_wrap_init_v2.c14 /* pmic wrap module wait_idle and read polling interval (in microseconds) */
H A Dpmic_wrap_init.c13 /* pmic wrap module wait_idle and read polling interval (in microseconds) */
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/ls1043ardb/
H A Dddr_init.c42 .interval = U(0x18600618),
/rk3399_ARM-atf/include/drivers/nxp/crypto/caam/
H A Djr_driver_config.h154 * However the number of packets in flight in a time interval of

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