| /OK3568_Linux_fs/kernel/Documentation/devicetree/ |
| H A D | writing-schema.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 Writing DeviceTree Bindings in json-schema 6 Devicetree bindings are written using json-schema vocabulary. Schema files are 12 --------------- 14 Each schema doc is a structured json-schema which is defined by a set of 15 top-level properties. Generally, there is one binding defined per file. The 16 top-level json-schema properties used are: 19 A json-schema unique identifier string. The string must be a valid 20 URI typically containing the binding's filename and path. For DT schema, it must 29 Indicates the meta-schema the schema file adheres to. [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ |
| H A D | submitting-patches.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Submitting devicetree (DT) binding patches 10 0) Normal patch submission rules from Documentation/process/submitting-patches.rst 13 1) The Documentation/ and include/dt-bindings/ portion of the patch should 14 be a separate patch. The preferred subject prefix for binding patches is:: 16 "dt-bindings: <binding dir>: ..." 20 docs. Repeating "binding" again should also be avoided. 22 2) DT binding files are written in DT schema format using json-schema 23 vocabulary and YAML file format. The DT binding files must pass validation 28 See ../writing-schema.rst for more details about schema and tools setup. [all …]
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| H A D | ABI.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Devicetree (DT) ABI 7 I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit 10 "That still leaves the question of, what does a stable binding look 11 like? Certainly a stable binding means that a newer kernel will not 12 break on an older device tree, but that doesn't mean the binding is 15 then default to the previous behaviour if it is missing. If a binding 21 II. General binding rules 24 binding because it isn't perfect. 30 the old binding. ie. add additional properties, but don't change the
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/doc/gdb/ |
| H A D | TUI-Keys.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt… 3 <!-- Copyright (C) 1988-2021 Free Software Foundation, Inc. 9 Free Documentation", with the Front-Cover Texts being "A GNU Manual," 10 and with the Back-Cover Texts as in (a) below. 12 (a) The FSF's Back-Cover Text is: "You are free to copy and modify 14 developing GNU and promoting software freedom." --> 15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 21 <meta name="resource-type" content="document"> 24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 26 <link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index"> [all …]
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| H A D | Readline-Init-File-Syntax.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt… 3 <!-- Copyright (C) 1988-2021 Free Software Foundation, Inc. 9 Free Documentation", with the Front-Cover Texts being "A GNU Manual," 10 and with the Back-Cover Texts as in (a) below. 12 (a) The FSF's Back-Cover Text is: "You are free to copy and modify 14 developing GNU and promoting software freedom." --> 15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 21 <meta name="resource-type" content="document"> 24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 26 <link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index"> [all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/doc/gdb/ |
| H A D | TUI-Keys.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt… 3 <!-- Copyright (C) 1988-2021 Free Software Foundation, Inc. 9 Free Documentation", with the Front-Cover Texts being "A GNU Manual," 10 and with the Back-Cover Texts as in (a) below. 12 (a) The FSF's Back-Cover Text is: "You are free to copy and modify 14 developing GNU and promoting software freedom." --> 15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 21 <meta name="resource-type" content="document"> 24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 26 <link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index"> [all …]
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| H A D | Readline-Init-File-Syntax.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt… 3 <!-- Copyright (C) 1988-2021 Free Software Foundation, Inc. 9 Free Documentation", with the Front-Cover Texts being "A GNU Manual," 10 and with the Back-Cover Texts as in (a) below. 12 (a) The FSF's Back-Cover Text is: "You are free to copy and modify 14 developing GNU and promoting software freedom." --> 15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 21 <meta name="resource-type" content="document"> 24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 26 <link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index"> [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/ |
| H A D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yong Wu <yong.wu@mediatek.com> 16 ARM Short-Descriptor translation table format for address translation. 24 +--------+ 26 gals0-rx gals1-rx (Global Async Local Sync rx) 29 gals0-tx gals1-tx (Global Async Local Sync tx) 31 +--------+ 35 +----------------+------- [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | maxim,max77686.txt | 1 Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block 4 multi-function device. More information can be found in MFD DT binding 12 dt-bindings/clock/maxim,max77686.h. 17 dt-bindings/clock/maxim,max77802.h. 21 dt-bindings/clock/maxim,max77620.h. 27 - #clock-cells: from common clock binding; shall be set to 1. 30 - clock-output-names: From common clock binding. 34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620) 35 - 1: 32khz_cp clock (max77686, max77802), 36 - 2: 32khz_pmic clock (max77686). [all …]
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| H A D | qcom,gcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller Binding 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 18 - dt-bindings/clock/qcom,gcc-apq8084.h 19 - dt-bindings/reset/qcom,gcc-apq8084.h 20 - dt-bindings/clock/qcom,gcc-ipq4019.h 21 - dt-bindings/clock/qcom,gcc-ipq6018.h [all …]
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| H A D | alphascale,acc.txt | 7 - compatible: must be "alphascale,asm9260-clock-controller" 8 - reg: must contain the ACC register base and size 9 - #clock-cells : shall be set to 1. 11 Simple one-cell clock specifier format is used, where the only cell is used 13 It is encouraged to use dt-binding for clock index definitions. SoC specific 14 dt-binding should be included to the device tree descriptor. For example 16 #include <dt-bindings/clock/alphascale,asm9260.h> 18 This binding contains two types of clock providers: 19 _AHB_ - AHB gate; 20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider. [all …]
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| H A D | st,stm32mp1-rcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Reset Clock Controller Binding 10 - Gabriel Fernandez <gabriel.fernandez@st.com> 15 Please also refer to reset.txt for common reset controller binding usage. 17 This binding uses common clock bindings 18 Documentation/devicetree/bindings/clock/clock-bindings.txt 24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device [all …]
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| H A D | baikal,bt1-ccu-div.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Baikal-T1 Clock Control Unit Dividers 11 - Serge Semin <fancer.lancer@gmail.com> 14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller 18 IP-blocks or to groups of blocks (clock domains). The transformation is done 19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The 20 later ones are described in this binding. Each clock domain can be also [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ti/ |
| H A D | dra7-atl.txt | 7 signals - can compensate the drift between the two ws signal. 12 Clock tree binding: 13 This binding uses the common clock binding[1]. 14 To be able to integrate the ATL clocks with DT clock tree. 16 Since the clock instances are part of a single IP this binding is used as a node 17 for the DT clock tree, the IP driver is needed to handle the actual configuration 20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 23 - compatible : shall be "ti,dra7-atl-clock" 24 - #clock-cells : from common clock binding; shall be set to 0. 25 - clocks : link phandles to functional clock of ATL [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/ |
| H A D | s5p-mfc.txt | 10 - compatible : value should be either one among the following 11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs 12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs 13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC 14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC 15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC 16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC 18 - reg : Physical base address of the IP registers and length of memory 21 - interrupts : MFC interrupt number to the CPU. 22 - clocks : from common clock binding: handle to mfc clock. [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/reset/ |
| H A D | reset.txt | 3 This binding is intended to represent the hardware reset signals present 10 reset consumer (the module being reset, or a module managing when a sub- 11 ordinate module is reset). This binding exists to represent the provider and 15 specifier - a list of DT cells that represents the reset signal within the 17 are dictated by the binding of the reset provider, although common schemes 23 the DT node of each affected HW block, since if activated, an unrelated block 24 may be reset. Instead, reset signals should be represented in the DT node 27 block node for dedicated reset signals. The intent of this binding is to give 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 41 rst: reset-controller { [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/reset/ |
| H A D | reset.txt | 3 This binding is intended to represent the hardware reset signals present 10 reset consumer (the module being reset, or a module managing when a sub- 11 ordinate module is reset). This binding exists to represent the provider and 15 specifier - a list of DT cells that represents the reset signal within the 17 are dictated by the binding of the reset provider, although common schemes 23 the DT node of each affected HW block, since if activated, an unrelated block 24 may be reset. Instead, reset signals should be represented in the DT node 27 block node for dedicated reset signals. The intent of this binding is to give 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 41 rst: reset-controller { [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/freescale/ |
| H A D | fsl,scu.txt | 2 -------------------------------------------------------------------- 4 The System Controller Firmware (SCFW) is a low-level system function 5 which runs on a dedicated Cortex-M core to provide power, clock, and 9 The AP communicates with the SC using a multi-ported MU module found 22 ------------------- 23 - compatible: should be "fsl,imx-scu". 24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3", 27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for 51 for detailed mailbox binding. 63 Client nodes are maintained as children of the relevant IMX-SCU device node. [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | gpio.txt | 5 ----------------- 8 properties, each containing a 'gpio-list': 10 gpio-list ::= <single-gpio> [gpio-list] 11 single-gpio ::= <gpio-phandle> <gpio-specifier> 12 gpio-phandle : phandle to gpio controller node 13 gpio-specifier : Array of #gpio-cells specifying specific gpio 16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 17 of this GPIO for the device. While a non-existent <name> is considered valid 28 binding of the device. 31 and bit-banged data signals: [all …]
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| H A D | nvidia,tegra186-gpio.txt | 4 controller. This binding document applies to both controllers. The register 42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h> 43 describes the port-level mapping. In that file, the naming convention for ports 45 sorted within a particular controller. Drivers need to map between the DT GPIO 52 both the overall controller HW module and the sets-of-ports as "controllers". 56 interrupt signals generated by a set-of-ports. The intent is for each generated 59 per-port-set signals is reported via a separate register. Thus, a driver needs 60 to know which status register to observe. This binding currently defines no 62 GPIO_${port}_INTERRUPT_STATUS_G1_0. Future revisions to the binding could 66 - compatible [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/ |
| H A D | nvidia,tegra186-gpio.txt | 4 controller. This binding document applies to both controllers. The register 42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h> 43 describes the port-level mapping. In that file, the naming convention for ports 45 sorted within a particular controller. Drivers need to map between the DT GPIO 52 both the overall controller HW module and the sets-of-ports as "controllers". 56 interrupt signals generated by a set-of-ports. The intent is for each generated 59 per-port-set signals is reported via a separate register. Thus, a driver needs 60 to know which status register to observe. This binding currently defines no 62 GPIO_${port}_INTERRUPT_STATUS_G1_0. Future revisions to the binding could 66 - compatible [all …]
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| H A D | gpio.txt | 5 ----------------- 7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 8 of this GPIO for the device. While a non-existent <name> is considered valid 10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old 21 binding of the device. 24 and bit-banged data signals: 27 gpio-controller; 28 #gpio-cells = <2>; 32 data-gpios = <&gpio1 12 0>, 43 documented in the device tree binding for the device, but it is strongly [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/ |
| H A D | max77620_thermal.txt | 10 ------------------- 11 #thermal-sensor-cells: For more details, please refer to 12 <devicetree/bindings/thermal/thermal-sensor.yaml> 15 For more details, please refer generic thermal DT binding document 18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding 22 -------- 23 #include <dt-bindings/mfd/max77620.h> 24 #include <dt-bindings/thermal/thermal.h> 31 #thermal-sensor-cells = <0>; 36 cool_dev: cool-dev { [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/ |
| H A D | max77620.txt | 4 ------------------- 5 - compatible: Must be one of 9 - reg: I2C device address. 12 ------------------- 13 - interrupts: The interrupt on the parent the controller is 15 - interrupt-controller: Marks the device node as an interrupt controller. 16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 19 are defined at dt-bindings/mfd/max77620.h. 21 - system-power-controller: Indicates that this PMIC is controlling the [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/ |
| H A D | nvidia,tegra20-pwm.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pwm": for Tegra20 6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30 7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114 8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124 9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 11 - "nvidia,tegra186-pwm": for Tegra186 12 - "nvidia,tegra194-pwm": for Tegra194 13 - reg: physical base address and length of the controller's registers [all …]
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