bindings/iommu/mediatek%2Ciommu.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Yong Wu <yong.wu@mediatek.com>
16   ARM Short-Descriptor translation table format for address translation.
24             +--------+
26         gals0-rx   gals1-rx    (Global Async Local Sync rx)
29         gals0-tx   gals1-tx    (Global Async Local Sync tx)
31             +--------+
35          +----------------+-------
37          |             gals-rx        There may be GALS in some larbs.
40          |             gals-tx
46    +-----+-----+     +----+----+
65   smi-common and m4u, and additional GALS module between smi-larb and
66   smi-common. GALS can been seen as a "asynchronous fifo" which could help
72       - enum:
73           - mediatek,mt2701-m4u  # generation one
74           - mediatek,mt2712-m4u  # generation two
75           - mediatek,mt6779-m4u  # generation two
76           - mediatek,mt8167-m4u  # generation two
77           - mediatek,mt8173-m4u  # generation two
78           - mediatek,mt8183-m4u  # generation two
79           - mediatek,mt8192-m4u  # generation two
81       - description: mt7623 generation one
83           - const: mediatek,mt7623-m4u
84           - const: mediatek,mt2701-m4u
94       - description: bclk is the block clock.
96   clock-names:
98       - const: bclk
101     $ref: /schemas/types.yaml#/definitions/phandle-array
106       Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
109   '#iommu-cells':
114       dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
115       dt-binding/memory/mt2712-larb-port.h for mt2712,
116       dt-binding/memory/mt6779-larb-port.h for mt6779,
117       dt-binding/memory/mt8167-larb-port.h for mt8167,
118       dt-binding/memory/mt8173-larb-port.h for mt8173,
119       dt-binding/memory/mt8183-larb-port.h for mt8183,
120       dt-binding/memory/mt8192-larb-port.h for mt8192.
122   power-domains:
126   - compatible
127   - reg
128   - interrupts
129   - mediatek,larbs
130   - '#iommu-cells'
133   - if:
138               - mediatek,mt2701-m4u
139               - mediatek,mt2712-m4u
140               - mediatek,mt8173-m4u
141               - mediatek,mt8192-m4u
145         - clocks
147   - if:
151             - mediatek,mt8192-m4u
155         - power-domains
160   - |
161     #include <dt-bindings/clock/mt8173-clk.h>
162     #include <dt-bindings/interrupt-controller/arm-gic.h>
165             compatible = "mediatek,mt8173-m4u";
169             clock-names = "bclk";
172             #iommu-cells = <1>;
175   - |
176     #include <dt-bindings/memory/mt8173-larb-port.h>
180            compatible = "mediatek,mt8173-disp";