1*4882a593SmuzhiyunDevice Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe ATL IP is used to generate clock to be used to synchronize baseband and 4*4882a593Smuzhiyunaudio codec. A single ATL IP provides four ATL clock instances sharing the same 5*4882a593Smuzhiyunfunctional clock but can be configured to provide different clocks. 6*4882a593SmuzhiyunATL can maintain a clock averages to some desired frequency based on the bws/aws 7*4882a593Smuzhiyunsignals - can compensate the drift between the two ws signal. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunIn order to provide the support for ATL and it's output clocks (which can be used 10*4882a593Smuzhiyuninternally within the SoC or external components) two sets of bindings is needed: 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunClock tree binding: 13*4882a593SmuzhiyunThis binding uses the common clock binding[1]. 14*4882a593SmuzhiyunTo be able to integrate the ATL clocks with DT clock tree. 15*4882a593SmuzhiyunProvides ccf level representation of the ATL clocks to be used by drivers. 16*4882a593SmuzhiyunSince the clock instances are part of a single IP this binding is used as a node 17*4882a593Smuzhiyunfor the DT clock tree, the IP driver is needed to handle the actual configuration 18*4882a593Smuzhiyunof the IP. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunRequired properties: 23*4882a593Smuzhiyun- compatible : shall be "ti,dra7-atl-clock" 24*4882a593Smuzhiyun- #clock-cells : from common clock binding; shall be set to 0. 25*4882a593Smuzhiyun- clocks : link phandles to functional clock of ATL 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunBinding for the IP driver: 28*4882a593SmuzhiyunThis binding is used to configure the IP driver which is going to handle the 29*4882a593Smuzhiyunconfiguration of the IP for the ATL clock instances. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunRequired properties: 32*4882a593Smuzhiyun- compatible : shall be "ti,dra7-atl" 33*4882a593Smuzhiyun- reg : base address for the ATL IP 34*4882a593Smuzhiyun- ti,provided-clocks : List of phandles to the clocks associated with the ATL 35*4882a593Smuzhiyun- clocks : link phandles to functional clock of ATL 36*4882a593Smuzhiyun- clock-names : Shall be set to "fck" 37*4882a593Smuzhiyun- ti,hwmods : Shall be set to "atl" 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunOptional properties: 40*4882a593SmuzhiyunConfiguration of ATL instances: 41*4882a593Smuzhiyun- atl{0/1/2/3} { 42*4882a593Smuzhiyun - bws : Baseband word select signal selection 43*4882a593Smuzhiyun - aws : Audio word select signal selection 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunFor valid word select signals, see the dt-bindings/clock/ti-dra7-atl.h include 47*4882a593Smuzhiyunfile. 48*4882a593Smuzhiyun 49*4882a593SmuzhiyunExamples: 50*4882a593Smuzhiyun/* clock bindings for atl provided clocks */ 51*4882a593Smuzhiyunatl_clkin0_ck: atl_clkin0_ck { 52*4882a593Smuzhiyun #clock-cells = <0>; 53*4882a593Smuzhiyun compatible = "ti,dra7-atl-clock"; 54*4882a593Smuzhiyun clocks = <&atl_gfclk_mux>; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyunatl_clkin1_ck: atl_clkin1_ck { 58*4882a593Smuzhiyun #clock-cells = <0>; 59*4882a593Smuzhiyun compatible = "ti,dra7-atl-clock"; 60*4882a593Smuzhiyun clocks = <&atl_gfclk_mux>; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyunatl_clkin2_ck: atl_clkin2_ck { 64*4882a593Smuzhiyun #clock-cells = <0>; 65*4882a593Smuzhiyun compatible = "ti,dra7-atl-clock"; 66*4882a593Smuzhiyun clocks = <&atl_gfclk_mux>; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunatl_clkin3_ck: atl_clkin3_ck { 70*4882a593Smuzhiyun #clock-cells = <0>; 71*4882a593Smuzhiyun compatible = "ti,dra7-atl-clock"; 72*4882a593Smuzhiyun clocks = <&atl_gfclk_mux>; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun/* binding for the IP */ 76*4882a593Smuzhiyunatl: atl@4843c000 { 77*4882a593Smuzhiyun compatible = "ti,dra7-atl"; 78*4882a593Smuzhiyun reg = <0x4843c000 0x3ff>; 79*4882a593Smuzhiyun ti,hwmods = "atl"; 80*4882a593Smuzhiyun ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>, 81*4882a593Smuzhiyun <&atl_clkin2_ck>, <&atl_clkin3_ck>; 82*4882a593Smuzhiyun clocks = <&atl_gfclk_mux>; 83*4882a593Smuzhiyun clock-names = "fck"; 84*4882a593Smuzhiyun}; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun#include <dt-bindings/clock/ti-dra7-atl.h> 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&atl { 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun atl2 { 91*4882a593Smuzhiyun bws = <DRA7_ATL_WS_MCASP2_FSX>; 92*4882a593Smuzhiyun aws = <DRA7_ATL_WS_MCASP3_FSX>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95