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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-vop-clk-set.dtsi16 assigned-clocks = <&cru SCLK_EMMC>;
17 assigned-clock-parents = <&cru PLL_GPLL>;
18 assigned-clock-rates = <200000000>;
22 assigned-clocks = <&cru SCLK_UART0_SRC>;
23 assigned-clock-parents = <&cru PLL_GPLL>;
27 assigned-clocks = <&cru SCLK_UART_SRC>;
28 assigned-clock-parents = <&cru PLL_GPLL>;
32 assigned-clocks = <&cru SCLK_UART_SRC>;
33 assigned-clock-parents = <&cru PLL_GPLL>;
37 assigned-clocks = <&cru SCLK_UART_SRC>;
[all …]
H A Dpx30-ad-r35-mb-rk618-hdmi.dts24 assigned-clocks = <&cru SCLK_I2S1_OUT>;
25 assigned-clock-rates = <11289600>;
33 assigned-clocks = <&clock SCALER_PLLIN_CLK>,
39 assigned-clock-parents = <&cru SCLK_I2S1_OUT>,
53 assigned-clocks = <&clock HDMI_CLK>;
54 assigned-clock-parents = <&clock VIF0_CLK>;
76 assigned-clocks = <&cru PLL_NPLL>;
77 assigned-clock-rates = <1188000000>;
H A Drk3568-nvr-demo-v10.dtsi118 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
119 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
120 assigned-clock-rates = <0>, <125000000>;
145 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
146 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
147 assigned-clock-rates = <0>, <125000000>;
192 assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
193 assigned-clock-rates = <12288000>;
194 assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
206 assigned-clocks =<&cru I2S3_MCLKOUT>, <&cru I2S3_MCLK_IOE>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi210 assigned-clock-rates = <48000000>;
211 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
212 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
221 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
222 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
223 assigned-clock-rates = <48000000>;
233 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C5>;
234 assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC>;
235 assigned-clock-rates = <48000000>;
245 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>;
[all …]
H A DOK3568-C.dts41 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
42 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
43 assigned-clock-rates = <0>, <125000000>;
68 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
69 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
70 assigned-clock-rates = <0>, <125000000>;
109 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
110 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL> , <&cru PLL_GPLL>;
H A D.OK3568-C.dtb.pre.tmp
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml47 assigned-clocks:
51 assigned-clock-parents:
55 assigned-clock-rates:
90 assigned-clocks:
93 assigned-clock-parents:
99 - assigned-clocks
100 - assigned-clock-parents
136 assigned-clocks:
139 assigned-clock-parents:
145 - assigned-clocks
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-ahub.yaml42 assigned-clocks:
45 assigned-clock-parents:
48 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
82 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
83 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
119 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
120 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
121 assigned-clock-rates = <1536000>;
[all …]
H A Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
H A Dnvidia,tegra210-dmic.yaml41 assigned-clocks:
44 assigned-clock-parents:
47 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
78 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
79 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
80 assigned-clock-rates = <3072000>;
H A Dnvidia,tegra186-dspk.yaml40 assigned-clocks:
43 assigned-clock-parents:
46 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
78 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
79 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
80 assigned-clock-rates = <12288000>;
H A Dnvidia,tegra210-i2s.yaml56 assigned-clocks:
60 assigned-clock-parents:
64 assigned-clock-rates:
82 - assigned-clocks
83 - assigned-clock-parents
96 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
97 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
98 assigned-clock-rates = <1536000>;
H A Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
/OK3568_Linux_fs/kernel/include/media/
H A Dv4l2-mem2mem.h147 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
157 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
181 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
200 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
230 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
243 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
260 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
272 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
288 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
301 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
262 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
H A Dexynos4412-odroid-common.dtsi125 assigned-clocks = <&clock CLK_FOUT_EPLL>;
126 assigned-clock-rates = <45158401>;
130 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
136 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
139 assigned-clock-rates = <0>, <0>,
207 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
209 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
210 assigned-clock-rates = <0>, <176000000>;
215 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
217 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
H A Dimx7d-sdb.dts210 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
212 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
213 assigned-clock-rates = <0>, <100000000>;
237 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
239 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
240 assigned-clock-rates = <0>, <100000000>;
381 assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>,
384 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
385 assigned-clock-rates = <0>, <884736000>, <12288000>;
417 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
[all …]
H A Dimx7d-zii-rpu2.dts189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
190 assigned-clock-rates = <884736000>;
211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
214 assigned-clock-rates = <0>, <100000000>;
294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
[all …]
H A Dimx7d-pico.dtsi105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
121 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-conf.c20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
46 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
57 pr_warn("clk: couldn't get assigned clock %d for %pOF\n", in __set_clk_parents()
85 of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { in __set_clk_rates()
87 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
120 * of_clk_set_defaults() - parse and set assigned clocks configuration
124 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
127 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/
H A Ddpu.txt38 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
40 the assigned-clocks property.
70 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
72 the assigned-clocks property.
87 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>;
88 assigned-clock-rates = <300000000>;
116 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>,
118 assigned-clock-rates = <0 0 300000000 19200000>;
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_ctx_sched.h75 * This function should be called whenever an address space should be assigned
80 * assigned to the context for as long as there is a reference to said context.
85 * Return: The address space that the context has been assigned to or
111 * address space previously assigned to this context shall be reassigned to
119 * kbase_ctx_sched_remove_ctx - Unassign previously assigned address space
123 * context must no longer have any reference. If it has been assigned an
132 * This function shall reprogram all address spaces previously assigned to
144 * @as_nr: address space assigned to the context of interest
167 * @as_nr: address space assigned to the context of interest
179 * @as_nr: address space assigned to the context of interest
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/img/
H A Dpistachio.dtsi51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …ions it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to all pipes.",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 3.",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 2.",
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 1.",
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 0.",
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dclock-bindings.txt135 ==Assigned clock parents and rates==
139 node through assigned-clocks, assigned-clock-parents and assigned-clock-rates
140 properties. The assigned-clock-parents property should contain a list of parent
142 assigned-clock-rates property should contain a list of frequencies in Hz. Both
143 these properties should correspond to the clocks listed in the assigned-clocks
156 assigned-clocks = <&clkcon 0>, <&pll 2>;
157 assigned-clock-parents = <&pll 2>;
158 assigned-clock-rates = <0>, <460800>;
162 the <&pll 2> clock is assigned a frequency value of 460800 Hz.

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