1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Tegra210 DMIC Controller Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: | 10*4882a593Smuzhiyun The Digital MIC (DMIC) Controller is used to interface with Pulse 11*4882a593Smuzhiyun Density Modulation (PDM) input devices. It converts PDM signals to 12*4882a593Smuzhiyun Pulse Coded Modulation (PCM) signals. DMIC can be viewed as a PDM 13*4882a593Smuzhiyun receiver. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunmaintainers: 16*4882a593Smuzhiyun - Jon Hunter <jonathanh@nvidia.com> 17*4882a593Smuzhiyun - Sameer Pujar <spujar@nvidia.com> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunproperties: 20*4882a593Smuzhiyun $nodename: 21*4882a593Smuzhiyun pattern: "^dmic@[0-9a-f]*$" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun oneOf: 25*4882a593Smuzhiyun - const: nvidia,tegra210-dmic 26*4882a593Smuzhiyun - items: 27*4882a593Smuzhiyun - enum: 28*4882a593Smuzhiyun - nvidia,tegra194-dmic 29*4882a593Smuzhiyun - nvidia,tegra186-dmic 30*4882a593Smuzhiyun - const: nvidia,tegra210-dmic 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun reg: 33*4882a593Smuzhiyun maxItems: 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clocks: 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun clock-names: 39*4882a593Smuzhiyun const: dmic 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun assigned-clocks: 42*4882a593Smuzhiyun maxItems: 1 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun assigned-clock-parents: 45*4882a593Smuzhiyun maxItems: 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun assigned-clock-rates: 48*4882a593Smuzhiyun maxItems: 1 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun sound-name-prefix: 51*4882a593Smuzhiyun pattern: "^DMIC[1-9]$" 52*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/string 53*4882a593Smuzhiyun description: 54*4882a593Smuzhiyun used as prefix for sink/source names of the component. Must be a 55*4882a593Smuzhiyun unique string among multiple instances of the same component. 56*4882a593Smuzhiyun The name can be "DMIC1" or "DMIC2" ... "DMICx", where x depends 57*4882a593Smuzhiyun on the maximum available instances on a Tegra SoC. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyunrequired: 60*4882a593Smuzhiyun - compatible 61*4882a593Smuzhiyun - reg 62*4882a593Smuzhiyun - clocks 63*4882a593Smuzhiyun - clock-names 64*4882a593Smuzhiyun - assigned-clocks 65*4882a593Smuzhiyun - assigned-clock-parents 66*4882a593Smuzhiyun 67*4882a593SmuzhiyunadditionalProperties: false 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunexamples: 70*4882a593Smuzhiyun - | 71*4882a593Smuzhiyun #include<dt-bindings/clock/tegra210-car.h> 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun dmic@702d4000 { 74*4882a593Smuzhiyun compatible = "nvidia,tegra210-dmic"; 75*4882a593Smuzhiyun reg = <0x702d4000 0x100>; 76*4882a593Smuzhiyun clocks = <&tegra_car TEGRA210_CLK_DMIC1>; 77*4882a593Smuzhiyun clock-names = "dmic"; 78*4882a593Smuzhiyun assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>; 79*4882a593Smuzhiyun assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 80*4882a593Smuzhiyun assigned-clock-rates = <3072000>; 81*4882a593Smuzhiyun sound-name-prefix = "DMIC1"; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun... 85