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Searched defs:rate (Results 26 – 50 of 139) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Demc.c26 unsigned rate; in board_emc_init() local
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3128.c94 const struct rockchip_cpu_rate_table *rate; in rk3128_armclk_set_clk() local
532 ulong rate = 0; in rk3128_clk_get_rate() local
593 static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate) in rk3128_clk_set_rate()
681 ulong rate; in rk3128_mmc_get_phase() local
717 ulong rate; in rk3128_mmc_set_phase() local
926 unsigned long rate; in soc_clk_dump() local
H A Dclk_px30.c109 struct pll_rate_table *rate = &auto_table; in pll_clk_set_by_auto() local
173 static const struct pll_rate_table *get_pll_settings(unsigned long rate) in get_pll_settings()
186 static const struct cpu_rate_table *get_cpu_settings(unsigned long rate) in get_cpu_settings()
218 const struct pll_rate_table *rate; in rkclk_set_pll() local
1210 static int px30_clk_get_gpll_rate(ulong *rate) in px30_clk_get_gpll_rate()
1250 const struct cpu_rate_table *rate; in px30_armclk_set_clk() local
1293 ulong rate = 0; in px30_clk_get_rate() local
1384 static ulong px30_clk_set_rate(struct clk *clk, ulong rate) in px30_clk_set_rate()
1496 ulong rate; in rockchip_mmc_get_phase() local
1530 ulong rate; in rockchip_mmc_set_phase() local
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H A Dclk_rk322x.c95 const struct rockchip_cpu_rate_table *rate; in rk322x_armclk_set_clk() local
579 ulong rate; in rk322x_clk_get_rate() local
637 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate) in rk322x_clk_set_rate()
824 ulong rate; in rk322x_mmc_get_phase() local
860 ulong rate; in rk322x_mmc_set_phase() local
1105 unsigned long rate; in soc_clk_dump() local
H A Dclk_rk3288.c35 ulong rate; member
867 ulong rate, parent_rate; in rockchip_aclk_peri_get_clk() local
885 ulong rate, parent_rate; in rockchip_aclk_cpu_get_clk() local
906 ulong rate, parent_rate; in rockchip_pclk_peri_get_clk() local
920 ulong rate, parent_rate; in rockchip_pclk_cpu_get_clk() local
1151 static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate) in rk3288_clk_set_rate()
1262 ulong rate; in rockchip_mmc_get_phase() local
1295 ulong rate; in rockchip_mmc_set_phase() local
1600 unsigned long rate; in soc_clk_dump() local
H A Dclk_rk1808.c863 const struct rockchip_cpu_rate_table *rate; in rk1808_armclk_set_clk() local
909 ulong rate = 0; in rk1808_clk_get_rate() local
991 static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate) in rk1808_clk_set_rate()
1122 ulong rate; in rk1808_mmc_get_phase() local
1158 ulong rate; in rk1808_mmc_set_phase() local
1416 unsigned long rate; in soc_clk_dump() local
/rk3399_rockchip-uboot/board/microchip/pic32mzda/
H A Dpic32mzda.c20 ulong rate; in checkboard() local
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/
H A Demc.c173 static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, in decode_emc()
241 int tegra_set_emc(const void *blob, unsigned rate) in tegra_set_emc()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-sdio.c15 int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep) in clk_sdio_enable()
H A Dclk-core.c161 static int peri_clk_set_rate(struct clk *c, unsigned long rate) in peri_clk_set_rate()
480 unsigned long rate; in clk_get_rate() local
492 int clk_set_rate(struct clk *c, unsigned long rate) in clk_set_rate()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-sdio.c15 int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep) in clk_sdio_enable()
H A Dclk-core.c161 static int peri_clk_set_rate(struct clk *c, unsigned long rate) in peri_clk_set_rate()
480 unsigned long rate; in clk_get_rate() local
492 int clk_set_rate(struct clk *c, unsigned long rate) in clk_set_rate()
/rk3399_rockchip-uboot/test/dm/
H A Dclk.c17 ulong rate; in dm_test_clk() local
/rk3399_rockchip-uboot/drivers/clk/at91/
H A Dclk-h32mx.c24 ulong rate = gd->arch.mck_rate_hz; in sama5d4_h32mx_clk_get_rate() local
/rk3399_rockchip-uboot/drivers/sound/
H A Dmax98095.c34 unsigned int rate; member
118 static int rate_value(int rate, u8 *value) in rate_value()
144 unsigned int rate, unsigned int bits_per_sample) in max98095_hw_params()
/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_zynq.c288 static unsigned long zynq_clk_calc_peripheral_two_divs(ulong rate, in zynq_clk_calc_peripheral_two_divs()
315 enum zynq_clk id, ulong rate, in zynq_clk_set_peripheral_rate()
350 ulong rate) in zynq_clk_set_gem_rate()
404 static ulong zynq_clk_set_rate(struct clk *clk, ulong rate) in zynq_clk_set_rate()
/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Dti_usb_phy.c82 unsigned long rate; member
119 unsigned long rate; in ti_usb3_get_dpll_params() local
228 u32 rate; in ti_usb3_phy_power() local
/rk3399_rockchip-uboot/drivers/power/
H A Dtps6586x.c112 static int set_voltage(int reg, int data, int rate) in set_voltage()
169 int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, in tps6586x_adjust_sm0_sm1()
/rk3399_rockchip-uboot/drivers/misc/
H A Dpca9551_led.c94 static int pca9551_led_set_blink_rate(int idx, struct pca9551_blink_rate rate) in pca9551_led_set_blink_rate()
143 struct pca9551_blink_rate rate; in __led_blink() local
/rk3399_rockchip-uboot/arch/arm/mach-omap2/
H A Dpipe3-phy.c70 u32 rate; in omap_pipe3_get_dpll_params() local
149 u32 val, rate; in omap_control_phy_power() local
/rk3399_rockchip-uboot/include/
H A Dlynxkdi.h18 uint32_t rate; /* System frequency */ member
/rk3399_rockchip-uboot/drivers/clk/tegra/
H A Dtegra-car-clk.c51 static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) in tegra_car_clk_set_rate()
/rk3399_rockchip-uboot/drivers/video/
H A Dipu_common.c127 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate()
134 long clk_round_rate(struct clk *clk, unsigned long rate) in clk_round_rate()
294 unsigned long rate) in ipu_pixel_clk_round_rate()
327 static int ipu_pixel_clk_set_rate(struct clk *clk, unsigned long rate) in ipu_pixel_clk_set_rate()
1240 int ipu_set_ldb_clock(int rate) in ipu_set_ldb_clock()
/rk3399_rockchip-uboot/drivers/phy/
H A Dti-pipe3-phy.c75 unsigned long rate; member
93 u32 rate; in omap_pipe3_get_dpll_params() local
171 u32 val, rate; in omap_control_pipe3_power() local
/rk3399_rockchip-uboot/drivers/mmc/
H A Dftsdc010_mci.c26 uint32_t rate; /* actual SD clock in Hz */ member
103 static void ftsdc010_clkset(struct mmc *mmc, uint32_t rate) in ftsdc010_clkset()

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