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Searched refs:VPU_REG_ICU_DBG_DAT0 (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2600 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2574 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2573 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2692 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2710 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2638 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2877 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2858 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2853 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2849 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DregVPU_EX.h260 #define VPU_REG_ICU_DBG_DAT0 (REG_VPU_BASE+( 0x0014<<1)) macro
H A DhalVPU_EX.c2862 while (_VPU_Read2Byte(VPU_REG_ICU_DBG_DAT0) & VPU_REG_ICPU_REQ) in HAL_VPU_EX_SwRst()