| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | halTSP.c | 187 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
422 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
426 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
430 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
434 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
862 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1106 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1376 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1405 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1496 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/ |
| H A D | halTSP.c | 169 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
669 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
688 SET_FLAG1(_HAL_REG32L_R(&_TspCtrl[0].CA_CTRL), TSP_CA_AVPAUSE)); in HAL_TSP_Set_AVPAUSE()
1001 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
1009 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1105 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_STR2MI_MIU_PINPON_EN)); in HAL_TSP_PVR_SetBuffer()
1115 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_burst_len_MASK)); in HAL_TSP_PVR_Enable()
1124 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_PVR_ENABLE)); in HAL_TSP_PVR_Enable()
1126 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in HAL_TSP_PVR_Enable()
1159 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_REG_REC_PID_EN)); in HAL_TSP_PVR_All()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | halTSP.c | 190 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
491 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
495 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
499 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
503 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
931 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1175 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1445 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1474 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1571 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/ |
| H A D | halTSP.c | 168 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
665 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
684 SET_FLAG1(_HAL_REG32L_R(&_TspCtrl[0].CA_CTRL), TSP_CA_AVPAUSE)); in HAL_TSP_Set_AVPAUSE()
997 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
1005 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1101 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_STR2MI_MIU_PINPON_EN)); in HAL_TSP_PVR_SetBuffer()
1111 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_burst_len_MASK)); in HAL_TSP_PVR_Enable()
1120 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_PVR_ENABLE)); in HAL_TSP_PVR_Enable()
1122 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in HAL_TSP_PVR_Enable()
1155 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_REG_REC_PID_EN)); in HAL_TSP_PVR_All()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/ |
| H A D | halTSP.c | 169 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
666 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
685 SET_FLAG1(_HAL_REG32L_R(&_TspCtrl[0].CA_CTRL), TSP_CA_AVPAUSE)); in HAL_TSP_Set_AVPAUSE()
998 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
1006 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1102 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_STR2MI_MIU_PINPON_EN)); in HAL_TSP_PVR_SetBuffer()
1112 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_burst_len_MASK)); in HAL_TSP_PVR_Enable()
1121 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_PVR_ENABLE)); in HAL_TSP_PVR_Enable()
1123 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in HAL_TSP_PVR_Enable()
1156 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_REG_REC_PID_EN)); in HAL_TSP_PVR_All()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | halTSP.c | 190 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
491 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
495 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
499 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
503 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
931 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1175 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1445 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1474 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1571 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | halTSP.c | 190 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
509 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
513 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
517 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
521 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
949 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1193 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1502 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1531 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1628 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | halTSP.c | 190 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
509 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
513 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
517 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
521 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
949 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1193 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1463 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1492 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1589 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | halTSP.c | 177 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
471 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
475 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
479 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
483 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
911 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1139 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1409 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1438 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1529 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | halTSP.c | 186 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
485 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
489 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
493 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
497 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
925 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1153 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1423 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1452 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1549 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | halTSP.c | 183 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
357 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
361 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
365 … SET_FLAG1(_HAL_REG16_R(&_TspCtrl5[0].Ts_If_Fi_Cfg), TSP_FIIF_EN|TSP_FIIF_MUX_LIVE_PATH)); in _HAL_TSP_tsif_select()
802 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
1123 SET_FLAG1(_HAL_REG32_R(&_TspCtrl3[0].PIDFLR_PCR[u32EngId]), TSP_PIDFLT_PCR_EN)); in HAL_TSP_PidFlt_HWPcrFlt_Enable()
1382 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_FILEIN_BYTETIMER_ENABLE)); in HAL_TSP_TsDma_SetDelay()
1410 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_FILEIN_PAUSE)); in HAL_TSP_TsDma_Pause()
1500 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
1510 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_PVR2_REG_PINGPONG_EN)); in HAL_TSP_PVR_SetBuffer()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/ |
| H A D | halTSO.c | 161 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
372 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
388 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
436 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
1074 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1169 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1171 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1205 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1208 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/ |
| H A D | halTSO.c | 161 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
381 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
397 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
445 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
1099 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1194 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1196 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1230 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1233 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/ |
| H A D | halTSO.c | 161 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
381 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
397 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
445 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
1099 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1194 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1196 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1230 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1233 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/ |
| H A D | halTSO.c | 161 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
372 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
388 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
436 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
1074 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1169 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1171 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1205 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1208 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tso/ |
| H A D | halTSO.c | 159 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
324 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
340 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
382 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG4), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG4)), TSO_TIMESTAMP_R… in HAL_TSO_Init()
925 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
989 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), TSO_CFG1_TSO_TS… in HAL_TSO_Filein_Enable()
991 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1025 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1028 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1047 … SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_PKT192_BLK_DISABLE)); in HAL_TSO_Filein_192BlockMode_Enable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/ |
| H A D | halTSO.c | 145 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
307 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
323 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
850 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
929 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
931 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
964 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
983 … SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_PKT192_BLK_DISABLE)); in HAL_TSO_Filein_192BlockMode_Enable()
1019 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1034 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CFG1), TSO_CFG1_PKT_PARA… in HAL_TSO_RW_ValidBlock_Count()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/ |
| H A D | halTSO.c | 145 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
363 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
379 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
997 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1092 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1094 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1127 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1146 … SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_PKT192_BLK_DISABLE)); in HAL_TSO_Filein_192BlockMode_Enable()
1182 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1197 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CFG1), TSO_CFG1_PKT_PARA… in HAL_TSO_RW_ValidBlock_Count()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/ |
| H A D | halTSO.c | 153 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
371 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndR()
387 …_HAL_REG16_W(&(_TSOCtrl->TSO_INDR_CTRL) , SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_INDR_CTRL)), TSO_… in HAL_TSO_REG32_IndW()
1025 …_HAL_REG32_W(&(_TSOCtrl->REP_PidFlt[u16FltId]), SET_FLAG1(_HAL_REG32_R(&(_TSOCtrl->REP_PidFlt[u16F… in HAL_TSO_ReplaceFlt_Enable()
1120 … _HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->TSO_CFG1)), u16ChIf)); in HAL_TSO_Filein_Enable()
1122 …SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_TSO_FILEIN|TSO_FICFG_FILE_SE… in HAL_TSO_Filein_Enable()
1155 …_HAL_REG16_W(&(_TSOCtrl->TSO_FILE_CFG[u8FileEng]), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[… in HAL_TSO_Filein_192Mode_Enable()
1174 … SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_FILE_CFG[u8FileEng]), TSO_FICFG_PKT192_BLK_DISABLE)); in HAL_TSO_Filein_192BlockMode_Enable()
1210 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1225 …_HAL_REG16_W(&(_TSOCtrl->TSO_CFG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CFG1), TSO_CFG1_PKT_PARA… in HAL_TSO_RW_ValidBlock_Count()
[all …]
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/ |
| H A D | halNDSRASP.c | 411 …_HAL_REG16_W((REG16*)_REG_RASP1_MIU, SET_FLAG1(_HAL_REG16_R((REG16*)_REG_RASP1_MIU), _RASP1_MIU_EN… in HAL_NDSRASP_Init()
524 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR)); in HAL_NDSRASP_Payload_Enable()
530 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN)); in HAL_NDSRASP_Payload_Enable()
533 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN)); in HAL_NDSRASP_Payload_Enable()
535 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE)); in HAL_NDSRASP_Payload_Enable()
645 …_HAL_REG16_W((REG16 *)_u32PidfltReg, SET_FLAG1(_HAL_REG16_R((REG16 *)_u32PidfltReg), RASP_PID_PKT_… in HAL_NDSRASP_SetCorptFlt()
912 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS)); in HAL_NDSRASP_GetWritePtr()
1032 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT)); in HAL_NDSRASP_SetPayloadTimeStamp()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo… in HAL_NDSRASP_SetStream_47_48()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | halNDSRASP.c | 411 …_HAL_REG16_W((REG16*)_REG_RASP1_MIU, SET_FLAG1(_HAL_REG16_R((REG16*)_REG_RASP1_MIU), _RASP1_MIU_EN… in HAL_NDSRASP_Init()
524 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR)); in HAL_NDSRASP_Payload_Enable()
530 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN)); in HAL_NDSRASP_Payload_Enable()
533 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN)); in HAL_NDSRASP_Payload_Enable()
535 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE)); in HAL_NDSRASP_Payload_Enable()
645 …_HAL_REG16_W((REG16 *)_u32PidfltReg, SET_FLAG1(_HAL_REG16_R((REG16 *)_u32PidfltReg), RASP_PID_PKT_… in HAL_NDSRASP_SetCorptFlt()
912 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS)); in HAL_NDSRASP_GetWritePtr()
1032 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT)); in HAL_NDSRASP_SetPayloadTimeStamp()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo… in HAL_NDSRASP_SetStream_47_48()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | halNDSRASP.c | 411 …_HAL_REG16_W((REG16*)_REG_RASP1_MIU, SET_FLAG1(_HAL_REG16_R((REG16*)_REG_RASP1_MIU), _RASP1_MIU_EN… in HAL_NDSRASP_Init()
524 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR)); in HAL_NDSRASP_Payload_Enable()
530 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN)); in HAL_NDSRASP_Payload_Enable()
533 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN)); in HAL_NDSRASP_Payload_Enable()
535 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE)); in HAL_NDSRASP_Payload_Enable()
645 …_HAL_REG16_W((REG16 *)_u32PidfltReg, SET_FLAG1(_HAL_REG16_R((REG16 *)_u32PidfltReg), RASP_PID_PKT_… in HAL_NDSRASP_SetCorptFlt()
912 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS)); in HAL_NDSRASP_GetWritePtr()
1032 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT)); in HAL_NDSRASP_SetPayloadTimeStamp()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo… in HAL_NDSRASP_SetStream_47_48()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | halNDSRASP.c | 411 …_HAL_REG16_W((REG16*)_REG_RASP1_MIU, SET_FLAG1(_HAL_REG16_R((REG16*)_REG_RASP1_MIU), _RASP1_MIU_EN… in HAL_NDSRASP_Init()
524 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR)); in HAL_NDSRASP_Payload_Enable()
530 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN)); in HAL_NDSRASP_Payload_Enable()
533 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN)); in HAL_NDSRASP_Payload_Enable()
535 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE)); in HAL_NDSRASP_Payload_Enable()
645 …_HAL_REG16_W((REG16 *)_u32PidfltReg, SET_FLAG1(_HAL_REG16_R((REG16 *)_u32PidfltReg), RASP_PID_PKT_… in HAL_NDSRASP_SetCorptFlt()
912 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS)); in HAL_NDSRASP_GetWritePtr()
1032 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT)); in HAL_NDSRASP_SetPayloadTimeStamp()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo… in HAL_NDSRASP_SetStream_47_48()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | halNDSRASP.c | 411 …_HAL_REG16_W((REG16*)_REG_RASP1_MIU, SET_FLAG1(_HAL_REG16_R((REG16*)_REG_RASP1_MIU), _RASP1_MIU_EN… in HAL_NDSRASP_Init()
524 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_RST_WADDR)); in HAL_NDSRASP_Payload_Enable()
530 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL2), RASP_PAYLOAD_BURST_LEN)); in HAL_NDSRASP_Payload_Enable()
533 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_EN)); in HAL_NDSRASP_Payload_Enable()
535 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3), RASP_PAYLD2MIU_PINGPONE)); in HAL_NDSRASP_Payload_Enable()
645 …_HAL_REG16_W((REG16 *)_u32PidfltReg, SET_FLAG1(_HAL_REG16_R((REG16 *)_u32PidfltReg), RASP_PID_PKT_… in HAL_NDSRASP_SetCorptFlt()
912 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4) , RASP_TS_STR2MI_WP_LD_DIS)); in HAL_NDSRASP_GetWritePtr()
1032 SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL3) , RASP_PAYLD2MIU_LPCR_WT)); in HAL_NDSRASP_SetPayloadTimeStamp()
1438 …SET_FLAG1(_HAL_REG16_R(&_RASPReg[u32RASPEng][0].RASP_HW_CTRL4), RASP_AUTO_STREAM_47_48));// '0' fo… in HAL_NDSRASP_SetStream_47_48()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/ |
| H A D | halTSO.c | 89 #define SET_FLAG1(flag, bit) ((flag)| (bit)) macro
93 #define _REG16_SET(reg, value); _HAL_REG16_W(reg, SET_FLAG1(_HAL_REG16_R(reg), value));
94 #define _REG32_SET(reg, value); _HAL_REG32_W(reg, SET_FLAG1(_HAL_REG32_R(reg), value));
1108 _HAL_REG16_W(&(_TSOCtrl->SW_RSTZ), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl->SW_RSTZ)), u16data)); in HAL_TSO_CmdQ_Reset()
1540 …_HAL_REG16_W(&(_TSOCtrl->TSO_CONFIG1), SET_FLAG1(_HAL_REG16_R(&_TSOCtrl->TSO_CONFIG1), TSO_CFG1_PK… in HAL_TSO_RW_OutputPktSize()
1857 _HAL_REG16_W(p16Reg , SET_FLAG1(_HAL_REG16_R(p16Reg), TSO1_SVQ1_TX_CONFIG_TX_RESET)); in HAL_TSO_SVQ_TX_Reset()
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