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Searched refs:REG_CLKGEN0_TSO_OUT_CLK_MASK (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c133 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x001F macro
788 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
2089 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c133 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x001F macro
788 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
2089 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DhalTSO.c194 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
482 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
957 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c133 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x001F macro
791 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
2154 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c200 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
541 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
1007 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c202 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
550 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
1032 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c133 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x003F macro
797 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
2160 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c202 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
550 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
1032 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c200 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
541 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
1007 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c134 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x001F macro
800 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
2152 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) &= ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/
H A DhalTSO.c195 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00 macro
783 MS_U16 u16Clk = TSO_CLKGEN1_REG(REG_CLKGEN1_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DhalTSO.c186 #define REG_CLKGEN0_TSO_OUT_CLK_MASK 0x1F00UL macro
929 MS_U16 u16Clk = TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_OUT_CLK) & ~REG_CLKGEN0_TSO_OUT_CLK_MASK; in HAL_TSO_OutClk()