Home
last modified time | relevance | path

Searched refs:REG_CLKGEN0_TSO_IN_DISABLE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c105 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0001 macro
504 u16value |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_Set_InClk()
2106 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2107 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2108 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2109 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2110 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2111 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c105 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0001 macro
504 u16value |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_Set_InClk()
2106 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2107 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2108 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2109 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2110 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2111 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c105 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0001 macro
507 u16value |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_Set_InClk()
2171 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2172 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2173 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2174 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2175 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2176 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c105 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0001 macro
505 u16value |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_Set_InClk()
2177 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2178 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2179 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2180 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2181 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2182 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c106 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0001 macro
508 u16value |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_Set_InClk()
2169 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2170 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO1_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2171 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO2_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2172 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO3_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2173 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO4_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
2174 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DhalTSO.c164 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro
491 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c172 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro
550 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c172 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro
559 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c172 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro
559 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c172 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro
550 TSO_CLKGEN0_REG(REG_CLKGEN0_TSO_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DhalTSO.c156 #define REG_CLKGEN0_TSO_IN_DISABLE 0x0100UL macro