| /utopia/UTPA2-700.0.x/modules/msos/hal/macan/mmio/ |
| H A D | halMMIO.c | 135 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
145 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
154 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
163 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
173 #define HAL_MMIO_PM_BASE 0x1f000000 macro
180 #define HAL_MMIO_PM_BASE 0xfd000000 macro
302 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
358 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
359 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
363 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/M7821/mmio/ |
| H A D | halMMIO.c | 135 …#define HAL_MMIO_PM_BASE 0x1f000000UL //[MMIO][HAL][001] Base address of PM domain regi… macro
150 …#define HAL_MMIO_PM_BASE RIU_BASE //[MMIO][HAL][007] Base address of PM domain register… macro
160 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
169 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
178 …#define HAL_MMIO_PM_BASE 0x1f000000UL //[MMIO][HAL][013] Base address of PM domain register… macro
187 #define HAL_MMIO_PM_BASE 0xfd000000 macro
308 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
364 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
365 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
369 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/k7u/mmio/ |
| H A D | halMMIO.c | 130 #define HAL_MMIO_PM_BASE 0x1f000000 macro
147 #define HAL_MMIO_PM_BASE RIU_BASE macro
159 #define HAL_MMIO_PM_BASE 0xFA000000 macro
167 #define HAL_MMIO_PM_BASE 0xbf000000 macro
178 #define HAL_MMIO_PM_BASE 0x1f000000 macro
189 #define HAL_MMIO_PM_BASE 0xfd000000 macro
319 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
394 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
395 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
399 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/k6/mmio/ |
| H A D | halMMIO.c | 130 #define HAL_MMIO_PM_BASE 0x1f000000 macro
147 #define HAL_MMIO_PM_BASE RIU_BASE macro
159 #define HAL_MMIO_PM_BASE 0xFA000000 macro
167 #define HAL_MMIO_PM_BASE 0xbf000000 macro
178 #define HAL_MMIO_PM_BASE 0x1f000000 macro
189 #define HAL_MMIO_PM_BASE 0xfd000000 macro
319 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
394 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
395 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
399 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/k6lite/mmio/ |
| H A D | halMMIO.c | 130 #define HAL_MMIO_PM_BASE 0x1f000000 macro
147 #define HAL_MMIO_PM_BASE RIU_BASE macro
159 #define HAL_MMIO_PM_BASE 0xFA000000 macro
167 #define HAL_MMIO_PM_BASE 0xbf000000 macro
178 #define HAL_MMIO_PM_BASE 0x1f000000 macro
189 #define HAL_MMIO_PM_BASE 0xfd000000 macro
320 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
395 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
396 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
400 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/curry/mmio/ |
| H A D | halMMIO.c | 130 #define HAL_MMIO_PM_BASE 0x1f000000 macro
147 #define HAL_MMIO_PM_BASE RIU_BASE macro
159 #define HAL_MMIO_PM_BASE 0xFA000000 macro
167 #define HAL_MMIO_PM_BASE 0xbf000000 macro
178 #define HAL_MMIO_PM_BASE 0x1f000000 macro
189 #define HAL_MMIO_PM_BASE 0xfd000000 macro
319 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
394 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
395 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
399 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/kano/mmio/ |
| H A D | halMMIO.c | 130 #define HAL_MMIO_PM_BASE 0x1f000000 macro
147 #define HAL_MMIO_PM_BASE RIU_BASE macro
159 #define HAL_MMIO_PM_BASE 0xFA000000 macro
167 #define HAL_MMIO_PM_BASE 0xbf000000 macro
178 #define HAL_MMIO_PM_BASE 0x1f000000 macro
189 #define HAL_MMIO_PM_BASE 0xfd000000 macro
319 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
394 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
395 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
399 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/maldives/mmio/ |
| H A D | halMMIO.c | 114 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
126 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
134 #define HAL_MMIO_PM_BASE 0xbf000000UL macro
145 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
154 #define HAL_MMIO_PM_BASE 0xfd000000UL macro
283 *pu32BaseAddr = HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
349 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
350 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
354 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/mustang/mmio/ |
| H A D | halMMIO.c | 114 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
126 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
134 #define HAL_MMIO_PM_BASE 0xbf000000UL macro
145 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
154 #define HAL_MMIO_PM_BASE 0xfd000000UL macro
283 *pu32BaseAddr = HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
349 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
350 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
354 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/M7621/mmio/ |
| H A D | halMMIO.c | 135 …#define HAL_MMIO_PM_BASE 0x1f000000UL //[MMIO][HAL][001] Base address of PM domain regi… macro
150 …#define HAL_MMIO_PM_BASE RIU_BASE //[MMIO][HAL][007] Base address of PM domain register… macro
160 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
169 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
178 …#define HAL_MMIO_PM_BASE 0x1f000000UL //[MMIO][HAL][013] Base address of PM domain register… macro
299 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
355 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
356 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
360 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/maserati/mmio/ |
| H A D | halMMIO.c | 135 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
150 #define HAL_MMIO_PM_BASE RIU_BASE macro
160 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
169 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
178 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
299 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
355 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
356 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
360 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/maxim/mmio/ |
| H A D | halMMIO.c | 135 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
150 #define HAL_MMIO_PM_BASE RIU_BASE macro
160 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
169 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
178 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
299 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
355 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
356 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
360 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/manhattan/mmio/ |
| H A D | halMMIO.c | 135 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
150 #define HAL_MMIO_PM_BASE RIU_BASE macro
160 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
169 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
178 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
299 *virtBaseAddr = (MS_PHY)HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
355 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
356 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
360 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/mainz/mmio/ |
| H A D | halMMIO.c | 115 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
125 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
133 #define HAL_MMIO_PM_BASE 0xbf000000UL macro
141 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
262 *virtBaseAddr = (MS_PHY) HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
320 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
321 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
325 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/messi/mmio/ |
| H A D | halMMIO.c | 115 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
125 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
133 #define HAL_MMIO_PM_BASE 0xbf000000UL macro
141 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
262 *virtBaseAddr = (MS_PHY) HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
320 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
321 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
325 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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| /utopia/UTPA2-700.0.x/modules/msos/hal/mooney/mmio/ |
| H A D | halMMIO.c | 115 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
127 #define HAL_MMIO_PM_BASE 0xFA000000UL macro
135 #define HAL_MMIO_PM_BASE 0xbf000000UL macro
143 #define HAL_MMIO_PM_BASE 0x1f000000UL macro
270 *virtBaseAddr = (MS_PHY) HAL_MMIO_PM_BASE; in HAL_MMIO_GetBase()
333 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001); in _chip_flush_miu_pipe()
334 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001; in _chip_flush_miu_pipe()
338 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1)); in _chip_flush_miu_pipe()
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