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76 //******************************************************************************
77 //<MStar Software>
78
79 ///////////////////////////////////////////////////////////////////////////////////////////////////
80 ///
81 /// file halMMIO.c
82 /// @brief memory map io (MMIO) HAL
83 /// @author MStar Semiconductor Inc.
84 ///////////////////////////////////////////////////////////////////////////////////////////////////
85
86 //-------------------------------------------------------------------------------------------------
87 // Include Files
88 //-------------------------------------------------------------------------------------------------
89
90 #include "MsCommon.h"
91 #include "halMMIO.h"
92 #include "drvMMIO.h"
93
94 // for getting mapped IO base from DRV
95 extern MS_U32 _u32PM_Bank;
96 extern MS_U32 _u32PM_Bank_SIZE;
97 extern MS_U32 _u32NonPM_Bank;
98 extern MS_U32 _u32NonPM_Bank_SIZE;
99
100 //-------------------------------------------------------------------------------------------------
101 // Driver Compiler Options
102 //-------------------------------------------------------------------------------------------------
103
104 //--------------------------------------------------------------------------------------------------
105 // Global Variables
106 //--------------------------------------------------------------------------------------------------
107 MS_U32 u32_ge0_mmio_base;
108
109 //-------------------------------------------------------------------------------------------------
110 // Local Defines
111 //-------------------------------------------------------------------------------------------------
112 #ifdef MSOS_TYPE_LINUX
113
114 #define HAL_MMIO_PM_BASE 0x1f000000UL
115 #define HAL_MMIO_PM_SIZE 0x002E0000UL
116 #define HAL_MMIO_NONPM_BASE 0x1f200000UL
117 #define HAL_MMIO_NONPM_SIZE 0x000e0000UL
118 #define HAL_MMIO_FLASH_BASE0 0x14000000UL
119 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
120 #define HAL_MMIO_OTP_BASE 0x10000000UL
121 #define HAL_MMIO_OTP_SIZE 0x00002000UL
122
123 #else
124
125 #if defined(MCU_AEON)
126 #define HAL_MMIO_PM_BASE 0xFA000000UL
127 #define HAL_MMIO_PM_SIZE 0x00007B80UL
128 #define HAL_MMIO_NONPM_BASE 0xFA200000UL
129 #define HAL_MMIO_NONPM_SIZE 0x00025600UL
130 #define HAL_MMIO_FLASH_BASE0 0xF9000000UL // non-cache // 0xA1000000 for cache
131 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
132
133 #elif defined(__mips__)
134 #define HAL_MMIO_PM_BASE 0xbf000000UL
135 #define HAL_MMIO_PM_SIZE 0x00007B80UL
136 #define HAL_MMIO_NONPM_BASE 0xbf200000UL
137 #define HAL_MMIO_NONPM_SIZE 0x00025600UL
138 #define HAL_MMIO_FLASH_BASE0 0xB4000000UL // 0x94000000 for cache
139 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
140 #define HAL_MMIO_OTP_BASE 0xB0000000UL
141 #define HAL_MMIO_OTP_SIZE 0x00002000UL
142
143 #elif defined(__arm__)
144 #if defined (MBOOT) || defined (MSOS_TYPE_NUTTX)
145 #define HAL_MMIO_PM_BASE 0x1f000000UL
146 #define HAL_MMIO_PM_SIZE 0x00007B80UL
147 #define HAL_MMIO_NONPM_BASE 0x1f200000UL
148 #define HAL_MMIO_NONPM_SIZE 0x00025600UL
149 #define HAL_MMIO_FLASH_BASE0 0x14000000UL
150 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
151 #define HAL_MMIO_OTP_BASE 0xfd800000UL
152 #define HAL_MMIO_OTP_SIZE 0x00002000UL
153 #else
154 #define HAL_MMIO_PM_BASE 0xfd000000UL
155 #define HAL_MMIO_PM_SIZE 0x00007B80UL
156 #define HAL_MMIO_NONPM_BASE 0xfd200000UL
157 #define HAL_MMIO_NONPM_SIZE 0x00025600UL
158 #define HAL_MMIO_FLASH_BASE0 0xfe000000UL
159 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
160 #define HAL_MMIO_OTP_BASE 0xfd800000UL
161 #define HAL_MMIO_OTP_SIZE 0x00002000UL
162 #endif
163
164 #else
165 #error "Invalid MCU Type";
166 #endif
167
168 #endif //MSOS_TYPE_LINUX
169
170 //-------------------------------------------------------------------------------------------------
171 // Local Structurs
172 //-------------------------------------------------------------------------------------------------
173
174
175 //-------------------------------------------------------------------------------------------------
176 // Global Variables
177 //-------------------------------------------------------------------------------------------------
178
179
180 //-------------------------------------------------------------------------------------------------
181 // Local Variables
182 //-------------------------------------------------------------------------------------------------
183
184
185 //-------------------------------------------------------------------------------------------------
186 // Debug Functions
187 //-------------------------------------------------------------------------------------------------
188
189
190 //-------------------------------------------------------------------------------------------------
191 // Local Functions
192 //-------------------------------------------------------------------------------------------------
193
194
195 //-------------------------------------------------------------------------------------------------
196 // Global Functions
197 //-------------------------------------------------------------------------------------------------
HAL_MMIO_GetType(MS_U32 u32Module)198 MS_U16 HAL_MMIO_GetType(MS_U32 u32Module)
199 {
200 MS_U16 wMmioBankType = 0xFFFF;
201
202 switch (u32Module)
203 {
204 //HAL_MMIO_PM_BANK
205 case MS_MODULE_PM:
206 case MS_MODULE_IR:
207 case MS_MODULE_ISP:
208 case MS_MODULE_PWS:
209 wMmioBankType = DRV_MMIO_PM_BANK;
210 break;
211
212 //HAL_MMIO_NONPM_BANK
213 case MS_MODULE_HW:
214 case MS_MODULE_CHIPTOP:
215 case MS_MODULE_MIU:
216 case MS_MODULE_ACE:
217 case MS_MODULE_AUDIO:
218 case MS_MODULE_AVD:
219 case MS_MODULE_BDMA:
220 case MS_MODULE_DLC:
221 case MS_MODULE_DMD:
222 case MS_MODULE_GE:
223 case MS_MODULE_GOP:
224 case MS_MODULE_GPIO:
225 case MS_MODULE_HVD:
226 case MS_MODULE_HWI2C:
227 case MS_MODULE_IRQ:
228 case MS_MODULE_JPD:
229 case MS_MODULE_MBX:
230 case MS_MODULE_MFE:
231 case MS_MODULE_MHEG5:
232 case MS_MODULE_MVD:
233 case MS_MODULE_MVOP:
234 case MS_MODULE_RVD:
235 case MS_MODULE_TSP:
236 case MS_MODULE_UART:
237 case MS_MODULE_VPU:
238 case MS_MODULE_XC:
239 case MS_MODULE_PCMCIA:
240 case MS_MODULE_PFSH:
241 case MS_MODULE_PNL:
242 case MS_MODULE_PWM:
243 case MS_MODULE_SEM:
244 case MS_MODULE_VBI:
245 case MS_MODULE_VIF:
246 case MS_MODULE_DIP:
247 case MS_MODULE_MPIF:
248 case MS_MODULE_MMFILEIN:
249 case MS_MODULE_GPD:
250 case MS_MODULE_TSO:
251 case MS_MODULE_CMDQ:
252 wMmioBankType = DRV_MMIO_NONPM_BANK;
253 break;
254
255 case MS_MODULE_SC:
256 wMmioBankType = DRV_MMIO_SC_BANK;
257 break;
258
259 //HAL_MMIO_FLASH_BANK0
260 case MS_MODULE_FLASH:
261 wMmioBankType = DRV_MMIO_FLASH_BANK0;
262 break;
263
264 default:
265 wMmioBankType = 0xFFFF;
266 break;
267
268 }
269
270 return wMmioBankType;
271 }
272
273
HAL_MMIO_GetBase(MS_U32 * pu32BaseAddr,MS_U32 * pu32BaseSize,MS_U32 u32BankType)274 MS_BOOL HAL_MMIO_GetBase(MS_U32* pu32BaseAddr, MS_U32* pu32BaseSize, MS_U32 u32BankType)
275 {
276 MS_BOOL bRet = TRUE;
277
278 *pu32BaseAddr = 0;
279 *pu32BaseSize = 0;
280 switch (u32BankType)
281 {
282 case DRV_MMIO_PM_BANK:
283 *pu32BaseAddr = HAL_MMIO_PM_BASE;
284 *pu32BaseSize = HAL_MMIO_PM_SIZE;
285 break;
286
287 case DRV_MMIO_NONPM_BANK:
288 *pu32BaseAddr = HAL_MMIO_NONPM_BASE;
289 *pu32BaseSize = HAL_MMIO_NONPM_SIZE;
290 break;
291
292 case DRV_MMIO_FLASH_BANK0:
293 *pu32BaseAddr = HAL_MMIO_FLASH_BASE0;
294 *pu32BaseSize = HAL_MMIO_FLASH_SIZE0;
295 break;
296
297 case DRV_MMIO_OTP_BANK:
298 #if defined (MCU_AEON)
299 bRet = FALSE;
300 #else
301 *pu32BaseAddr = HAL_MMIO_OTP_BASE;
302 *pu32BaseSize = HAL_MMIO_OTP_SIZE;
303 #endif
304 break;
305 case DRV_MMIO_FRC_BANK:
306 break;
307 default:
308 // MS_ASSERT(0);
309 bRet = FALSE;
310 break;
311 }
312
313 return bRet;
314 }
315
316
317 // @NOTE: Only run after MMIO_Init
HAL_MMIO_GetIPBase(MS_U32 * pu32BaseAddr,MS_U16 u16BankType)318 MS_BOOL HAL_MMIO_GetIPBase(MS_U32 *pu32BaseAddr, MS_U16 u16BankType)
319 {
320 *pu32BaseAddr = 0;
321
322 // if MMIO_Init is not yet initialized.
323 if((_u32PM_Bank_SIZE == 0x0) || (_u32NonPM_Bank_SIZE == 0x0))
324 {
325 return FALSE;
326 }
327
328 switch (u16BankType)
329 {
330 case DRV_MMIO_SC_BANK:
331 *pu32BaseAddr =_u32NonPM_Bank + 0x00005200; // 0xBF220C00, 0xBF220C80
332 break;
333
334 default:
335 return FALSE;
336 }
337
338 return TRUE;
339 }
340
341 #if defined(__arm__)
342 #ifndef MSOS_TYPE_LINUX
_chip_flush_miu_pipe(void)343 static void _chip_flush_miu_pipe(void)
344 {
345 unsigned int dwReadData = 0;
346
347
348 //toggle the flush miu pipe fire bit
349 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001);
350 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001;
351
352 do
353 {
354 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1));
355 dwReadData &= BIT(12); //Check Status of Flush Pipe Finish
356
357 } while(dwReadData == 0);
358 }
359 #endif
360 #endif
361
HAL_MMIO_FlushMemory(void)362 void HAL_MMIO_FlushMemory(void)
363 {
364 #if defined(__arm__)
365 #ifndef MSOS_TYPE_LINUX
366 _chip_flush_miu_pipe();
367 #endif
368 #endif
369 }
370
HAL_MMIO_ReadMemory(void)371 void HAL_MMIO_ReadMemory(void)
372 {
373 #if defined(__arm__)
374 #ifndef MSOS_TYPE_LINUX
375 _chip_flush_miu_pipe();
376 #endif
377 #endif
378 }
379
380
381