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76 //******************************************************************************
77 //<MStar Software>
78
79 ///////////////////////////////////////////////////////////////////////////////////////////////////
80 ///
81 /// file halMMIO.c
82 /// @brief memory map io (MMIO) HAL
83 /// @author MStar Semiconductor Inc.
84 ///////////////////////////////////////////////////////////////////////////////////////////////////
85
86 //-------------------------------------------------------------------------------------------------
87 // Include Files
88 //-------------------------------------------------------------------------------------------------
89
90 #include "MsCommon.h"
91 #include "halMMIO.h"
92 #include "drvMMIO.h"
93
94 // for getting mapped IO base from DRV
95 extern MS_VIRT _virtPM_Bank;
96 extern MS_U32 _u32PM_Bank_SIZE;
97 extern MS_VIRT _virtNonPM_Bank;
98 extern MS_U32 _u32NonPM_Bank_SIZE;
99
100 //-------------------------------------------------------------------------------------------------
101 // Driver Compiler Options
102 //-------------------------------------------------------------------------------------------------
103
104 //--------------------------------------------------------------------------------------------------
105 // Global Variables
106 //--------------------------------------------------------------------------------------------------
107 MS_VIRT virt_ge0_mmio_base;
108
109
110 //-------------------------------------------------------------------------------------------------
111 // Local Defines
112 //-------------------------------------------------------------------------------------------------
113 #ifdef MSOS_TYPE_LINUX
114
115 #define HAL_MMIO_PM_BASE 0x1f000000UL
116 #define HAL_MMIO_PM_SIZE 0x00300000UL
117 #define HAL_MMIO_NONPM_BASE 0x1f200000UL
118 #define HAL_MMIO_NONPM_SIZE 0x00100000UL
119 #define HAL_MMIO_FLASH_BASE0 0x14000000UL
120 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
121 #define HAL_MMIO_XC_EXT_BASE 0x1f400000UL
122 #define HAL_MMIO_XC_EXT_SIZE 0x00200000UL
123
124 #else
125
126 #if defined(MCU_AEON)
127 #define HAL_MMIO_PM_BASE 0xFA000000UL
128 #define HAL_MMIO_PM_SIZE 0x00300000UL
129 #define HAL_MMIO_NONPM_BASE 0xFA200000UL
130 #define HAL_MMIO_NONPM_SIZE 0x00100000UL
131 #define HAL_MMIO_FLASH_BASE0 0xA1000000UL // non-cache // 0xA1000000 for cache
132 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
133
134 #elif defined(__mips__)
135 #define HAL_MMIO_PM_BASE 0xbf000000UL
136 #define HAL_MMIO_PM_SIZE 0x00300000UL
137 #define HAL_MMIO_NONPM_BASE 0xbf200000UL
138 #define HAL_MMIO_NONPM_SIZE 0x00100000UL
139 #define HAL_MMIO_FLASH_BASE0 0xb4000000UL
140 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
141
142 #elif defined(__aarch64__) || defined(__arm__)
143 #define HAL_MMIO_PM_BASE 0x1f000000UL
144 #define HAL_MMIO_PM_SIZE 0x00300000UL
145 #define HAL_MMIO_NONPM_BASE 0x1f200000UL
146 #define HAL_MMIO_NONPM_SIZE 0x00100000UL
147 #define HAL_MMIO_FLASH_BASE0 0x14000000UL
148 #define HAL_MMIO_FLASH_SIZE0 0x01000000UL
149 #define HAL_MMIO_XC_EXT_BASE 0x1f400000UL
150 #define HAL_MMIO_XC_EXT_SIZE 0x00200000UL
151
152 #else
153 #error "Invalid MCU Type";
154 #endif
155
156 #endif //MSOS_TYPE_LINUX
157
158 //-------------------------------------------------------------------------------------------------
159 // Local Structurs
160 //-------------------------------------------------------------------------------------------------
161
162 //-------------------------------------------------------------------------------------------------
163 // Global Variables
164 //-------------------------------------------------------------------------------------------------
165
166 //-------------------------------------------------------------------------------------------------
167 // Local Variables
168 //-------------------------------------------------------------------------------------------------
169
170 //-------------------------------------------------------------------------------------------------
171 // Debug Functions
172 //-------------------------------------------------------------------------------------------------
173
174 //-------------------------------------------------------------------------------------------------
175 // Local Functions
176 //-------------------------------------------------------------------------------------------------
177
178 //-------------------------------------------------------------------------------------------------
179 // Global Functions
180 //-------------------------------------------------------------------------------------------------
HAL_MMIO_GetType(MS_U32 u32Module)181 MS_U16 HAL_MMIO_GetType(MS_U32 u32Module)
182 {
183 MS_U16 wMmioBankType = 0xFFFF;
184
185 switch (u32Module)
186 {
187 //HAL_MMIO_PM_BANK
188 case MS_MODULE_PM:
189 case MS_MODULE_IR:
190 case MS_MODULE_ISP:
191 case MS_MODULE_PWS:
192 wMmioBankType = DRV_MMIO_PM_BANK;
193 break;
194
195 //HAL_MMIO_NONPM_BANK
196 case MS_MODULE_HW:
197 case MS_MODULE_CHIPTOP:
198 case MS_MODULE_MIU:
199 case MS_MODULE_ACE:
200 case MS_MODULE_AUDIO:
201 case MS_MODULE_AVD:
202 case MS_MODULE_BDMA:
203 case MS_MODULE_DLC:
204 case MS_MODULE_DMD:
205 case MS_MODULE_GE:
206 case MS_MODULE_GOP:
207 case MS_MODULE_GPIO:
208 case MS_MODULE_HVD:
209 case MS_MODULE_HWI2C:
210 case MS_MODULE_IRQ:
211 case MS_MODULE_JPD:
212 case MS_MODULE_MBX:
213 case MS_MODULE_MFE:
214 case MS_MODULE_MHEG5:
215 case MS_MODULE_MVD:
216 case MS_MODULE_MVOP:
217 case MS_MODULE_RVD:
218 case MS_MODULE_TSP:
219 case MS_MODULE_UART:
220 case MS_MODULE_VPU:
221 case MS_MODULE_XC:
222 case MS_MODULE_PCMCIA:
223 case MS_MODULE_PFSH:
224 case MS_MODULE_PNL:
225 case MS_MODULE_PWM:
226 case MS_MODULE_SEM:
227 case MS_MODULE_VBI:
228 case MS_MODULE_VIF:
229 case MS_MODULE_DIP:
230 case MS_MODULE_MPIF:
231 case MS_MODULE_MMFILEIN:
232 case MS_MODULE_GPD:
233 case MS_MODULE_TSO:
234 case MS_MODULE_CMDQ:
235 wMmioBankType = DRV_MMIO_NONPM_BANK;
236 break;
237
238 case MS_MODULE_SC:
239 wMmioBankType = DRV_MMIO_SC_BANK;
240 break;
241
242 case MS_MODULE_XC_EXT:
243 wMmioBankType = DRV_MMIO_XC_EXT_BANK;
244 break;
245
246 //HAL_MMIO_FLASH_BANK0
247 case MS_MODULE_FLASH:
248 wMmioBankType = DRV_MMIO_FLASH_BANK0;
249 break;
250
251 default:
252 wMmioBankType = 0xFFFF;
253 break;
254
255 }
256
257 return wMmioBankType;
258 }
259
260
HAL_MMIO_GetBase(MS_PHY * virtBaseAddr,MS_PHY * pu32BaseSize,MS_U32 u32BankType)261 MS_BOOL HAL_MMIO_GetBase(MS_PHY* virtBaseAddr, MS_PHY* pu32BaseSize, MS_U32 u32BankType)
262 {
263 MS_BOOL bRet = TRUE;
264
265 *virtBaseAddr = 0;
266 *pu32BaseSize = 0;
267 switch (u32BankType)
268 {
269 case DRV_MMIO_PM_BANK:
270 *virtBaseAddr = (MS_PHY) HAL_MMIO_PM_BASE;
271 *pu32BaseSize = (MS_PHY) HAL_MMIO_PM_SIZE;
272 break;
273
274 case DRV_MMIO_NONPM_BANK:
275 *virtBaseAddr = (MS_PHY) HAL_MMIO_NONPM_BASE;
276 *pu32BaseSize = (MS_PHY) HAL_MMIO_NONPM_SIZE;
277 break;
278
279 case DRV_MMIO_FLASH_BANK0:
280 *virtBaseAddr = (MS_PHY) HAL_MMIO_FLASH_BASE0;
281 *pu32BaseSize = (MS_PHY) HAL_MMIO_FLASH_SIZE0;
282 break;
283 #if defined(__aarch64__) || defined(__arm__)
284 case DRV_MMIO_XC_EXT_BANK:
285 *virtBaseAddr = (MS_PHY) HAL_MMIO_XC_EXT_BASE;
286 *pu32BaseSize = (MS_PHY) HAL_MMIO_XC_EXT_SIZE;
287 break;
288 #endif
289 case DRV_MMIO_FRC_BANK:
290 break;
291
292 default:
293 // MS_ASSERT(0);
294 bRet = FALSE;
295 break;
296 }
297
298 return bRet;
299 }
300
301
302 // @NOTE: Only run after MMIO_Init
HAL_MMIO_GetIPBase(MS_VIRT * virtBaseAddr,MS_U16 u16BankType)303 MS_BOOL HAL_MMIO_GetIPBase(MS_VIRT *virtBaseAddr, MS_U16 u16BankType)
304 {
305 *virtBaseAddr = 0;
306
307 // if MMIO_Init is not yet initialized.
308 if((_u32PM_Bank_SIZE == 0x0) || (_u32NonPM_Bank_SIZE == 0x0))
309 {
310 return FALSE;
311 }
312
313 switch (u16BankType)
314 {
315 case DRV_MMIO_SC_BANK:
316 *virtBaseAddr =_virtNonPM_Bank + 0x00005200; // 0xBF220C00, 0xBF220C80
317 break;
318
319 default:
320 return FALSE;
321 }
322
323 return TRUE;
324 }
325
326 #if defined(__aarch64__) || defined(__arm__)
327 #ifndef MSOS_TYPE_LINUX
_chip_flush_miu_pipe(void)328 static void _chip_flush_miu_pipe(void)
329 {
330 unsigned int dwReadData = 0;
331
332 //toggle the flush miu pipe fire bit
333 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) &= ~(0x0001);
334 *(volatile unsigned int *)(HAL_MMIO_PM_BASE + (0x10188A << 1)) |= 0x0001;
335
336 do
337 {
338 dwReadData = *(volatile unsigned int *)(HAL_MMIO_PM_BASE+ (0x1018A0 << 1));
339 dwReadData &= BIT(12); //Check Status of Flush Pipe Finish
340
341 } while(dwReadData == 0);
342 }
343 #endif
344 #endif
345
HAL_MMIO_FlushMemory(void)346 void HAL_MMIO_FlushMemory(void)
347 {
348 #if defined(__aarch64__) || defined(__arm__)
349 #ifndef MSOS_TYPE_LINUX
350 _chip_flush_miu_pipe();
351 #endif
352 #endif
353 }
354
HAL_MMIO_ReadMemory(void)355 void HAL_MMIO_ReadMemory(void)
356 {
357 #if defined(__aarch64__) || defined(__arm__)
358 #ifndef MSOS_TYPE_LINUX
359 _chip_flush_miu_pipe();
360 #endif
361 #endif
362 }
363
364
365