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Searched refs:BK_REG_H (Results 1 – 25 of 108) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dxc_Analog_Reg.h152 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
156 #define H_BK_GOPINT(x) BK_REG_H(REG_SCALER_BASE,x)
159 #define H_BK_IP1F2(x) BK_REG_H(REG_SCALER_BASE,x)
161 #define H_BK_IP2F2(x) BK_REG_H(REG_SCALER_BASE,x)
163 #define H_BK_IP1F1(x) BK_REG_H(REG_SCALER_BASE,x)
165 #define H_BK_IP2F1(x) BK_REG_H(REG_SCALER_BASE,x)
167 #define H_BK_OPM(x) BK_REG_H(REG_SCALER_BASE,x)
169 #define H_BK_DNR(x) BK_REG_H(REG_SCALER_BASE,x)
171 #define H_BK_OP1(x) BK_REG_H(REG_SCALER_BASE,x)
173 #define H_BK_OP1HVSP(x) BK_REG_H(REG_SCALER_BASE,x)
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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dxc_Analog_Reg.h152 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
156 #define H_BK_GOPINT(x) BK_REG_H(REG_SCALER_BASE,x)
159 #define H_BK_IP1F2(x) BK_REG_H(REG_SCALER_BASE,x)
161 #define H_BK_IP2F2(x) BK_REG_H(REG_SCALER_BASE,x)
163 #define H_BK_IP1F1(x) BK_REG_H(REG_SCALER_BASE,x)
165 #define H_BK_IP2F1(x) BK_REG_H(REG_SCALER_BASE,x)
167 #define H_BK_OPM(x) BK_REG_H(REG_SCALER_BASE,x)
169 #define H_BK_DNR(x) BK_REG_H(REG_SCALER_BASE,x)
171 #define H_BK_OP1(x) BK_REG_H(REG_SCALER_BASE,x)
173 #define H_BK_OP1HVSP(x) BK_REG_H(REG_SCALER_BASE,x)
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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_frc.h102 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
141 #define H_FRC_CHIP(x) BK_REG_H(REG_FRC_CHIP_BASE, x)
144 #define H_FRC_SC16(x) BK_REG_H(REG_FRC_SC16_BASE, x)
147 #define H_FRC_SC18(x) BK_REG_H(REG_FRC_SC18_BASE, x)
150 #define H_FRC_SC20(x) BK_REG_H(REG_FRC_SC20_BASE, x)
152 #define H_FRC_SC21(x) BK_REG_H(REG_FRC_SC21_BASE, x)
154 #define H_FRC_SC22(x) BK_REG_H(REG_FRC_SC22_BASE, x)
156 #define H_FRC_SC23(x) BK_REG_H(REG_FRC_SC23_BASE, x)
158 #define H_FRC_SC24(x) BK_REG_H(REG_FRC_SC24_BASE, x)
160 #define H_FRC_SC25(x) BK_REG_H(REG_FRC_SC25_BASE, x)
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/utopia/UTPA2-700.0.x/modules/hdmi/drv/cec/include/
H A Dcec_Analog_Reg.h151 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
155 #define H_BK_GOPINT(x) BK_REG_H(REG_SCALER_BASE,x)
158 #define H_BK_IP1F2(x) BK_REG_H(REG_SCALER_BASE,x)
160 #define H_BK_IP2F2(x) BK_REG_H(REG_SCALER_BASE,x)
162 #define H_BK_IP1F1(x) BK_REG_H(REG_SCALER_BASE,x)
164 #define H_BK_IP2F1(x) BK_REG_H(REG_SCALER_BASE,x)
166 #define H_BK_OPM(x) BK_REG_H(REG_SCALER_BASE,x)
168 #define H_BK_DNR(x) BK_REG_H(REG_SCALER_BASE,x)
170 #define H_BK_OP1(x) BK_REG_H(REG_SCALER_BASE,x)
172 #define H_BK_OP1HVSP(x) BK_REG_H(REG_SCALER_BASE,x)
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/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A DhalDAC.h153 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
156 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
158 #define H_BK_CHIPTOP(x) BK_REG_H(CHIP_REG_BASE, x)
160 #define H_BK_LPLL(x) BK_REG_H(XC_LPLL_BASE, x)
162 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
164 #define H_BK_CLKGEN1(x) BK_REG_H(CLKGEN1_BASE, x)
166 #define H_BK_ANA_MISC_HDMI(x) BK_REG_H(ANA_MISC_HDMI_BASE, x)
168 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A DhalDAC.h157 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
160 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
162 #define H_BK_CHIPTOP(x) BK_REG_H(CHIP_REG_BASE, x)
164 #define H_BK_LPLL(x) BK_REG_H(XC_LPLL_BASE, x)
166 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
168 #define H_BK_CLKGEN1(x) BK_REG_H(CLKGEN1_BASE, x)
170 #define H_BK_ANA_MISC_HDMI(x) BK_REG_H(ANA_MISC_HDMI_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A DhalDAC.h157 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
160 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
162 #define H_BK_CHIPTOP(x) BK_REG_H(CHIP_REG_BASE, x)
164 #define H_BK_LPLL(x) BK_REG_H(XC_LPLL_BASE, x)
166 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
168 #define H_BK_CLKGEN1(x) BK_REG_H(CLKGEN1_BASE, x)
170 #define H_BK_ANA_MISC_HDMI(x) BK_REG_H(ANA_MISC_HDMI_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A DhalDAC.h157 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
160 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
162 #define H_BK_CHIPTOP(x) BK_REG_H(CHIP_REG_BASE, x)
164 #define H_BK_LPLL(x) BK_REG_H(XC_LPLL_BASE, x)
166 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
168 #define H_BK_CLKGEN1(x) BK_REG_H(CLKGEN1_BASE, x)
170 #define H_BK_ANA_MISC_HDMI(x) BK_REG_H(ANA_MISC_HDMI_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h115 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
119 #define H_BK_COMPONENT(x) BK_REG_H(REG_BASE_COMPONENT, x)
123 #define H_BK_VE_ENC_EX(x) BK_REG_H(REG_BASE_VE_ENCODER_EX, x)
125 #define H_BK_VE_ENC(x) BK_REG_H(REG_BASE_VE_ENCODER, x)
127 #define H_BK_VE_SRC(x) BK_REG_H(REG_BASE_VE_SOURCE, x)
129 #define H_BK_VE_DISC(x) BK_REG_H(REG_BASE_VE_DISC, x)
135 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
139 #define H_BK_CHIPTOP(x) BK_REG_H(REG_CHIPTOP_BASE, x)
143 #define H_BK_CHIP(x) BK_REG_H(REG_BASE_CHIP, x)
147 #define H_BK_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
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/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A DhalPNL.h164 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
192 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
196 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
200 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
204 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
206 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
208 #define H_CLKGEN2(x) BK_REG_H(REG_RVD_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A DhalPNL.h168 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
194 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
198 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
202 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
206 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
208 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
210 #define H_CLKGEN2(x) BK_REG_H(REG_RVD_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A DhalPNL.h168 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
194 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
198 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
202 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
206 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
208 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
210 #define H_CLKGEN2(x) BK_REG_H(REG_RVD_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A DhalPNL.h164 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
192 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
196 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
200 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
204 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
206 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
208 #define H_CLKGEN2(x) BK_REG_H(REG_RVD_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A DhalPNL.h160 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
180 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
182 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
187 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
191 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
195 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A DhalPNL.h156 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
177 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
181 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
185 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
196 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
198 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A DhalPNL.h156 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
177 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
181 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
185 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
196 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
198 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A DhalPNL.h160 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
180 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
182 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
187 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
191 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
195 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A DhalPNL.h160 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
180 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
182 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
187 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
191 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
195 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A DhalPNL.h160 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
180 #define H_BK_DAC(x) BK_REG_H(XC_DAC_BASE, x)
182 #define H_BK_HDMITX(x) BK_REG_H(HDMITX_MISC_REG_BASE, x)
187 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
191 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
195 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A DhalPNL.h162 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
185 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
189 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
193 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
197 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
199 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A DhalPNL.h159 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
182 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
186 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
190 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
194 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
196 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A DhalPNL.h159 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
182 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
186 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
190 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
194 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
196 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A DhalPNL.h159 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
187 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
191 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
195 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
199 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
201 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A DhalPNL.h157 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
180 #define H_BK_TCON(x) BK_REG_H(REG_HDGEN_BASE, x)
184 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
188 #define H_BK_UTMI1(x) BK_REG_H(REG_UTMI1_BASE, x)
192 #define H_CLKGEN0(x) BK_REG_H(REG_CLKGEN0_BASE, x)
194 #define H_CLKGEN1(x) BK_REG_H(REG_CLKGEN1_BASE, x)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dxc_Analog_Reg.h113 #define BK_REG_H( x, y ) (((x) | (((y) << 1))) + 1) macro
117 #define H_BK_LPLL(x) BK_REG_H(REG_LPLL_BASE, x)
121 #define H_BK_CHIPTOP(x) BK_REG_H(REG_CLKGEN0_BASE, x)
126 #define H_BK_AFEC(x) BK_REG_H(REG_AFEC_BASE, x)

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