Home
last modified time | relevance | path

Searched refs:src_clk (Results 1 – 8 of 8) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Dclk.c103 unsigned int src_clk; in get_sdram_clk_rate() local
108 src_clk = get_hclk_pll_rate(); in get_sdram_clk_rate()
114 return src_clk/2; in get_sdram_clk_rate()
116 return src_clk; in get_sdram_clk_rate()
124 return src_clk/4; in get_sdram_clk_rate()
126 return src_clk/2; in get_sdram_clk_rate()
128 return src_clk; in get_sdram_clk_rate()
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3568.c778 int src_clk; in rk3568_bus_set_clk() local
783 src_clk = ACLK_BUS_SEL_200M; in rk3568_bus_set_clk()
785 src_clk = ACLK_BUS_SEL_150M; in rk3568_bus_set_clk()
787 src_clk = ACLK_BUS_SEL_100M; in rk3568_bus_set_clk()
789 src_clk = ACLK_BUS_SEL_24M; in rk3568_bus_set_clk()
792 src_clk << ACLK_BUS_SEL_SHIFT); in rk3568_bus_set_clk()
797 src_clk = PCLK_BUS_SEL_100M; in rk3568_bus_set_clk()
799 src_clk = PCLK_BUS_SEL_75M; in rk3568_bus_set_clk()
801 src_clk = PCLK_BUS_SEL_50M; in rk3568_bus_set_clk()
803 src_clk = PCLK_BUS_SEL_24M; in rk3568_bus_set_clk()
[all …]
H A Dclk_rv1106.c167 int src_clk; in rv1106_peri_set_clk() local
172 src_clk = ACLK_PERI_SEL_400M; in rv1106_peri_set_clk()
174 src_clk = ACLK_PERI_SEL_200M; in rv1106_peri_set_clk()
176 src_clk = ACLK_PERI_SEL_100M; in rv1106_peri_set_clk()
178 src_clk = ACLK_PERI_SEL_24M; in rv1106_peri_set_clk()
181 src_clk << ACLK_PERI_SEL_SHIFT); in rv1106_peri_set_clk()
185 src_clk = HCLK_PERI_SEL_200M; in rv1106_peri_set_clk()
187 src_clk = HCLK_PERI_SEL_100M; in rv1106_peri_set_clk()
189 src_clk = HCLK_PERI_SEL_50M; in rv1106_peri_set_clk()
191 src_clk = HCLK_PERI_SEL_24M; in rv1106_peri_set_clk()
[all …]
H A Dclk_rk3576.c221 int src_clk, src_clk_div; in rk3576_bus_set_clk() local
226 src_clk = ACLK_BUS_ROOT_SEL_CPLL; in rk3576_bus_set_clk()
229 src_clk = ACLK_BUS_ROOT_SEL_GPLL; in rk3576_bus_set_clk()
234 src_clk << ACLK_BUS_ROOT_SEL_SHIFT); in rk3576_bus_set_clk()
239 (src_clk << in rk3576_bus_set_clk()
245 src_clk = HCLK_BUS_ROOT_SEL_200M; in rk3576_bus_set_clk()
247 src_clk = HCLK_BUS_ROOT_SEL_100M; in rk3576_bus_set_clk()
249 src_clk = HCLK_BUS_ROOT_SEL_50M; in rk3576_bus_set_clk()
251 src_clk = HCLK_BUS_ROOT_SEL_OSC; in rk3576_bus_set_clk()
254 src_clk << HCLK_BUS_ROOT_SEL_SHIFT); in rk3576_bus_set_clk()
[all …]
H A Dclk_rk3588.c220 int src_clk; in rk3588_center_set_clk() local
225 src_clk = ACLK_CENTER_ROOT_SEL_700M; in rk3588_center_set_clk()
227 src_clk = ACLK_CENTER_ROOT_SEL_400M; in rk3588_center_set_clk()
229 src_clk = ACLK_CENTER_ROOT_SEL_200M; in rk3588_center_set_clk()
231 src_clk = ACLK_CENTER_ROOT_SEL_24M; in rk3588_center_set_clk()
234 src_clk << ACLK_CENTER_ROOT_SEL_SHIFT); in rk3588_center_set_clk()
238 src_clk = ACLK_CENTER_LOW_ROOT_SEL_500M; in rk3588_center_set_clk()
240 src_clk = ACLK_CENTER_LOW_ROOT_SEL_250M; in rk3588_center_set_clk()
242 src_clk = ACLK_CENTER_LOW_ROOT_SEL_100M; in rk3588_center_set_clk()
244 src_clk = ACLK_CENTER_LOW_ROOT_SEL_24M; in rk3588_center_set_clk()
[all …]
H A Dclk_rv1126b.c141 int src_clk; in rv1126b_peri_set_clk() local
146 src_clk = ACLK_PERI_SEL_200M; in rv1126b_peri_set_clk()
148 src_clk = ACLK_PERI_SEL_24M; in rv1126b_peri_set_clk()
151 src_clk << ACLK_PERI_SEL_SHIFT); in rv1126b_peri_set_clk()
155 src_clk = PCLK_PERI_SEL_100M; in rv1126b_peri_set_clk()
157 src_clk = PCLK_PERI_SEL_24M; in rv1126b_peri_set_clk()
160 src_clk << PCLK_PERI_SEL_SHIFT); in rv1126b_peri_set_clk()
164 src_clk = ACLK_TOP_SEL_600M; in rv1126b_peri_set_clk()
166 src_clk = ACLK_TOP_SEL_400M; in rv1126b_peri_set_clk()
168 src_clk = ACLK_TOP_SEL_200M; in rv1126b_peri_set_clk()
[all …]
H A Dclk_rv1103b.c117 int src_clk, div; in rv1103b_peri_set_clk() local
122 src_clk = ACLK_PERI_SEL_600M; in rv1103b_peri_set_clk()
124 src_clk = ACLK_PERI_SEL_480M; in rv1103b_peri_set_clk()
126 src_clk = ACLK_PERI_SEL_400M; in rv1103b_peri_set_clk()
129 src_clk << ACLK_PERI_SEL_SHIFT); in rv1103b_peri_set_clk()
133 src_clk = LSCLK_PERI_SEL_300M; in rv1103b_peri_set_clk()
135 src_clk = LSCLK_PERI_SEL_200M; in rv1103b_peri_set_clk()
138 src_clk << LSCLK_PERI_SEL_SHIFT); in rv1103b_peri_set_clk()
152 src_clk = LSCLK_PMU_SEL_24M; in rv1103b_peri_set_clk()
155 src_clk = LSCLK_PMU_SEL_RC_OSC; in rv1103b_peri_set_clk()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx5/
H A Dclock.c618 #define calc_div(tgt_clk, src_clk, limit) ({ \ argument
620 if (((src_clk) % (tgt_clk)) <= 100) \
621 v = (src_clk) / (tgt_clk); \
623 v = ((src_clk) / (tgt_clk)) + 1;\