167 	int src_clk;  in rv1106_peri_set_clk()  local
172 			src_clk = ACLK_PERI_SEL_400M;  in rv1106_peri_set_clk()
174 			src_clk = ACLK_PERI_SEL_200M;  in rv1106_peri_set_clk()
176 			src_clk = ACLK_PERI_SEL_100M;  in rv1106_peri_set_clk()
178 			src_clk = ACLK_PERI_SEL_24M;  in rv1106_peri_set_clk()
181 			     src_clk << ACLK_PERI_SEL_SHIFT);  in rv1106_peri_set_clk()
185 			src_clk = HCLK_PERI_SEL_200M;  in rv1106_peri_set_clk()
187 			src_clk = HCLK_PERI_SEL_100M;  in rv1106_peri_set_clk()
189 			src_clk = HCLK_PERI_SEL_50M;  in rv1106_peri_set_clk()
191 			src_clk = HCLK_PERI_SEL_24M;  in rv1106_peri_set_clk()
194 			     src_clk << HCLK_PERI_SEL_SHIFT);  in rv1106_peri_set_clk()
198 			src_clk = PCLK_PERI_SEL_100M;  in rv1106_peri_set_clk()
200 			src_clk = PCLK_PERI_SEL_50M;  in rv1106_peri_set_clk()
202 			src_clk = PCLK_PERI_SEL_24M;  in rv1106_peri_set_clk()
205 			     src_clk << PCLK_PERI_SEL_SHIFT);  in rv1106_peri_set_clk()
209 			src_clk = ACLK_BUS_SEL_300M;  in rv1106_peri_set_clk()
211 			src_clk = ACLK_BUS_SEL_200M;  in rv1106_peri_set_clk()
213 			src_clk = ACLK_BUS_SEL_100M;  in rv1106_peri_set_clk()
215 			src_clk = ACLK_BUS_SEL_24M;  in rv1106_peri_set_clk()
218 			     src_clk << ACLK_BUS_SEL_SHIFT);  in rv1106_peri_set_clk()
222 			src_clk = PCLK_TOP_SEL_100M;  in rv1106_peri_set_clk()
224 			src_clk = PCLK_TOP_SEL_50M;  in rv1106_peri_set_clk()
226 			src_clk = PCLK_TOP_SEL_24M;  in rv1106_peri_set_clk()
229 			     src_clk << PCLK_TOP_SEL_SHIFT);  in rv1106_peri_set_clk()
233 			src_clk = PCLK_PMU_SEL_100M;  in rv1106_peri_set_clk()
235 			src_clk = PCLK_PMU_SEL_24M;  in rv1106_peri_set_clk()
238 			     src_clk << PCLK_PMU_SEL_SHIFT);  in rv1106_peri_set_clk()
242 			src_clk = HCLK_PMU_SEL_200M;  in rv1106_peri_set_clk()
244 			src_clk = HCLK_PMU_SEL_100M;  in rv1106_peri_set_clk()
246 			src_clk = HCLK_PMU_SEL_24M;  in rv1106_peri_set_clk()
249 			     src_clk << HCLK_PMU_SEL_SHIFT);  in rv1106_peri_set_clk()
512 	int src_clk;  in rv1106_i2c_set_clk()  local
515 		src_clk = CLK_I2C0_SEL_200M;  in rv1106_i2c_set_clk()
517 		src_clk = CLK_I2C0_SEL_100M;  in rv1106_i2c_set_clk()
519 		src_clk = CLK_I2C0_SEL_50M;  in rv1106_i2c_set_clk()
521 		src_clk = CLK_I2C0_SEL_24M;  in rv1106_i2c_set_clk()
526 			src_clk = CLK_I2C1_SEL_200M;  in rv1106_i2c_set_clk()
528 			src_clk = CLK_I2C1_SEL_100M;  in rv1106_i2c_set_clk()
530 			src_clk = CLK_I2C1_SEL_24M;  in rv1106_i2c_set_clk()
532 			src_clk = CLK_I2C1_SEL_32K;  in rv1106_i2c_set_clk()
534 			     src_clk << CLK_I2C1_SEL_SHIFT);  in rv1106_i2c_set_clk()
538 			     src_clk << CLK_I2C0_SEL_SHIFT);  in rv1106_i2c_set_clk()
542 			     src_clk << CLK_I2C2_SEL_SHIFT);  in rv1106_i2c_set_clk()
546 			     src_clk << CLK_I2C3_SEL_SHIFT);  in rv1106_i2c_set_clk()
550 			     src_clk << CLK_I2C4_SEL_SHIFT);  in rv1106_i2c_set_clk()
593 	int src_clk;  in rv1106_spi_set_clk()  local
596 		src_clk = CLK_SPI0_SEL_200M;  in rv1106_spi_set_clk()
598 		src_clk = CLK_SPI0_SEL_100M;  in rv1106_spi_set_clk()
600 		src_clk = CLK_SPI0_SEL_50M;  in rv1106_spi_set_clk()
602 		src_clk = CLK_SPI0_SEL_24M;  in rv1106_spi_set_clk()
607 			     src_clk << CLK_SPI0_SEL_SHIFT);  in rv1106_spi_set_clk()
611 			     src_clk << CLK_SPI1_SEL_SHIFT);  in rv1106_spi_set_clk()
659 	int src_clk;  in rv1106_pwm_set_clk()  local
662 		src_clk = CLK_PWM_SEL_100M;  in rv1106_pwm_set_clk()
664 		src_clk = CLK_PWM_SEL_50M;  in rv1106_pwm_set_clk()
666 		src_clk = CLK_PWM_SEL_24M;  in rv1106_pwm_set_clk()
672 			     src_clk << CLK_PWM0_SEL_SHIFT);  in rv1106_pwm_set_clk()
677 			     src_clk << CLK_PWM1_SEL_SHIFT);  in rv1106_pwm_set_clk()
682 			     src_clk << CLK_PWM2_SEL_SHIFT);  in rv1106_pwm_set_clk()