Lines Matching refs:src_clk

220 	int src_clk;  in rk3588_center_set_clk()  local
225 src_clk = ACLK_CENTER_ROOT_SEL_700M; in rk3588_center_set_clk()
227 src_clk = ACLK_CENTER_ROOT_SEL_400M; in rk3588_center_set_clk()
229 src_clk = ACLK_CENTER_ROOT_SEL_200M; in rk3588_center_set_clk()
231 src_clk = ACLK_CENTER_ROOT_SEL_24M; in rk3588_center_set_clk()
234 src_clk << ACLK_CENTER_ROOT_SEL_SHIFT); in rk3588_center_set_clk()
238 src_clk = ACLK_CENTER_LOW_ROOT_SEL_500M; in rk3588_center_set_clk()
240 src_clk = ACLK_CENTER_LOW_ROOT_SEL_250M; in rk3588_center_set_clk()
242 src_clk = ACLK_CENTER_LOW_ROOT_SEL_100M; in rk3588_center_set_clk()
244 src_clk = ACLK_CENTER_LOW_ROOT_SEL_24M; in rk3588_center_set_clk()
247 src_clk << ACLK_CENTER_LOW_ROOT_SEL_SHIFT); in rk3588_center_set_clk()
251 src_clk = HCLK_CENTER_ROOT_SEL_400M; in rk3588_center_set_clk()
253 src_clk = HCLK_CENTER_ROOT_SEL_200M; in rk3588_center_set_clk()
255 src_clk = HCLK_CENTER_ROOT_SEL_100M; in rk3588_center_set_clk()
257 src_clk = HCLK_CENTER_ROOT_SEL_24M; in rk3588_center_set_clk()
260 src_clk << HCLK_CENTER_ROOT_SEL_SHIFT); in rk3588_center_set_clk()
264 src_clk = PCLK_CENTER_ROOT_SEL_200M; in rk3588_center_set_clk()
266 src_clk = PCLK_CENTER_ROOT_SEL_100M; in rk3588_center_set_clk()
268 src_clk = PCLK_CENTER_ROOT_SEL_50M; in rk3588_center_set_clk()
270 src_clk = PCLK_CENTER_ROOT_SEL_24M; in rk3588_center_set_clk()
273 src_clk << PCLK_CENTER_ROOT_SEL_SHIFT); in rk3588_center_set_clk()
332 int src_clk, src_clk_div; in rk3588_top_set_clk() local
337 src_clk = ACLK_TOP_ROOT_SRC_SEL_CPLL; in rk3588_top_set_clk()
340 src_clk = ACLK_TOP_ROOT_SRC_SEL_GPLL; in rk3588_top_set_clk()
347 (src_clk << in rk3588_top_set_clk()
363 src_clk = PCLK_TOP_ROOT_SEL_100M; in rk3588_top_set_clk()
365 src_clk = PCLK_TOP_ROOT_SEL_50M; in rk3588_top_set_clk()
367 src_clk = PCLK_TOP_ROOT_SEL_24M; in rk3588_top_set_clk()
370 src_clk << PCLK_TOP_ROOT_SEL_SHIFT); in rk3588_top_set_clk()
438 int src_clk; in rk3588_i2c_set_clk() local
441 src_clk = CLK_I2C_SEL_200M; in rk3588_i2c_set_clk()
443 src_clk = CLK_I2C_SEL_100M; in rk3588_i2c_set_clk()
448 src_clk << CLK_I2C0_SEL_SHIFT); in rk3588_i2c_set_clk()
452 src_clk << CLK_I2C1_SEL_SHIFT); in rk3588_i2c_set_clk()
456 src_clk << CLK_I2C2_SEL_SHIFT); in rk3588_i2c_set_clk()
460 src_clk << CLK_I2C3_SEL_SHIFT); in rk3588_i2c_set_clk()
464 src_clk << CLK_I2C4_SEL_SHIFT); in rk3588_i2c_set_clk()
468 src_clk << CLK_I2C5_SEL_SHIFT); in rk3588_i2c_set_clk()
472 src_clk << CLK_I2C6_SEL_SHIFT); in rk3588_i2c_set_clk()
476 src_clk << CLK_I2C7_SEL_SHIFT); in rk3588_i2c_set_clk()
480 src_clk << CLK_I2C8_SEL_SHIFT); in rk3588_i2c_set_clk()
532 int src_clk; in rk3588_spi_set_clk() local
535 src_clk = CLK_SPI_SEL_200M; in rk3588_spi_set_clk()
537 src_clk = CLK_SPI_SEL_150M; in rk3588_spi_set_clk()
539 src_clk = CLK_SPI_SEL_24M; in rk3588_spi_set_clk()
545 src_clk << CLK_SPI0_SEL_SHIFT); in rk3588_spi_set_clk()
550 src_clk << CLK_SPI1_SEL_SHIFT); in rk3588_spi_set_clk()
555 src_clk << CLK_SPI2_SEL_SHIFT); in rk3588_spi_set_clk()
560 src_clk << CLK_SPI3_SEL_SHIFT); in rk3588_spi_set_clk()
565 src_clk << CLK_SPI4_SEL_SHIFT); in rk3588_spi_set_clk()
616 int src_clk; in rk3588_pwm_set_clk() local
619 src_clk = CLK_PWM_SEL_100M; in rk3588_pwm_set_clk()
621 src_clk = CLK_PWM_SEL_50M; in rk3588_pwm_set_clk()
623 src_clk = CLK_PWM_SEL_24M; in rk3588_pwm_set_clk()
629 src_clk << CLK_PWM1_SEL_SHIFT); in rk3588_pwm_set_clk()
634 src_clk << CLK_PWM2_SEL_SHIFT); in rk3588_pwm_set_clk()
639 src_clk << CLK_PWM3_SEL_SHIFT); in rk3588_pwm_set_clk()
644 src_clk << CLK_PMU1PWM_SEL_SHIFT); in rk3588_pwm_set_clk()
815 int src_clk, div; in rk3588_mmc_set_clk() local
822 src_clk = SCLK_SFC_SEL_24M; in rk3588_mmc_set_clk()
825 src_clk = SCLK_SFC_SEL_CPLL; in rk3588_mmc_set_clk()
828 src_clk = SCLK_SFC_SEL_GPLL; in rk3588_mmc_set_clk()
834 src_clk = CCLK_EMMC_SEL_CPLL; in rk3588_mmc_set_clk()
837 src_clk = CCLK_EMMC_SEL_GPLL; in rk3588_mmc_set_clk()
843 src_clk = DCLK_DECOM_SEL_SPLL; in rk3588_mmc_set_clk()
846 src_clk = DCLK_DECOM_SEL_GPLL; in rk3588_mmc_set_clk()
859 (src_clk << CCLK_SDIO_SRC_SEL_SHIFT) | in rk3588_mmc_set_clk()
866 (src_clk << CCLK_EMMC_SEL_SHIFT) | in rk3588_mmc_set_clk()
873 (src_clk << BCLK_EMMC_SEL_SHIFT) | in rk3588_mmc_set_clk()
880 (src_clk << SCLK_SFC_SEL_SHIFT) | in rk3588_mmc_set_clk()
887 (src_clk << DCLK_DECOM_SEL_SHIFT) | in rk3588_mmc_set_clk()
1001 int src_clk, div; in rk3588_aclk_vop_set_clk() local
1007 src_clk = ACLK_VOP_ROOT_SEL_NPLL; in rk3588_aclk_vop_set_clk()
1010 src_clk = ACLK_VOP_ROOT_SEL_CPLL; in rk3588_aclk_vop_set_clk()
1013 src_clk = ACLK_VOP_ROOT_SEL_SPLL; in rk3588_aclk_vop_set_clk()
1016 src_clk = ACLK_VOP_ROOT_SEL_CPLL; in rk3588_aclk_vop_set_clk()
1019 src_clk = ACLK_VOP_ROOT_SEL_GPLL; in rk3588_aclk_vop_set_clk()
1025 (src_clk << ACLK_VOP_ROOT_SEL_SHIFT) | in rk3588_aclk_vop_set_clk()
1030 src_clk = ACLK_VOP_LOW_ROOT_SEL_400M; in rk3588_aclk_vop_set_clk()
1032 src_clk = ACLK_VOP_LOW_ROOT_SEL_200M; in rk3588_aclk_vop_set_clk()
1034 src_clk = ACLK_VOP_LOW_ROOT_SEL_100M; in rk3588_aclk_vop_set_clk()
1036 src_clk = ACLK_VOP_LOW_ROOT_SEL_24M; in rk3588_aclk_vop_set_clk()
1039 src_clk << ACLK_VOP_LOW_ROOT_SEL_SHIFT); in rk3588_aclk_vop_set_clk()
1043 src_clk = HCLK_VOP_ROOT_SEL_200M; in rk3588_aclk_vop_set_clk()
1045 src_clk = HCLK_VOP_ROOT_SEL_100M; in rk3588_aclk_vop_set_clk()
1047 src_clk = HCLK_VOP_ROOT_SEL_50M; in rk3588_aclk_vop_set_clk()
1049 src_clk = HCLK_VOP_ROOT_SEL_24M; in rk3588_aclk_vop_set_clk()
1052 src_clk << HCLK_VOP_ROOT_SEL_SHIFT); in rk3588_aclk_vop_set_clk()