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Searched refs:port (Results 1 – 25 of 502) sorted by relevance

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/rk3399_rockchip-uboot/drivers/power/power_delivery/
H A Dtcpm.c457 struct tcpm_port *port; member
471 #define tcpm_port_is_sink(port) \ argument
472 ((tcpm_cc_is_sink((port)->cc1) && !tcpm_cc_is_sink((port)->cc2)) || \
473 (tcpm_cc_is_sink((port)->cc2) && !tcpm_cc_is_sink((port)->cc1)))
479 #define tcpm_port_is_source(port) \ argument
480 ((tcpm_cc_is_source((port)->cc1) && \
481 !tcpm_cc_is_source((port)->cc2)) || \
482 (tcpm_cc_is_source((port)->cc2) && \
483 !tcpm_cc_is_source((port)->cc1)))
485 #define tcpm_port_is_debug(port) \ argument
[all …]
/rk3399_rockchip-uboot/drivers/serial/
H A Dserial_sh.c27 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
29 return sci_in(port, SCRFDR) & 0xff; in scif_rxfill()
32 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
34 if ((port->mapbase == 0xffe00000) || in scif_rxfill()
35 (port->mapbase == 0xffe08000)) { in scif_rxfill()
37 return sci_in(port, SCRFDR) & 0xff; in scif_rxfill()
40 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; in scif_rxfill()
44 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
46 if (port->type == PORT_SCIFA) in scif_rxfill()
47 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; in scif_rxfill()
[all …]
H A Dserial_sh.h28 # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ argument
41 # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 argument
49 # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ argument
57 # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
67 # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \ argument
75 # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
81 # define SCSCR_INIT(port) 0x3B argument
87 # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ argument
95 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
100 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
[all …]
H A Dserial_ns16550.c77 #define PORT serial_ports[port-1]
80 #define DECLARE_ESERIAL_FUNCTIONS(port) \ argument
81 static int eserial##port##_init(void) \
84 clock_divisor = ns16550_calc_divisor(serial_ports[port-1], \
86 NS16550_init(serial_ports[port-1], clock_divisor); \
89 static void eserial##port##_setbrg(void) \
91 serial_setbrg_dev(port); \
93 static int eserial##port##_getc(void) \
95 return serial_getc_dev(port); \
97 static int eserial##port##_tstc(void) \
[all …]
/rk3399_rockchip-uboot/drivers/misc/
H A Dsmsc_sio1007.c12 static inline u8 sio1007_read(int port, int reg) in sio1007_read() argument
14 outb(reg, port); in sio1007_read()
16 return inb(port + 1); in sio1007_read()
19 static inline void sio1007_write(int port, int reg, int val) in sio1007_write() argument
21 outb(reg, port); in sio1007_write()
22 outb(val, port + 1); in sio1007_write()
25 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits() argument
27 sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set); in sio1007_clrsetbits()
30 void sio1007_enable_serial(int port, int num, int iobase, int irq) in sio1007_enable_serial() argument
36 outb(0x55, port); in sio1007_enable_serial()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xxx/
H A Dsrio.c72 static int srio_erratum_a004034(u8 port) in srio_erratum_a004034() argument
84 >> (12 - port * 4)) & 0x3; in srio_erratum_a004034()
86 .port[port].pccsr) >> 27) & 0x7; in srio_erratum_a004034()
105 .port[port].pescsr) & 0x2) { in srio_erratum_a004034()
121 .port[port].pccsr, in srio_erratum_a004034()
127 setbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
134 if (port) in srio_erratum_a004034()
180 out_be32((void *)&srio_regs->impl.port[port].slcsr, in srio_erratum_a004034()
183 clrbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
187 .port[port].pccsr, in srio_erratum_a004034()
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/mx27/
H A Dgeneric.c210 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; in imx_gpio_mode() local
218 writel(readl(&regs->port[port].puen) | (1 << pin), in imx_gpio_mode()
219 &regs->port[port].puen); in imx_gpio_mode()
221 writel(readl(&regs->port[port].puen) & ~(1 << pin), in imx_gpio_mode()
222 &regs->port[port].puen); in imx_gpio_mode()
227 writel(readl(&regs->port[port].gpio_dir) | 1 << pin, in imx_gpio_mode()
228 &regs->port[port].gpio_dir); in imx_gpio_mode()
230 writel(readl(&regs->port[port].gpio_dir) & ~(1 << pin), in imx_gpio_mode()
231 &regs->port[port].gpio_dir); in imx_gpio_mode()
236 writel(readl(&regs->port[port].gpr) | (1 << pin), in imx_gpio_mode()
[all …]
/rk3399_rockchip-uboot/drivers/bios_emulator/
H A Dbesys.c249 #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43) argument
250 #define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71) argument
252 #define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA) argument
253 #define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF) argument
254 #define IS_SPKR_PORT(port) (port == 0x61) argument
267 static u8 VGA_inpb (const int port) in VGA_inpb() argument
271 debug_io("vga_inb.%04X -> ", (u16) port); in VGA_inpb()
272 switch (port) { in VGA_inpb()
343 static void VGA_outpb (int port, u8 val) in VGA_outpb() argument
345 switch (port) { in VGA_outpb()
[all …]
H A Dbiosemui.h131 #define PM_inpb(port) inb(port+VIDEO_IO_OFFSET) argument
132 #define PM_inpw(port) inw(port+VIDEO_IO_OFFSET) argument
133 #define PM_inpd(port) inl(port+VIDEO_IO_OFFSET) argument
134 #define PM_outpb(port,val) outb(val,port+VIDEO_IO_OFFSET) argument
135 #define PM_outpw(port,val) outw(val,port+VIDEO_IO_OFFSET) argument
136 #define PM_outpd(port,val) outl(val,port+VIDEO_IO_OFFSET) argument
138 #define LOG_inpb(port) PM_inpb(port) argument
139 #define LOG_inpw(port) PM_inpw(port) argument
140 #define LOG_inpd(port) PM_inpd(port) argument
141 #define LOG_outpb(port,val) PM_outpb(port,val) argument
[all …]
/rk3399_rockchip-uboot/drivers/ata/
H A Dsata_sil3114.c40 static struct sata_port port[CONFIG_SYS_SATA_MAX_DEVICE]; variable
61 port[num].dev_mask = 1; in sata_bus_softreset()
63 port[num].ctl_reg = 0x08; /*Default value of control reg */ in sata_bus_softreset()
64 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
66 writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
68 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
79 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300, 0); in sata_bus_softreset()
82 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3, 0); in sata_bus_softreset()
91 status = sata_chk_status (&port[num].ioaddr, 0); in sata_bus_softreset()
97 port[num].dev_mask = 0; in sata_bus_softreset()
[all …]
/rk3399_rockchip-uboot/arch/x86/include/asm/arch-quark/
H A Dmsg_port.h45 void msg_port_setup(int op, int port, int reg);
55 u32 msg_port_read(u8 port, u32 reg);
64 void msg_port_write(u8 port, u32 reg, u32 value);
74 u32 msg_port_alt_read(u8 port, u32 reg);
83 void msg_port_alt_write(u8 port, u32 reg, u32 value);
93 u32 msg_port_io_read(u8 port, u32 reg);
102 void msg_port_io_write(u8 port, u32 reg, u32 value);
109 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
110 msg_port_##type##_write(port, reg, \
111 (msg_port_##type##_read(port, reg) \
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/axp/
H A Dboard_env_spec.h131 #define SATA_BASE_REG(port) (0xA2000 + (port)*0x2000) argument
133 #define SATA_PWR_PLL_CTRL_REG(port) (SATA_BASE_REG(port) + 0x804) argument
134 #define SATA_DIG_LP_ENA_REG(port) (SATA_BASE_REG(port) + 0x88C) argument
135 #define SATA_REF_CLK_SEL_REG(port) (SATA_BASE_REG(port) + 0x918) argument
136 #define SATA_COMPHY_CTRL_REG(port) (SATA_BASE_REG(port) + 0x920) argument
137 #define SATA_LP_PHY_EXT_CTRL_REG(port) (SATA_BASE_REG(port) + 0x058) argument
138 #define SATA_LP_PHY_EXT_STAT_REG(port) (SATA_BASE_REG(port) + 0x05C) argument
139 #define SATA_IMP_TX_SSC_CTRL_REG(port) (SATA_BASE_REG(port) + 0x810) argument
140 #define SATA_GEN_1_SET_0_REG(port) (SATA_BASE_REG(port) + 0x834) argument
141 #define SATA_GEN_1_SET_1_REG(port) (SATA_BASE_REG(port) + 0x838) argument
[all …]
/rk3399_rockchip-uboot/drivers/net/
H A Dmvpp2.c81 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port)) argument
82 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port)) argument
87 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port)) argument
108 #define MVPP2_PRS_PORT_LU_MASK(port) (0xff << ((port) * 4)) argument
109 #define MVPP2_PRS_PORT_LU_VAL(port, val) ((val) << ((port) * 4)) argument
110 #define MVPP2_PRS_INIT_OFFS_REG(port) (0x1004 + ((port) & 4)) argument
111 #define MVPP2_PRS_INIT_OFF_MASK(port) (0x3f << (((port) % 4) * 8)) argument
112 #define MVPP2_PRS_INIT_OFF_VAL(port, val) ((val) << (((port) % 4) * 8)) argument
113 #define MVPP2_PRS_MAX_LOOP_REG(port) (0x100c + ((port) & 4)) argument
114 #define MVPP2_PRS_MAX_LOOP_MASK(port) (0xff << (((port) % 4) * 8)) argument
[all …]
/rk3399_rockchip-uboot/arch/m68k/include/asm/
H A Dio.h47 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
48 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
49 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
50 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
51 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
52 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
54 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
55 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
57 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
58 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/imx/
H A Dgeneric.c22 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> 5; in imx_gpio_mode() local
28 PUEN(port) |= (1<<pin); in imx_gpio_mode()
30 PUEN(port) &= ~(1<<pin); in imx_gpio_mode()
34 DDIR(port) |= 1<<pin; in imx_gpio_mode()
36 DDIR(port) &= ~(1<<pin); in imx_gpio_mode()
40 GPR(port) |= (1<<pin); in imx_gpio_mode()
42 GPR(port) &= ~(1<<pin); in imx_gpio_mode()
46 GIUS(port) |= (1<<pin); in imx_gpio_mode()
48 GIUS(port) &= ~(1<<pin); in imx_gpio_mode()
55 tmp = OCR1(port); in imx_gpio_mode()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dio.h43 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
44 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
45 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
46 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
47 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
48 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
50 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
51 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
53 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
54 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
[all …]
/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Dio.h60 #define inb(port) readb((u8 *)((port))) argument
61 #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) argument
62 #define inw(port) readw((u16 *)((port))) argument
63 #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) argument
64 #define inl(port) readl((u32 *)((port))) argument
65 #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) argument
67 #define inb_p(port) inb((port)) argument
68 #define outb_p(val, port) outb((val), (port)) argument
69 #define inw_p(port) inw((port)) argument
70 #define outw_p(val, port) outw((val), (port)) argument
[all …]
/rk3399_rockchip-uboot/board/intel/galileo/
H A Dgalileo.c24 u32 base, port, val; in board_assert_perst() local
31 port = base + 0x20; in board_assert_perst()
32 val = inl(port); in board_assert_perst()
34 outl(val, port); in board_assert_perst()
37 port = base + 0x24; in board_assert_perst()
38 val = inl(port); in board_assert_perst()
40 outl(val, port); in board_assert_perst()
43 port = base + 0x28; in board_assert_perst()
44 val = inl(port); in board_assert_perst()
46 outl(val, port); in board_assert_perst()
[all …]
/rk3399_rockchip-uboot/drivers/net/fm/
H A Dp5020.c22 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
27 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
30 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
35 if (port == FM1_DTSEC1) in fman_disable_port()
38 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
41 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
45 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
48 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
53 if (is_device_disabled(port)) in fman_port_enet_if()
56 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
H A Dp4080.c26 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
31 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
34 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
39 if (port == FM1_DTSEC1) in fman_disable_port()
42 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
45 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
49 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
52 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
57 if (is_device_disabled(port)) in fman_port_enet_if()
60 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
H A Dinit.c117 static int fm_port_to_index(enum fm_port port) in fm_port_to_index() argument
122 if (fm_info[i].port == port) in fm_port_to_index()
141 enet_if = fman_port_enet_if(fm_info[i].port); in fman_enet_init()
153 void fm_disable_port(enum fm_port port) in fm_disable_port() argument
155 int i = fm_port_to_index(port); in fm_disable_port()
162 fman_disable_port(port); in fm_disable_port()
166 void fm_enable_port(enum fm_port port) in fm_enable_port() argument
168 int i = fm_port_to_index(port); in fm_enable_port()
174 fman_enable_port(port); in fm_enable_port()
177 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus) in fm_info_set_mdio() argument
[all …]
H A Db4860.c26 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
31 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
34 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
38 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
41 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
45 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
48 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
57 if (is_device_disabled(port)) in fman_port_enet_if()
61 if ((port == FM1_10GEC1 || port == FM1_10GEC2) && in fman_port_enet_if()
106 if ((port == FM1_10GEC1 || in fman_port_enet_if()
[all …]
H A Dp5040.c28 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
33 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
36 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
41 if (port == FM1_DTSEC1) in fman_disable_port()
44 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
47 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
51 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
54 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
59 if (is_device_disabled(port)) in fman_port_enet_if()
62 if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1))) in fman_port_enet_if()
[all …]
H A Dls1046.c37 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
42 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
45 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
49 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
52 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
57 if (is_device_disabled(port)) in fman_port_enet_if()
60 if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9))) in fman_port_enet_if()
63 if ((port == FM1_DTSEC9) && (is_serdes_configured(XFI_FM1_MAC9))) in fman_port_enet_if()
66 if ((port == FM1_10GEC2) && (is_serdes_configured(XFI_FM1_MAC10))) in fman_port_enet_if()
69 if ((port == FM1_DTSEC10) && (is_serdes_configured(XFI_FM1_MAC10))) in fman_port_enet_if()
[all …]
H A Dt4240.c37 static int is_device_disabled(enum fm_port port) in is_device_disabled() argument
42 return port_to_devdisr[port] & devdisr2; in is_device_disabled()
45 void fman_disable_port(enum fm_port port) in fman_disable_port() argument
49 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port()
52 void fman_enable_port(enum fm_port port) in fman_enable_port() argument
56 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port()
59 phy_interface_t fman_port_enet_if(enum fm_port port) in fman_port_enet_if() argument
64 if (is_device_disabled(port)) in fman_port_enet_if()
67 if ((port == FM1_10GEC1 || port == FM1_10GEC2) && in fman_port_enet_if()
74 if ((port == FM1_DTSEC9 || port == FM1_DTSEC10) && in fman_port_enet_if()
[all …]

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