| /rk3399_rockchip-uboot/board/birdland/bav335x/ |
| H A D | mux.c | 104 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
123 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
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| /rk3399_rockchip-uboot/board/gumstix/pepper/ |
| H A D | mux.c | 44 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-am33xx/ |
| H A D | mux_am43xx.h | 103 int mii1_txd3; member
|
| H A D | mux_am33xx.h | 110 int mii1_txd3; member
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| /rk3399_rockchip-uboot/board/silica/pengwyn/ |
| H A D | mux.c | 51 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
|
| /rk3399_rockchip-uboot/board/compulab/cm_t335/ |
| H A D | mux.c | 58 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
|
| /rk3399_rockchip-uboot/board/tcl/sl50/ |
| H A D | mux.c | 97 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
|
| /rk3399_rockchip-uboot/board/ti/am43xx/ |
| H A D | mux.c | 31 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
|
| /rk3399_rockchip-uboot/board/ti/am335x/ |
| H A D | mux.c | 146 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
165 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
|
| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | am335x-bone-common.dtsi | 115 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
|
| H A D | am335x-pxm2.dtsi | 386 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
| H A D | am335x-rut.dts | 495 0x11c (MUX_MODE7) /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */
|
| H A D | am335x-evmsk.dts | 326 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
| H A D | am335x-evm.dts | 245 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
|
| /rk3399_rockchip-uboot/board/compulab/cm_t43/ |
| H A D | mux.c | 14 {OFFSET(mii1_txd3), MODE(2)},
|
| /rk3399_rockchip-uboot/board/BuR/brxre1/ |
| H A D | mux.c | 111 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
|
| /rk3399_rockchip-uboot/board/siemens/pxm2/ |
| H A D | mux.c | 69 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
|
| /rk3399_rockchip-uboot/board/bosch/shc/ |
| H A D | mux.c | 182 {OFFSET(mii1_txd3), MODE(0)},
|
| /rk3399_rockchip-uboot/board/BuR/brppt1/ |
| H A D | mux.c | 85 {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
|
| /rk3399_rockchip-uboot/board/siemens/rut/ |
| H A D | mux.c | 146 {OFFSET(mii1_txd3), (MODE(7) | RXACTIVE)},
|
| /rk3399_rockchip-uboot/board/siemens/draco/ |
| H A D | mux.c | 235 {OFFSET(mii1_txd3), (MODE(7) | RXACTIVE)},
|